21876 Commits

Author SHA1 Message Date
Adrian Chadd
8fd67f92b0 Rename AH_ENABLE_11N to ATH_ENABLE_11 - the HAL supports 11n by
default but the ath driver doesn't. This is a much more consistent
name.
2011-03-27 08:47:55 +00:00
Marius Strobl
f7c719b1b3 Wait until the DMA engine is stopped before unmapping buffers and
descriptors, which fixes DMA errors seen on sparc64.

Obtained from:	OpenBSD
MFC after:	1 week
2011-03-26 22:39:23 +00:00
Adrian Chadd
bb16aa8120 .. And another missed commit - add the PSPOLL capability. 2011-03-26 13:06:43 +00:00
Adrian Chadd
d2211b6a68 This was missing from the previous HAL commit - it fixes a typo and
introduces the PS-POLL hardware support.
2011-03-26 11:59:18 +00:00
Adrian Chadd
a74f5bf40c If 802.11n is enabled, bump the number of buffers used up to a larger
level.

This is important for AMPDU RX as each burst is multiple packets in a row.
2011-03-26 11:58:29 +00:00
Adrian Chadd
f378d4c804 Add in the hardware PS-POLL frame reception setting, but leave it disabled
by default.

Adventourous souls with an AR9220/AR9280 or later and who have a device
that sends PS-POLL frames may wish to try tinkering with this option and
get back to me.
2011-03-26 10:52:37 +00:00
Adrian Chadd
a0e1036046 Introduce hardware PS-POLL support in the HAL.
Linux ath9k only enables this for AR9280 and later NICs; so
create a capability for it so it isn't enabled for earlier
NICs.

Enabling hardware PS-POLL support will come in a later commit
and will be disabled by default.
2011-03-26 10:47:17 +00:00
Adrian Chadd
f95233b6f5 Put these two back to mirror what ath9k does.
Even though they map to setting the error filter register,
ath9k also writes them untouched to AR_RX_FILTER.

The Force-BSSID match bit can stay high, as it maps to a
misc mode register setting rather than an RX filter bit.
2011-03-26 07:29:48 +00:00
Adrian Chadd
8c98d9bae1 Shuffle around the HAL_RX_FILTER bits to be slightly more sensible.
The phyerr, radar and bssid-match bits aren't real bits, they map
to enabling bits in other registers. Move those out of the way of
valid RX filter bits.

Add a few new fields from ath9k - compba, ps-poll, mcast-bcast-all.
2011-03-26 07:15:35 +00:00
Navdeep Parhar
2b3da0fd11 Update T3 firmware to 7.11.0
Changes since 7.8.0 (from the official changelog):

- Fixed sporadic interrupt generation for associated CQ when processing
  a local invalidate work request
- Changes to core scheduling to avoid starving requests from the host
  under heavy RDMA Read Request load (e.g. packets to the wire)

- Programmed the tp tx resource limiter in function of the traffic (only
  affects iWarp)

- Increased the egress NIC gather list length from 36 to 46 entries

MFC after:	1 week
2011-03-25 20:53:02 +00:00
Adrian Chadd
532f24429c After discussing with Bernhard, the "right" way in net80211 to check
the channel width is ni->ni_chw, which is set to the negotiated channel
width. ni->ni_htflags is the capability, rather than the negotiated
value.

Teach both the TX path and the sample rate module about this.
2011-03-25 10:55:25 +00:00
Adrian Chadd
75f0fbfbbf I broke periodic adc calibrations - so restore them to working order. 2011-03-25 10:53:13 +00:00
Hans Petter Selasky
46873d15b1 Fix initialisation order with regard to debug prints.
Reported by:	Luiz Otavio O Souza
MFC after:	14 days
Approved by:	thompsa (mentor)
2011-03-25 10:11:21 +00:00
Kevin Lo
bf9d222b88 Fix panic while associating access point.
While here, add the SMC SMCWUSB-G
2011-03-25 05:01:13 +00:00
Adrian Chadd
ab2e5836be Re-disable the setting of 2040/shortgi bits for now.
This seems to work fine for STA but not HT/20 AP mode.

Further discussion with net80211 people will need to take place
to ensure that the right flags are set based on the negotiated
capabilities of the remote peer, rather than whatever the local
parameters are.

Sending short-gi frames in 20mhz may work on some chips but
it certainly isn't supported on anything currently supported
by the HAL; and sending HT40 frames in HT20 mode just plain
won't work.
2011-03-25 04:15:30 +00:00
Adrian Chadd
7dd51df82f After discussion with Felix Fietkau (nbd) about the ath9k Merlin LNA bit
settings, it seems that our defines are backwards and don't match what
is in the EEPROM documentation or internal driver.

The ath9k code used to have a bitfield here, rather than a uint8_t, and
there were #defines used to swap the order based on the endian of the
platform - this wasn't because of nybble or bit ordering of the
underlying host but because of what the compiler was doing.

This may be the reason for the backwards field numbers, as ath9k had
similar issues.
2011-03-25 00:45:24 +00:00
Adrian Chadd
423c974c28 Flip ANI on for the AR5416 and later chips. I haven't verified it on
the AR9285 so I'll leave it off for that.

Ath9k sources indiciate that one of the ANI modes interferes with
RIFS detection, so match ath9k and disable that.
2011-03-25 00:40:08 +00:00
Adrian Chadd
24cfde2fc3 The right commit - add a couple more AR_PCU_MISC_MODE2 register bits -
SOWL specific.
2011-03-25 00:06:58 +00:00
Adrian Chadd
30fa312b45 oops, commited the wrong file change. 2011-03-25 00:06:19 +00:00
Adrian Chadd
c2a1d035e6 Add some more AR_PCU_MISC_MODE2 register settings - these are SOWL or later. 2011-03-25 00:05:26 +00:00
Adrian Chadd
6893df4146 Bring over interrupt mitigation changes from ath9k.
* The existing interrupt mitigation code didn't mitigate anything - the
  per-packet TX/RX interrupts are still occuring. It's possible this
  worked for the AR5416 but not any later chipsets; I'll investigate and
  update as needed.

* Set both the RX and TX threshold registers whilst I'm at it.

This is verified to work on the AR9220 and AR9160. I'm leaving it off
by default in case it's truely broken, but I need to have it enabled
when doing 11n testing or interrupt loads exceed 10,000 interrupts/sec.
2011-03-25 00:03:21 +00:00
Adrian Chadd
7b83029b7b Flip back HT/40 and Short-GI (for 40mhz operation). These are now verified to work. 2011-03-24 16:06:54 +00:00
Alexander Motin
92b7c16c73 MFgraid/head r218174:
Add simple in-kernel API for controlling leds.
2011-03-24 08:56:12 +00:00
Hans Petter Selasky
996c27355c Fix typo.
Reported by:	Garrett Cooper
MFC after:	14 days
Approved by:	thompsa (mentor)
2011-03-24 07:59:21 +00:00
Adrian Chadd
646640c5f4 Fix a completely wrong variable reference. 2011-03-24 04:57:35 +00:00
Navdeep Parhar
7eeb16cee7 t3_free_sge_resources should be given the number of qsets it needs to free.
MFC after:	1 week
2011-03-24 01:16:48 +00:00
Navdeep Parhar
2b3b9558ef T3C initialization should setup the parity fence too.
MFC after:	1 week
2011-03-24 01:13:28 +00:00
Navdeep Parhar
a91fea93ad Do not over-allocate MSI interrupts for the case where each ingress
queue has its own interrupt.  If the exact number that we need is not a
power of 2 and we're using MSI, then switch to interrupt multiplexing.

While here, replace the magic numbers with something more readable.

MFC after:	3 days
2011-03-24 01:03:01 +00:00
Adrian Chadd
ef58d1e0b8 Make the ar2133ForceBias() call controllable at runtime.
At least one AR5416 user has reported measurable throughput drops
with this option. For now, disable it and make it a run-time
twiddle. It won't take affect until the next radio programming
trip though (eg channel scan, channel change.)
2011-03-23 23:48:44 +00:00
Pyun YongHyeon
784ae1fdd1 Remove unused DMA map/tag in softc. 2011-03-23 22:06:09 +00:00
Hans Petter Selasky
ca794e7847 Comply with style(9).
Reported by:	gavin
MFC after:	14 days
Approved by:	thompsa (mentor)
2011-03-23 19:41:44 +00:00
John Baldwin
3b0a4aef96 Do a sweep of the tree replacing calls to pci_find_extcap() with calls to
pci_find_cap() instead.
2011-03-23 13:10:15 +00:00
Adrian Chadd
d4c081e362 The AR5416+ chips all have MIB counters (which the AR5416 ANI code assumes)
so there's no need to enable the RX of invalid frames just to do ANI.

The if_ath code and AR5212 ANI code setup the RX filter bits to enable
receiving OFDM/CCK errors if the device doesn't have the hardware
MIB counters. It isn't initialising it for the AR5416+ because all of
those chips have hardware MIB counters.

This fixes the odd (and performance affecting!) situation where if ani
is enabled (via sysctl dev.ath.X.intmit) then suddenly there's be a very
large volume of phy errors - which is good to track, but not what was
intended. Since each PHY error is a received (0 length) frame, it can
significantly tie up the RX side of things.
2011-03-23 03:58:55 +00:00
Adrian Chadd
6aa113fd36 Enable setting the MCS rate bit for ast_tx_rate.
This allows ath_stats to print the MCS rate when TX'ing.
2011-03-22 22:59:09 +00:00
Navdeep Parhar
9f1f7ec9a8 Fix an error while constructing the table that maps context id -> egress
queue.

MFC after:	1 day
2011-03-22 21:05:56 +00:00
Adrian Chadd
1198947acd Clean up setting the short preamble bit in the rate - this way it
is very obvious (and cleanly so) that it occurs for non-11n rates.
2011-03-22 13:39:00 +00:00
Adrian Chadd
27ab76d69c Flip this over to be a configurable option for people who wish to play with it.
It's still not ready for prime-time - there's some TX niggles with these 11n
cards that I'm still trying to wrap my head around, and AMPDU-TX is just not
implemented so things will come to a crashing halt if you're not careful.
2011-03-22 13:35:56 +00:00
Adrian Chadd
44a3316e1f This isn't actually needed any longer, A-MPDU frames work fine if only tagged for 11n nodes. 2011-03-22 13:20:11 +00:00
John Baldwin
e786cbfdd2 Rename pci_find_extcap() to pci_find_cap(). PCI now uses the term
"extended capabilities" to refer to the new set of capability structures
starting at offset 0x100 in config space for PCI-express devices.  For now
both function names will still work.  I will merge this to older branches
to ease driver portability, but 9.0 will ship with a new pci_find_extcap()
function that locates extended capabilities instead.

Reviewed by:	imp
MFC after:	1 week
2011-03-22 12:05:49 +00:00
Adrian Chadd
f6f59583bf Bring over an XPA (external power amplifer) bias fix for the AR9160.
This fix modifies the const addac initval array, rather than modifying
a local copy. It means that running >1 AR9160 on a board may prove to
be unpredictable.

The AR5416 init path also does something similar, so supporting
>1 AR5416 of different revisions could cause problems.

The later fix will be to create a private copy of the Addac data
for the AR5416, AR9160 (and AR9100 when it's merged in) and then
modify that as needed.

Obtained From:	Linux ath9k
2011-03-22 10:29:36 +00:00
Adrian Chadd
507de8028f Fix OFDM ANI statistics gathering for the AR5416 and later chips.
I found this when trying to figure out why the RX PHY error count
didn't match the OFDM error count ANI was using. It turns out
there was two problems:

* What this commit addresses - using the wrong mask for OFDM errors,
  and
* The RX filter is set incorrectly after a channel scan (at least)
  even if interference mitigation is enabled by default.

ANI is still disabled by default for the AR5416 and later chips.
2011-03-22 07:19:49 +00:00
Adrian Chadd
fdb9c24c19 Set the "right" CCA register.
Obtained From:	ath9k
2011-03-22 05:47:48 +00:00
Adrian Chadd
6359b5731c Break out the RF mode setup into ar5416SetRfMode(), mirroring what ath9k does. 2011-03-22 00:52:44 +00:00
Adrian Chadd
b335ecffa2 Do a bit of spring cleaning in the board setup code, just to
bring it in line with the rest of the register initialisation.

I've verified that the 2/5ghz board values written to the
chip match what was previously written.
2011-03-22 00:43:58 +00:00
Adrian Chadd
dca968a2ce Bring over a few queue changes from ath9k:
* add pspoll/uapsd queue setup defaults;
* enable the exponential backoff window rather than the random
  backoff window when doing TX contention management.
2011-03-22 00:14:17 +00:00
Adrian Chadd
299bb4987b Even though it's very unlikely the misc mode register setting at -attach-
would be a problem, make sure it isn't overwritten by whatever is in
there at cold reset.

This brings the > ar5416 init path treatment of AR_MISC_MODE.
2011-03-22 00:12:26 +00:00
Adrian Chadd
fecc2a5eea Remove the merlin delay workaround here, it isn't appropriate for
the analog bank writes as Merlin never does them.
2011-03-22 00:11:04 +00:00
Hans Petter Selasky
b635069c09 - Do not output the trailing newline to the HID
report descriptor information, sysctl utility
  will show it for us.
- Modify sysctl node description to make it more
  understanable.

Found by:	Alexander Best <arundel@freebsd.org>
Submitted by:	Eygene Ryabinkin <rea@freebsd.org>
MFC after:	14 days
Approved by:	thompsa (mentor)
2011-03-21 21:34:12 +00:00
Hans Petter Selasky
dbe63d3a27 - Bugfix: Fix a EHCI hardware race, where the hardware computed data toggle
value is updated after that we read it in the queue-head. This patch can
fix problems with BULK timeouts. The issue was found on a Nvidia chipset.

MFC after:	14 days
Approved by:	thompsa (mentor)
2011-03-21 21:16:25 +00:00
Adrian Chadd
1f0caefd53 Back that commit out - something's broken, and I need to figure out
what/why.
2011-03-21 17:44:52 +00:00