Commit Graph

115 Commits

Author SHA1 Message Date
Nathan Whitehorn
3df9e0375a Get nexus(4) out of the RTC business. The interface used by nexus(4)
in Open Firmware was Apple-specific, and we have complete coverage of Apple
system controllers, so move RTC responsibilities into the system controller
drivers. This avoids interesting problems from manipulating these devices
through Open Firmware behind the backs of their drivers.

Obtained from:	NetBSD
MFC after:	2 weeks
2010-03-23 03:14:44 +00:00
Nathan Whitehorn
d2f1e0e4a5 Let unin(4) attach to U3 controllers found on G5 machines.
Submitted by:	Andreas Tobler
2010-03-20 03:58:00 +00:00
Nathan Whitehorn
98dc296435 Rework smu(4) to be asynchronous. It turns out that the combination of
the automatic fan management and the polling in smu_run_cmd() was
putting my system interrupt load at 20%. This change reduces that to
0.4%.
2010-03-04 06:36:00 +00:00
Nathan Whitehorn
823d02a093 Add the ability to set SMU-based machines to restart automatically after
power loss.
2010-02-24 01:27:36 +00:00
Nathan Whitehorn
90a1456b12 Provide a new useless feature: an led(4) interface for the system's sleep
LED.
2010-02-22 18:49:43 +00:00
Nathan Whitehorn
f41c8c170f Add a simple fan management callout to the SMU driver. This is designed
such that a fancier thermal management algorithm can be run from user
space, but the kernel will at least ensure your machine does not either
sound like a wind tunnel or catch fire.
2010-02-21 22:13:57 +00:00
Nathan Whitehorn
ddc58b9379 Fix several mistakes in this file, in order to allow individual fan speeds
to be read and set correctly.
2010-02-21 21:03:37 +00:00
Nathan Whitehorn
6abc7eb7f7 Allow the SMU driver to read a variety of hardware sensors (possible
questions on the thermal calibration), and to read and set fan RPMs from
software. While here, fix a number of bugs.

Calibration code from:	OpenBSD
MFC after:	2 weeks
2010-02-19 04:37:54 +00:00
Alexander Motin
066f913a94 MFp4:
Introduce ATA_CAM kernel option, turning ata(4) controller drivers into
cam(4) interface modules. When enabled, this options deprecates all ata(4)
peripheral drivers (ad, acd, ...) and interfaces and allows cam(4) drivers
(ada, cd, ...) and interfaces to be natively used instead.

As side effect of this, ata(4) mode setting code was completely rewritten
to make controller API more strict and permit above change. While doing
this, SATA revision was separated from PATA mode. It allows DMA-incapable
SATA devices to operate and makes hw.ata.atapi_dma tunable work again.

Also allow ata(4) controller drivers (except some specific or broken ones)
to handle larger data transfers. Previous constraint of 64K was artificial
and is not really required by PCI ATA BM specification or hardware.

Submitted by:	nwitehorn (powerpc part)
2009-12-06 00:10:13 +00:00
Nathan Whitehorn
37a7f59644 Allow Heathrow-based machines to boot a kernel containing option SMP
without panicing.
2009-10-24 18:31:22 +00:00
Nathan Whitehorn
1016f143f0 Add cpufreq support on the PowerPC G5, along with a skeleton SMU driver
in order to slew CPU voltage during frequency changes. The OpenBSD SMU
driver was an extremely helpful reference for this.
2009-06-23 04:28:32 +00:00
Andriy Gapon
65f4467938 strict kobj signatures: fix adb_hb_controller_poll impl in powermac
the method return u_int, not void

Reviewed by:	imp, current@
Approved by:	jhb (mentor)
2009-06-11 17:16:04 +00:00
Nathan Whitehorn
1165ddc233 Provide an analogous sysctl to hw.acpi.acline (dev.pmu.0.acline) to
determine whether the computer is plugged in to mains power.
2009-05-31 10:02:20 +00:00
Nathan Whitehorn
9eb9db93da Introduce support for cpufreq on PowerPC with the dynamic frequency
switching capabilities of the MPC7447A and MPC7448.
2009-05-31 09:01:23 +00:00
Nathan Whitehorn
1c96bdd146 Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by:    grehan
2009-04-04 00:22:44 +00:00
Nathan Whitehorn
09b29530db Disable ATA DMA for ATAPI devices for now. Apparently, certain revisions
of this controller, in combination with certain ATAPI devices and phases
of the moon, will cause DMA operations for ATAPI to fail.
2009-03-25 03:42:49 +00:00
Nathan Whitehorn
d0ed4b9d09 Fix a race condition in kiic(4) made possible by the way the device's STOP
condition is sent. We used to put the bus in the STOP state, but returned
without waiting for that to actually occur.

Submitted by:	Marco Trillo
2009-01-20 14:09:12 +00:00
Nathan Whitehorn
717b010f87 Provide a device description for macio-attached ATA cells. 2009-01-19 23:25:18 +00:00
Nathan Whitehorn
a9cade51ed Driver for Apple Keywest I2C controllers found in MacIO ASICs. Used for
power and thermal control, as well as GPIOs on Xserves and controlling
sound codecs for Apple built-in audio.

Submitted by:	Marco Trillo
Obtained from:	NetBSD
2009-01-15 02:52:31 +00:00
Nathan Whitehorn
48ed71b9e3 Some early Macintosh GPIO controllers don't provide reg properties for
interrupt-only GPIOs. Honor this, and allow interrupt attachment, but not
read/write access for such devices.

Reported by:	Niels Eliasen
2009-01-12 01:36:01 +00:00
Nathan Whitehorn
f3b0e83454 Add a new quirk type so that the MacIO driver will assign memory resources
belonging to a devices children, in analogy to the way we handle interrupts
for SCC serial devices. This is required to counteract overly deep nesting
on onboard audio devices.

Submitted by:	Marco Trillo
2009-01-06 01:54:57 +00:00
Nathan Whitehorn
acb97117e3 Fix the OFW interrupt map parser to use its own idea of the number of interrupt
cells in the map, instead of using a value passed to it and then panicing if it
disagrees. This fixes interrupt map parsing for PCI bridges on some Apple
Uninorth PCI controllers.

Reported by:	marcel
Tested on:	G4 iBook, Sun Ultra 5
2009-01-03 19:38:47 +00:00
Nathan Whitehorn
94b4a038a1 Adapt parts of the sparc64 Open Firmware bus enumeration code (in particular,
the code for parsing interrupt maps) to PowerPC and reflect their new MI
status by moving them to the shared dev/ofw directory.

This commit also modifies the OFW PCI enumeration procedure on PowerPC to
allow the bus to find non-firmware-enumerated devices that Apple likes to add,
and adds some useful Open Firmware properties (compat and name) to the pnpinfo
string of children on OFW SBus, EBus, PCI, and MacIO links. Because of the
change to PCI enumeration on PowerPC, X has started working again on PPC
machines with Grackle hostbridges.

Reviewed by:	marius
Obtained from:	sparc64
2008-12-15 15:31:10 +00:00
Nathan Whitehorn
011ad8e791 Use a static free packet queue instead of using malloc() to allocate new ADB packets.
This fixes some locking problems.
2008-12-13 18:49:01 +00:00
Nathan Whitehorn
a228f5cd36 Add the ability to control the sleep LED with led(4). Adding this fairly
useless feature gives us a reasonably complete PMU implementation.
2008-12-09 01:01:02 +00:00
Nathan Whitehorn
ecf558fd14 Clean up the mac GPIO interface a little. Also remove bogus copyright
and 3rd license clause.

Submitted by:	Marco Trillo
2008-12-08 03:00:45 +00:00
Nathan Whitehorn
eff47708ef Add facilities to pmu(4) to interrogate battery status on Apple PowerPC
laptops. This includes battery presence detection, charging status, current
and voltage readouts, and charge level indication. The sysctl interface
is somewhat ACPI-like.
2008-12-08 02:37:08 +00:00
Nathan Whitehorn
1af2e19172 Add support for automated reboot after power failure on Apple Core99 machines
(G3 laptops, all G4 machines, early G5s, G5 Xserves). The relevant sysctl
is named dev.pmu.0.server_mode for mental compatibility with Linux.
2008-12-07 00:42:15 +00:00
Nathan Whitehorn
582434bd08 Fix some nasty race conditions in the VIA-CUDA driver that ended up preventing
my right mouse button and keyboard LEDs from working due to mangled
configuration packets. Fixed several other races and associated problems in the
main ADB stack that were exposed while fixing this.
2008-12-06 23:26:02 +00:00
Nathan Whitehorn
014186973a Fix some possible infinite loops in the ADB code, and remove some hacks
that were inserted in desperation during bring-up. In addition, move ADB bus
enumeration and child attachment to when interrupts are available.
2008-10-30 15:27:13 +00:00
Nathan Whitehorn
360bf6787a DBDMA can transfer a maximum of 64K - 1 bytes per descriptor, as the byte
count field is 16 bits. Inform ATA of this fact.

Reported by:	Marco Trillo
2008-10-28 22:09:30 +00:00
Nathan Whitehorn
4a8c139140 Clean up some magic numbers in the DBDMA code by replacing them with
appropriately defined constants.

Suggested by:	gnn
2008-10-27 23:11:14 +00:00
Nathan Whitehorn
e865720075 Bring Kauai ATA driver in line with Macio ATA by reading the PIO config reg
to set the initial PIO mode instead of assuming PIO4. There are still a few
nagging issues:

- There are some problems with 64 K DMA transfers waiting on lower level
changes.

- ATAPI DMA is broken on Marcel's Mac Mini because we need an ATA SELECT hook
propagated up to individual drivers for hardware without timing registers for
each ATA channel.
2008-10-27 00:09:14 +00:00
Nathan Whitehorn
b4dbc59983 Add ADB support. This provides support for the external ADB bus on the PowerMac
G3 as well as the internal ADB keyboard and mice in PowerBooks and iBooks. This
also brings in Mac GPIO support, for which we should eventually have a better
interface.

Obtained from:  NetBSD (CUDA and PMU drivers)
2008-10-26 19:37:38 +00:00
Nathan Whitehorn
51d163d3e9 Convert PowerPC AIM PCI and nexus busses to standard OFW bus interface. This
simplifies certain device attachments (Kauai ATA, for instance), and makes
possible others on new hardware.

On G5 systems, there are several otherwise standard PCI devices
(Serverworks SATA) that will not allow their interrupt properties to be
written, so this information must be supplied directly from Open Firmware.

Obtained from:	sparc64
2008-10-14 14:54:14 +00:00
Nathan Whitehorn
b798355b99 Expand the DBDMA API to allow setting device-dependent control bits. While
here, clean up and document this a little.

Submitted by:	Marco Trillo
MFC after:	1 week
2008-09-27 15:41:16 +00:00
Nathan Whitehorn
b7382e099d Add DMA support for Apple built-in ATA controllers.
Tested by:	grehan, marcotrillo@gmail.com
MFC after:	1 month
2008-09-27 15:13:44 +00:00
Nathan Whitehorn
f1dea04adb Change the DBDMA API to allow DBDMA registers in a subregion of a resource. This is necessary to allow future support of DMA for the various Apple on-board ATA controllers.
MFC after:	1 week
2008-09-23 02:12:47 +00:00
Kevin Lo
bda386db88 Return an error code rather than ENXIO when both rman_init() and
rman_manage_region() failed.

Reviewed by:	marcel
2008-06-12 02:28:58 +00:00
Marcel Moolenaar
7d8ccad797 Add support for Apple's Descriptor-Based DMA (DBDMA) engine. The DMA
engine is usful to various  existing drivers, such as ata(4) and scc(4),
and is used bhy the soon to be added bm(4).

Submitted by:	Nathan Whitehorn
2008-06-07 21:56:48 +00:00
Marcel Moolenaar
4924db935d Take into account the size of the interrupt cell. It's determined
by the parent for interrupt resources. This corrects parsing of
the interrupts property.

With parsing of the property fixed, add all interrupts to the
resource list. Bump the max. number of interrupts from 5 to 6
as scc(4) attached to macio(4) has 6 interrupts (3 per channel).

Submitted by: Nathan Whitehorn <nathanw@uchicago.edu>
2008-04-26 18:35:44 +00:00
Marcel Moolenaar
d6f5929710 Add support for the BUS_CONFIG_INTR() method to the platform and to
openpic(4). Make use of it in ocpbus(4). On the MPC85xxCDS, IRQ0:4
are active-low.
2008-03-07 22:08:43 +00:00
Marcel Moolenaar
05c62b81bf Add PIC support for IPIs. When registering an interrupt handler,
the PIC also informs the platform at which IRQ level it can start
assigning IPIs, since this can depend on the number of IRQs
supported for external interrupts.
2008-02-12 18:14:46 +00:00
Julian Elischer
a4fcb5ec11 One of my powerbooks has this chip in it..
Confirmed by looking at netbsd.. they have also added this.
checked by grehen
MFC After: 3 days
2008-01-26 05:11:09 +00:00
Robert Watson
3de213cc00 Add a new 'why' argument to kdb_enter(), and a set of constants to use
for that argument.  This will allow DDB to detect the broad category of
reason why the debugger has been entered, which it can use for the
purposes of deciding which DDB script to run.

Assign approximate why values to all current consumers of the
kdb_enter() interface.
2007-12-25 17:52:02 +00:00
Marcel Moolenaar
69643a41ac Apply missing s/rv/res/g in previous commit. 2007-12-21 00:23:23 +00:00
John Baldwin
7439d1d9f0 MFamd64/ia64/i386: Only set the rman bus tags and handles in
bus_activate_resource() methods instead of splitting it up between
bus_alloc_resource() and bus_activate_resource().

Glanced at by:	marcel
2007-12-20 21:42:43 +00:00
Marcel Moolenaar
de2fa7b8af Redefine bus_space_tag_t on PowerPC from a 32-bit integral to
a pointer to struct bus_space. The structure contains function
pointers that do the actual bus space access.

The reason for this change is that previously all bus space
accesses were little endian (i.e. had an explicit byte-swap
for multi-byte accesses), because all busses on Macs are little
endian.
The upcoming support for Book E, and in particular the E500
core, requires support for big-endian busses because all
embedded peripherals are in the native byte-order.

With this change, there's no distinction between I/O port
space and memory mapped I/O. PowerPC doesn't have I/O port
space. Busses assign tags based on the byte-order only.
For that purpose, two global structures exist (bs_be_tag and
bs_le_tag), of which the address can be taken to get a valid
tag.

Obtained from: Juniper, Semihalf
2007-12-19 18:00:50 +00:00
Marius Strobl
55aaf894e8 Make the PCI code aware of PCI domains (aka PCI segments) so we can
support machines having multiple independently numbered PCI domains
and don't support reenumeration without ambiguity amongst the
devices as seen by the OS and represented by PCI location strings.
This includes introducing a function pci_find_dbsf(9) which works
like pci_find_bsf(9) but additionally takes a domain number argument
and limiting pci_find_bsf(9) to only search devices in domain 0 (the
only domain in single-domain systems). Bge(4) and ofw_pcibus(4) are
changed to use pci_find_dbsf(9) instead of pci_find_bsf(9) in order
to no longer report false positives when searching for siblings and
dupe devices in the same domain respectively.
Along with this change the sole host-PCI bridge driver converted to
actually make use of PCI domain support is uninorth(4), the others
continue to use domain 0 only for now and need to be converted as
appropriate later on.
Note that this means that the format of the location strings as used
by pciconf(8) has been changed and that consumers of <sys/pciio.h>
potentially need to be recompiled.

Suggested by:	jhb
Reviewed by:	grehan, jhb, marcel
Approved by:	re (kensmith), jhb (PCI maintainer hat)
2007-09-30 11:05:18 +00:00
Marcel Moolenaar
77d40ffd98 Revamp the interrupt handling in support of INTR_FILTER. This includes:
o  Revamp the PIC I/F to only abstract the PIC hardware. The
   resource handling has been moved to nexus, where it belongs.
o  Include EOI and MASK+EOI methods to the PIC I/F in support of
   INTR_FILTER.
o  With the allocation of interrupt resources and setup of
   interrupt handlers in the common platform code we can delay
   talking to the PIC hardware after enumeration of all devices.
   Introduce a call to powerpc_intr_enable() in configure_final()
   to achieve that and have powerpc_setup_intr() only program the
   PIC when !cold.
o  As a consequence of the above, remove all early_attach() glue
   from the OpenPIC and Heathrow PIC drivers and have them
   register themselves when they're found during enumeration.
o  Decouple the interrupt vector from the interrupt request line.
   Allocate vectors increasingly so that they can be used for
   the intrcnt index as well. Extend the Heathrow PIC driver to
   translate between IRQ and vector. The OpenPIC driver already
   has the support for vectors in hardware.

Approved by: re (blanket)
2007-08-11 19:25:32 +00:00