Commit Graph

307 Commits

Author SHA1 Message Date
Warner Losh
97b83d313d Ugly hack to get this to compile. I'm sure there's a better way... 2009-09-09 03:57:10 +00:00
Warner Losh
90d1a51534 First half of making this 64-bit clean: fix prototypes. 2009-09-09 03:54:55 +00:00
Warner Losh
eeebbca3a3 Set the ldscript for malta64 correctly. 2009-09-09 00:50:17 +00:00
Oleksandr Tymoshenko
cbd59a4f65 - MFC from head@196987 2009-09-08 19:15:29 +00:00
Oleksandr Tymoshenko
01316fcb76 - Add commented hint required for RouterStation(non PRO) board 2009-09-08 05:24:09 +00:00
Oleksandr Tymoshenko
002c0b94ea - Clean out some XXXMIPS comments that's not relevant now 2009-09-04 19:02:11 +00:00
Sam Leffler
6dbde1f3f9 o enable mesh support
o add bridge support
o no need for explicit ar5212 support; ath_hal drags it in
2009-09-03 23:04:33 +00:00
Oleksandr Tymoshenko
a7420595db - Remove flags accidently brought by dumb cut'n'paste coding 2009-09-03 18:27:55 +00:00
Oleksandr Tymoshenko
d0c60705f1 - Fix phy address calculation 2009-09-03 18:23:23 +00:00
Warner Losh
2004aa74c3 Implement platform_reset. Also, make the code a tiny bit easier to
read with ninja-C magic coupled with an illuminating comment.
2009-08-17 12:23:58 +00:00
Warner Losh
a54c4d8590 suword64 and csuword64. Needed by ELF64 stuff... 2009-08-17 12:14:40 +00:00
Warner Losh
e47ea02f05 (1) Fix a few 32/64-bit bugs.
(2) Also, always allocate 2 pages for the stack to optimize TLB usage.

Submitted by:	neel@ (2)
2009-08-15 22:51:11 +00:00
Warner Losh
bcd2a38933 Various 32/64-bit confusion cleanups. 2009-08-15 22:48:09 +00:00
Warner Losh
fa1d3852f7 (1) Some CPUs have a range to map I/O cyces on the pci bus. So allow
them to work by allowding the nexus to assign ports.
(2) Remove some Octeon junk that shouldn't be necessary.

Submitted by:	neel@ (#1) for SB1 port.
2009-08-15 22:45:46 +00:00
Warner Losh
8a81b70752 First cut at a platform_start. It is likely wrong, but it is better
than nothing :)
2009-08-15 21:42:04 +00:00
Warner Losh
1cc75127dc The UART device infrasturcture wants these defined. Define them just
like we do in Malta.  We may want to look at consolidating things
because *ALL* mips will *ALWAYS* be memory mapped.  The only wrinkle
is that the tag may need to be a custom one (see endian issues with
the Atheros port for one example).
2009-08-15 19:48:14 +00:00
Warner Losh
6d53fe9b81 Use new ldscript.mips.mips64
Also, declare this to be a 64-bit target.

We get to the final link now and die in the linker script..
2009-08-15 04:29:18 +00:00
Warner Losh
232f85fdf4 Include Octeon specific registers since we mess with them here... 2009-08-15 02:03:41 +00:00
Warner Losh
19aa4fea4c Fix style error replicated multiple times. Move to
mips_bus_space_generic for octeon obio impl.
2009-08-15 01:03:13 +00:00
Warner Losh
778355f6c1 (u_int) is the wrong type here. Use unsigned long instead, even
though that's only less wrong...

# This gets the kernel building again to the point it was at before
# the last IFC for the OCTEON1 kernel config.
2009-08-14 16:15:18 +00:00
Warner Losh
323ba97c65 Use unsigned long instead of unsigned for the integer casts here. The
former works for both ILP32 and LP64 programming models, while the
latter fails LP64.

# uintpr_t is better, but iirc, we can't pollute the name space to use it
# I likely need to audit all my uintptr_t changes for that issue...
2009-08-13 19:47:13 +00:00
Attilio Rao
dc6fbf6545 * Completely Remove the option STOP_NMI from the kernel. This option
has proven to have a good effect when entering KDB by using a NMI,
but it completely violates all the good rules about interrupts
disabled while holding a spinlock in other occasions.  This can be the
cause of deadlocks on events where a normal IPI_STOP is expected.
* Adds an new IPI called IPI_STOP_HARD on all the supported architectures.
This IPI is responsible for sending a stop message among CPUs using a
privileged channel when disponible. In other cases it just does match a
normal IPI_STOP.
Right now the IPI_STOP_HARD functionality uses a NMI on ia32 and amd64
architectures, while on the other has a normal IPI_STOP effect. It is
responsibility of maintainers to eventually implement an hard stop
when necessary and possible.
* Use the new IPI facility in order to implement a new userend SMP kernel
function called stop_cpus_hard(). That is specular to stop_cpu() but
it does use the privileged channel for the stopping facility.
* Let KDB use the newly introduced function stop_cpus_hard() and leave
stop_cpus() for all the other cases
* Disable interrupts on CPU0 when starting the process of APs suspension.
* Style cleanup and comments adding

This patch should fix the reboot/shutdown deadlocks many users are
constantly reporting on mailing lists.

Please don't forget to update your config file with the STOP_NMI
option removal

Reviewed by:	jhb
Tested by:	pho, bz, rink
Approved by:	re (kib)
2009-08-13 17:09:45 +00:00
Oleksandr Tymoshenko
5bbfa759e2 - Make i/d cache size field 32-bit to prevent overflow
Submited by: Neelkanth Natu
2009-08-10 01:49:59 +00:00
Oleksandr Tymoshenko
11e9b8bad1 - MFC @196061 2009-08-04 18:22:58 +00:00
Oleksandr Tymoshenko
8f0bf9b807 - Use register_t for registers values 2009-08-04 17:32:55 +00:00
Oleksandr Tymoshenko
143acbd6fe - Make USB part of AR71XX kernel buildable again 2009-07-30 23:54:00 +00:00
Oleksandr Tymoshenko
13a77922c8 - Properly unwind stack for functions with __noreturn__ attribute
Submitted by:	Neelkanth Natu <neelnatu@yahoo.com>
2009-07-30 23:48:29 +00:00
Oleksandr Tymoshenko
1367982697 - mark map as coherent if requested by flags
- explicitly set memory allocation method in map flags instead
    of duplicating conditions for malloc/contigalloc
2009-07-30 23:29:59 +00:00
John Baldwin
013818111a Add a new type of VM object: OBJT_SG. An OBJT_SG object is very similar to
a device pager (OBJT_DEVICE) object in that it uses fictitious pages to
provide aliases to other memory addresses.  The primary difference is that
it uses an sglist(9) to determine the physical addresses for a given offset
into the object instead of invoking the d_mmap() method in a device driver.

Reviewed by:	alc
Approved by:	re (kensmith)
MFC after:	2 weeks
2009-07-24 13:50:29 +00:00
Alan Cox
3153e878dd Add support to the virtual memory system for configuring machine-
dependent memory attributes:

Rename vm_cache_mode_t to vm_memattr_t.  The new name reflects the
fact that there are machine-dependent memory attributes that have
nothing to do with controlling the cache's behavior.

Introduce vm_object_set_memattr() for setting the default memory
attributes that will be given to an object's pages.

Introduce and use pmap_page_{get,set}_memattr() for getting and
setting a page's machine-dependent memory attributes.  Add full
support for these functions on amd64 and i386 and stubs for them on
the other architectures.  The function pmap_page_set_memattr() is also
responsible for any other machine-dependent aspects of changing a
page's memory attributes, such as flushing the cache or updating the
direct map.  The uses include kmem_alloc_contig(), vm_page_alloc(),
and the device pager:

  kmem_alloc_contig() can now be used to allocate kernel memory with
  non-default memory attributes on amd64 and i386.

  vm_page_alloc() and the device pager will set the memory attributes
  for the real or fictitious page according to the object's default
  memory attributes.

Update the various pmap functions on amd64 and i386 that map pages to
incorporate each page's memory attributes in the mapping.

Notes: (1) Inherent to this design are safety features that prevent
the specification of inconsistent memory attributes by different
mappings on amd64 and i386.  In addition, the device pager provides a
warning when a device driver creates a fictitious page with memory
attributes that are inconsistent with the real page that the
fictitious page is an alias for. (2) Storing the machine-dependent
memory attributes for amd64 and i386 as a dedicated "int" in "struct
md_page" represents a compromise between space efficiency and the ease
of MFCing these changes to RELENG_7.

In collaboration with: jhb

Approved by:	re (kib)
2009-07-12 23:31:20 +00:00
Warner Losh
1e0b0febf6 Use PTR_* macros for pointers, and not potentially mips64 unsafe
operations.
2009-07-10 19:09:34 +00:00
Warner Losh
de13b5d0f9 Use PTR_* macros to deal with pointers. 2009-07-10 19:08:48 +00:00
Warner Losh
df92abe375 fix prototype for MipsEmulateBranch. 2009-07-10 19:07:07 +00:00
Warner Losh
4d8c18e0d7 Better definitions for a few types for n32/n64. 2009-07-10 19:06:43 +00:00
Warner Losh
52efe5c569 Fixed aligned macros...
# I'm not sure bde will like this, but I want to commit it for others to review
# as well. :)
2009-07-10 19:06:15 +00:00
Warner Losh
ec55ba21ce use ta0-ta3 rather than t4-t7 for n32/n64 goodness. 2009-07-10 19:04:32 +00:00
Warner Losh
f0bb71694b Flag this as a 64-bit build.
# Too many flagas needed to build 64-bit, plus different endian, etc.  The
# makefile is getting kinda gross with ifdefs.
2009-07-10 07:19:30 +00:00
Oleksandr Tymoshenko
4bdb59f342 - Add AR71XX watchdog timer driver 2009-07-09 20:16:01 +00:00
Oleksandr Tymoshenko
61bfa4ba5d - Move CPU/AHB frequency calculations to functions to
prevent code duplication
2009-07-09 20:11:26 +00:00
Oleksandr Tymoshenko
6adaa2749f - Ooops, this debug code wasn't supposed to get into
final commit. My appologises.
2009-07-09 19:02:17 +00:00
Warner Losh
e4bd1497e0 Add support for compiling MALTA as mips64.
# MALTA64 builds, but doesn't link yet.
2009-07-09 15:05:50 +00:00
Warner Losh
f332352453 Don't force ISA_MIPS32. 2009-07-09 15:04:52 +00:00
Warner Losh
aacc46585b Make the yamon function pointer stuff 64-bit safe. Make the base
unsigned long, and sign extend the address of the function we're
calling through.
2009-07-09 15:04:24 +00:00
Warner Losh
93b7e55647 Addresses should be unsigned long. Make the address constants
unsigned long.
2009-07-09 14:54:09 +00:00
Oleksandr Tymoshenko
258430ffd1 - Port busdma code from FreeBSD/arm. This is more mature version
that takes into account all limitation to DMA memory (boundaries,
    alignment) and implements bounce pages.
- Add BUS_DMASYNC_POSTREAD case to bus_dmamap_sync_buf
2009-07-08 22:28:36 +00:00
Oleksandr Tymoshenko
63080dcd94 - Fix PCI routing code 2009-07-08 17:20:53 +00:00
Warner Losh
5ac0137013 Fix atomic_store_64 prototype for 64-bit systems. 2009-07-08 06:01:37 +00:00
Warner Losh
902598a268 Turns out this code was right, revert last change. 2009-07-08 06:00:18 +00:00
Oleksandr Tymoshenko
41d99511cb - Fix off-by-one bug in arge_fixup_rx. If mbuf is located
by the end of the page and even number of bytes long,
    that may cause TLBMiss exception for unallocated address.
- Fix mess with DMA sync opeartions
2009-07-08 02:21:08 +00:00
Oleksandr Tymoshenko
b661054728 - Move dpcpu initialization to mips_proc0_init. It's
more appropriate place for it. Besides dpcpu_init
    requires pmap module to be initialized and calling it
    int pmap.c hangs the system
2009-07-07 19:55:09 +00:00