end for isa(4).
o Add a seperate bus frontend for acpi(4) and allow ISA DMA for
it when ISA is configured in the kernel. This allows acpi(4)
attachments in non-ISA configurations, as is possible for ia64.
o Add a seperate bus frontend for pci(4) and detect known single
port parallel cards.
o Merge PC98 specific changes under pc98/cbus into the MI driver.
The changes are minor enough for conditional compilation and
in this form invites better abstraction.
o Have ppc(4) usabled on all platforms, now that ISA specifics
are untangled enough.
even if mode PS/2 is forced with bootflags. As a matter of fact,
chipsets needs some extra configuration for accessing PS/2 mode
from ECP. The current patch is only relevant for generic chipsets
since specific code is supposed to deal with this during detection.
support for relocating the port address if the isa hints specify a
different address from the address the chipset currently has.
Submitted by: Andrew M. Miklic <miklic@ibm.net>
allocate a short port range in some alpha configurations.
Submitted by: "Andrew M. Miklic" <miklic@udlkern.fc.hp.com>,
Mark Abene <phiber@radicalmedia.com>
Note1: the correct interrupt level is invoked correctly for each driver.
For this purpose, drivers request the bus before being able to
call BUS_SETUP_INTR and BUS_TEARDOWN_INTR call is forced by the ppbus
core when drivers release it. Thus, when BUS_SETUP_INTR is called
at ppbus driver level, ppbus checks that the caller owns the
bus and stores the interrupt handler cookie (in order to unregister
it later).
Printing is impossible while plip link is up is still TRUE.
vpo (ZIP driver) and lpt are make in such a way that
using the ZIP and printing concurrently is permitted is also TRUE.
Note2: specific chipset detection is not done by default. PPC_PROBE_CHIPSET
is now needed to force chipset detection. If set, the flags 0x40
still avoid detection at boot.
Port of the pcf(4) driver to the newbus system (was previously directly
connected to the rootbus and attached by a bogus pcf_isa_probe function).
Change microseq offsets. Previously, offsets of the program counter where
added to the index of the current microinstruction. Make them rely on the
index of the next executed microinstruction.
Suggested by: Luigi Rizzo <luigi@labinfo.iet.unipi.it>
+ ECP parallel port chipset FIFO detection
+ DMA+FIFO parallel I/O handled as chipset specific
+ nlpt updated in order to use the above enhanced parallel I/O.
Use 'lptcontrol -e' to use enhanced I/O
+ Various options documented in LINT
+ Full IEEE1284 NIBBLE and BYTE modes support. See ppbus(4) for
an overview of the IEEE1284 standard
+ Detection of PnP parallel devices at boot
+ Read capability added to nlpt driver to get IEEE1284 compliant
printer status with a simple 'cat /dev/lpt0'
+ IEEE1284 peripheral emulation added to BYTE mode. Two computers
may dialog according to IEEE1284 signaling method.
See PERIPH_1284 option and /sys/dev/ppbus/ppi.c
All this code is supposed to provide basic functions for IEEE1284 programming.
ppi.c and nlpt.c may act as examples.
- ppbus now supports PLIP via the if_plip driver
- ieee1284 infrastructure added, including parallel-port PnP
- port microsequencer added, for scripting the sort of port I/O
that is common with parallel devices without endless calls up and down
through the driver structure.
- improved bus ownership behaviour among the ppbus-using drivers.
- improved I/O chipset feature detection
The vpo driver is now implemented using the microsequencer, leading to
some performance improvements as well as providing an extensive example
of its use.
Reviewed by: msmith
Submitted by: Nicolas Souchu <Nicolas.Souchu@prism.uvsq.fr>
