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266 Commits

Author SHA1 Message Date
Robert Noland
b8da61ada5 Add support for Intel Pineview chips, aka IGD 
Slightly modified version of the submitted patch.

PR:		143427
Submitted by:	Mamoru Sumida <msumida@mvc.biglobe.ne.jp>
MFC after:	3 days
 2010-03-13 11:51:18 +00:00
Robert Noland
b1ba33ffbe Welcome drm support for VIA unichrome chips. 
MFC after:	2 weeks
 2010-01-31 14:30:39 +00:00
Robert Noland
139890fd20 Import simple drm memory manager. 
This is required for the VIA driver and at least some parts are needed
for GEM.

MFC after:	2 weeks
 2010-01-31 14:25:29 +00:00
Robert Noland
cfd7bacef2 Update d_mmap() to accept vm_ooffset_t and vm_memattr_t. 
This replaces d_mmap() with the d_mmap2() implementation and also
changes the type of offset to vm_ooffset_t.

Purge d_mmap2().

All driver modules will need to be rebuilt since D_VERSION is also
bumped.

Reviewed by:	jhb@
MFC after:	Not in this lifetime...
 2009-12-29 21:51:28 +00:00
Robert Noland
d2217702c1 Fix botched git -> svn merge. 
MFC after:	2 weeks
 2009-10-30 18:30:13 +00:00
Robert Noland
11de9e8c79 Cleanup in r600_blit 
- Don't bother to assign vb until we know we have enough space
 - Add variables for sx2, sy2, dx2, dy2 so that these aren't
   calculated over and over, also reduce chance of errors.
 - Use switch to assign color/format

MFC after:	3 days
 2009-10-30 18:08:46 +00:00
Robert Noland
29e3ffd4f5 A bit of cleanup work on radeon_freelist_get() 
* Fix the main loop to search all buffers before sleeping.
  * Remove dead code

MFC after:	3 days
 2009-10-30 18:07:22 +00:00
Robert Noland
615fb6e9bc Some general cleanup of scatter/gather memory allocation 
- We don't need to check malloc return values with M_WAITOK
 - remove variables that we don't really need
 - cleanup the error paths by just calling drm_sg_cleanup()
 - fix drm_sg_cleanup() to be safe to call at any time

MFC after:	2 weeks
 2009-10-30 18:02:10 +00:00
Robert Noland
6d68455174 Use system specified memory barriers rather than rolling our own. 2009-10-30 16:59:58 +00:00
Robert Noland
883759335f Fix blitter support for RS880 chips 
MFC after:	3 days
 2009-10-30 16:55:31 +00:00
Christian Brueffer
41d7d5932e Check pointer for NULL before dereferencing it, not after. 
PR:		138383
Submitted by:	Patroklos Argyroudis <argp@census-labs.com>
Reviewed by:	rnoland
MFC after:	1 week
 2009-10-21 15:54:45 +00:00
Robert Noland
33cba7feac Add support for Intel G41 chipset 
Submitted by:	Artyom Mirgorodsky <man@email.com.ua>
MFC after:	3 days
 2009-10-11 01:54:00 +00:00
Robert Noland
0893652a8c Fix offset handling 
MFC after:	1 week
 2009-09-28 22:41:28 +00:00
Robert Noland
3a1f3f56cc radeon_family is an enum, so ordering can be important. 
sync up with what amd is shipping.

MFC after:	1 week
 2009-09-28 22:40:29 +00:00
Robert Noland
d950002723 Fix blit pitch for 4 byte transfers on r600. 
MFC after:	1 week
 2009-09-28 22:38:44 +00:00
Robert Noland
0b6c99683c R600 doesn't support IRQs yet, so don't try to use them. 
MFC after:	1 week
 2009-09-28 22:37:07 +00:00
Robert Noland
14928dda5c Add a couple of small fixes from the AMD folks. 
- max tex height is 8192
	- increment src/dst by the full transfer amount

MFC after:	3 days
 2009-09-13 11:10:38 +00:00
Robert Noland
199e206513 Add missing pci id for Radeon 4850 X2 
MFC after:	3 days
 2009-09-13 11:08:06 +00:00
Robert Noland
e1ec1f53b1 Add GET_PARAM support for Z pipes. 
This is needed for occulsion queries on rv530 chips.

MFC after:	2 weeks
 2009-08-23 15:02:58 +00:00
Robert Noland
f588a0bda5 Add kernel support for Radeon R6/7xx 3D. 
You will still need Mesa from git and possibly an updated DDX driver,
but this is working fairly well now.

MFC after:	2 weeks
 2009-08-23 14:55:57 +00:00
Robert Noland
fe173b46fd Add a read only sysctl tracking the hw.drm.msi tunable. 
MFC after:	2 weeks
 2009-08-23 14:33:12 +00:00
Robert Noland
2418baa339 Clean up the handling of device minors 
Submitted by:	Ed
MFC after:	2 weeks
 2009-08-23 14:31:20 +00:00
Robert Noland
f21c255c2a Clean up the locking in drm_alloc_resource() 
MFC after:	2 weeks
 2009-08-23 14:27:46 +00:00
John Baldwin
a56fe095f0 Temporarily revert the new-bus locking for 8.0 release. It will be 
reintroduced after HEAD is reopened for commits by re@.

Approved by:	re (kib), attilio
 2009-08-20 19:17:53 +00:00
Robert Noland
2aadd82afe Add support for radeon RS880 IGP chips to drm. 
Approved by:	re (kib)
MFC after:	0 days
 2009-08-12 12:57:02 +00:00
Robert Noland
fb6891522e Add some additional radeon pci ids to drm. 
Approved by:	re (kib)
MFC after:	0 days
 2009-08-12 12:50:15 +00:00
Attilio Rao
444b91868b Make the newbus subsystem Giant free by adding the new newbus sxlock. 
The newbus lock is responsible for protecting newbus internIal structures,
device states and devclass flags. It is necessary to hold it when all
such datas are accessed. For the other operations, softc locking should
ensure enough protection to avoid races.

Newbus lock is automatically held when virtual operations on the device
and bus are invoked when loading the driver or when the suspend/resume
take place. For other 'spourious' operations trying to access/modify
the newbus topology, newbus lock needs to be automatically acquired and
dropped.

For the moment Giant is also acquired in some key point (modules subsystem)
in order to avoid problems before the 8.0 release as module handlers could
make assumptions about it. This Giant locking should go just after
the release happens.

Please keep in mind that the public interface can be expanded in order
to provide more support, if there are really necessities at some point
and also some bugs could arise as long as the patch needs a bit of
further testing.

Bump __FreeBSD_version in order to reflect the newbus lock introduction.

Reviewed by:    ed, hps, jhb, imp, mav, scottl
No answer by:   ariff, thompsa, yongari
Tested by:      pho,
                G. Trematerra <giovanni dot trematerra at gmail dot com>,
                Brandon Gooch <jamesbrandongooch at gmail dot com>
Sponsored by:   Yahoo! Incorporated
Approved by:	re (ksmith)
 2009-08-02 14:28:40 +00:00
Robert Noland
87c73f89a9 Add support for Radeon HD 4770 (RV740) chips. 
Approved by:	re@ (kib)
MFC after:	3 days
 2009-07-09 16:39:28 +00:00
Robert Noland
3db57ca311 We shouldn't need to drop and reaquire the lock here. 
MFC after:	3 days
 2009-06-25 19:23:25 +00:00
Robert Noland
a84a56f28b Some more cleanups for vblank code on Intel. 
The Intel 2d driver calls modeset before reinstalling the handler on
a vt switch.  This means that vblank status ends up getting cleared
after it has been setup.  Restore saved values for the pipestat registers
rather than just wiping them out.

MFC after:	3 days
 2009-06-25 18:27:08 +00:00
Robert Noland
a2cc8f993b Initialize max_vblank_count earlier. 
Small cleanup of the error paths while I'm here.

MFC after:	3 days
 2009-06-25 16:17:07 +00:00
Robert Noland
2642e635f2 Keep track of the hardware counter more aggressively while interrupts 
are enabled.  This should help to reduce cases where the hardware
counter reference jumps by large amounts.

MFC after:	3 days
 2009-06-25 15:47:32 +00:00
Robert Noland
a429bdf087 Fix one use of atomic for refcount missed in last commit. 
MFC after:	3 days
 2009-06-25 15:36:11 +00:00
Robert Noland
1f3c8cf88f Additional vblank cleanups. 
Use the vbl_lock when maniputlating the refcount.  Eventually I want to
convert this to use our internal refcount code.  Continue to use atomic
ops for manipulating vblank count since we access it often just for
reading.

MFC after:	3 days
 2009-06-25 15:30:25 +00:00
Robert Noland
a708803975 Ensure that we always hold the lock when calling vblank_disable_fn() 
MFC after:	3 days
 2009-06-25 14:15:45 +00:00
Robert Noland
abcd328be6 Add some sysctl info so that we can see what is going on with vblanks. 
MFC after:	3 days
 2009-06-23 20:19:02 +00:00
Robert Noland
128512d705 Only release irq resources if we were actually using them. 
MFC after:	3 days
 2009-06-23 18:24:09 +00:00
Robert Noland
179ab71fdd Using signals for vblank events is prone to issues. There have never 
been any consumers and likely will never be.  Furthermore, we have
never enabled the code for it, so just get rid of it.

MFC after:	3 days
 2009-06-23 18:09:35 +00:00
Robert Noland
a2d33c4900 Given that vblanks generally occur 60 times a second, waiting 3 seconds 
seems rather excessive.

MFC after:	3 days
 2009-06-23 17:52:41 +00:00
Robert Noland
3a5185e13a vblank[crtc].last represents the hardware counter while request.sequence 
represents the software counter.  Don't currupt things here.

MFC after:	3 days
 2009-06-23 17:50:35 +00:00
Robert Noland
5880b860f8 Hold the lock while we save/restore register for suspend/resume. 
MFC after:	3 days
 2009-06-23 17:38:28 +00:00
Robert Noland
e23637d17b The G45 docs indicate that all G4X chips use the new framecount register. 
Intel agrees with my reading of the docs, make it so for all G4X chips.

The new register also has a 32 bit width as opposed to 24 bits.  Fix
things up so that the counters roll over properly.

MFC after:	3 days
 2009-06-20 16:45:14 +00:00
Robert Noland
e8ca7a9956 realloc() behaves identically to malloc when passed a NULL object pointer 
If an error does occur we would have left max_context with an incorrect
value.

MFC after:	3 days
 2009-06-20 16:40:48 +00:00
Robert Noland
4949d88192 Don't panic if drm_rmmap is called with a NULL map pointer. 
MFC after:	3 days
 2009-06-20 16:37:24 +00:00
Robert Noland
8f6d3bf7a2 Don't try to setup interrupts for drivers that don't support them. 
This causes sis and probably a couple of other driver to panic and fail.

Tested by:	cpghost <cpghost@cordula.ws>
PR:		133554
MFC after:	3 days
 2009-04-19 16:54:33 +00:00
Robert Noland
e12ce94f36 check offsets for R300_ZB_ZPASS_ADDR 
Submitted by:	Maciej Cencora <m.cencora@gmail.com>
MFC after:	3 days
 2009-04-07 22:26:53 +00:00
Robert Noland
3c834e3435 Add regs required for occlusion queries support 
Submitted by:	Maciej Cencora <m.cencora@gmail.com>
MFC after:	3 days
 2009-04-07 22:20:58 +00:00
Robert Noland
27b31641fb Add support for RV790 (HD 4890) asics 
MFC after:	3 days
 2009-04-03 19:23:14 +00:00
Robert Noland
47c63e764d A little more cleanup from AMD, if we don't have the right microcode 
there is no reason to mess with the chip.

MFC after:	3 days
 2009-04-03 19:21:39 +00:00
Robert Noland
0351ecf9e4 Simplify the radeon microcode loading. 
Submitted by:	Christoph Mallon
MFC after:	3 days
 2009-03-31 17:52:05 +00:00
Robert Noland
221478e4c6 We don't know what these pages are going to be used for, they should be 
un-cached.  This got lost somewhere with all the bus_dma fixups.

MFC after:	3 days
 2009-03-30 18:01:42 +00:00
Robert Noland
04edf5eaf1 Load the right microcode for RS780. 
MFC after:	3 days
 2009-03-30 17:49:21 +00:00
Robert Noland
b0f6d6b6bb Fix up waiting on vblank again... This reverts a last minute change that 
I made on the last patch, it seems to upset suspend/resume and shutdown.

MFC after:	3 days
 2009-03-26 02:10:18 +00:00
Robert Noland
24c6d24b27 Rework the management of vblank interrupts a bit. 
When a vt switch occurs the irq handler is uninstalled.  Interrupts
and the state tracking of what was enabled/disabled wasn't working
properly.  This should resolve the reports of "slow windows" after a
vt switch, among other things.  The radeon 2d driver seems to work a
bit more correctly than the Intel driver.  With the Intel driver,
vblank interrupts will be enabled at system startup and will only
be disabled after an additional modeset (vt switch, dpms, randr event).

With this patch, I am able to run glxgears synced to vblank and
vt switch while it is running without ill effects.

MFC after:	3 days
 2009-03-25 01:50:56 +00:00
Robert Noland
a13575a303 Intel handled the management of the breadcrumb counter inconsistently. 
Make sure that we always handle it the same way.

MFC after:	3 days
 2009-03-25 01:44:16 +00:00
Robert Noland
eccb3bb8f6 The GART allocations are a propery of the gart, not of scatter-gather 
memory.  Track them in the appropriate structure.

MFC after:	3 days
 2009-03-25 01:41:56 +00:00
Robert Noland
746871c800 Fix up the flags to bus_dmamem again. The man page incorrectly showed 
the BUS_DMA_NOCACHE flags as being a valid flag for load instead of alloc.

Discussed with:	kib
MFC after:	3 days
 2009-03-22 20:58:29 +00:00
Robert Noland
a80ca4341a vm_offset_t is unsigned, so compare of >= 0 is not needed. 
Found with:	Coverity Prevent(tm)
CID:		2259

MFC after:	3 days
 2009-03-20 18:35:16 +00:00
Robert Noland
0bbcd5ca68 Remove the DRM_ERROR to fix build. It didn't make any sense anyway. 
MFC after:	3 days
 2009-03-20 18:01:32 +00:00
Robert Noland
c8264c8ee2 Fix what appears to be a typo, and restore the registers correctly. 
Found with:	Coverity Prevent(tm)
CID: 		2454
 2009-03-20 17:51:26 +00:00
Robert Noland
363fec5d16 Don't deref dev->dev_private before checking that it exists. 
Found with:	Coverity Prevent(tm)
CID:		2940

MFC after:	3 days
 2009-03-20 17:48:36 +00:00
Robert Noland
c20a7fc9f6 Only issue the wakeup and store the counter if vblank is enabled on 
the pipe.

MFC after:	3 days
 2009-03-20 04:53:12 +00:00
Robert Noland
c2dd8f68b0 Add a couple of radeon pci ids. 
MFC after:	3 days
 2009-03-20 04:49:48 +00:00
Robert Noland
9f85b82ccc Adjust the flags to bus_dmamem around here too. 
MFC after:	3 days
 2009-03-20 04:48:27 +00:00
Robert Noland
470fac3a17 Add some debugging so I can see when syscalls are being restarted 
consistantly.  After a lengthy irc discussion it seems like we
shouldn't need to worry about them, but it's nice to know about.

MFC after:	3 days
 2009-03-19 08:36:08 +00:00
Robert Noland
ea196ecaaa Rework vblank handling to try to resolve some reports of "slow" windows 
after vt switch or suspend.  I can't really test this on Intel right now
but I think I've heard reports of it on radeon as well.  I can't break
it on the radeon here.

MFC after:	3 days
 2009-03-19 08:34:04 +00:00
Robert Noland
324a23e9a2 Sync up the rest of the code that we use with what Intel is shipping 
-Some irq/vblank related changes that hopefully will help.
	-A little more cleanup while I'm here.

MFC after:	3 days
 2009-03-19 08:28:36 +00:00
Robert Noland
5a6ba2ffbc Pull in some suspend / resume changes from Intel's code 
Tested by:	mav@
MFC after:	3 days
 2009-03-19 08:22:56 +00:00
Robert Noland
b38c31bf40 Cast to (unsigned long) to make printf happy on i386 
MFC after:	3 days
 2009-03-17 05:10:12 +00:00
Robert Noland
c921ffc089 Add support for matching solely on vendor id. 
We will use this method with nouveau

MFC after:	3 days
 2009-03-17 03:53:44 +00:00
Robert Noland
f29130e3c2 Improve the debugging output of drm_mmap 
MFC after:	3 days
 2009-03-17 03:50:35 +00:00
Robert Noland
41a7f04fda Add list_for_each_prev to our linux compatibility. 
We need this for nouveau

MFC after:	3 days
 2009-03-17 03:49:24 +00:00
Robert Noland
a4501e547e Minor code cleanup 
MFC after:	3 days
 2009-03-17 03:46:37 +00:00
Robert Noland
d87f6722c5 We can have more than 3 pci resources 
MFC after:	3 days
 2009-03-17 03:44:36 +00:00
Robert Noland
ce3aaf8d2d Cast register maps and offsets to vm_offset_t 
MFC after:	3 days
 2009-03-17 03:39:09 +00:00
Robert Noland
b2a9095767 Change the logic around to match ati_pcigart. 
MFC after:	3 days
 2009-03-17 03:36:24 +00:00
Robert Noland
162e0ab8c1 Use flsl() here rather than ffsl() 
I discovered that we were computing page_order differently than linux.

MFC after:	3 days
 2009-03-17 03:32:12 +00:00
Robert Noland
6443904ee1 Use the right MSI_REARM for RS600. 
MFC after:	3 days
 2009-03-16 19:09:59 +00:00
Robert Noland
85c5cd4b94 Get rid of any remaining PZERO flags in mtx_sleep() 
Also, clean up some ifdef mess while I'm here.

MFC after:	3 days
 2009-03-16 08:19:11 +00:00
Robert Noland
96deaed545 Fix R600 writeback across suspend/resume. 
This is likely a NOOP for us, since I haven't ported the suspend/resume
code yet.

MFC after:	3 days
 2009-03-16 08:15:35 +00:00
Robert Noland
f0eb29f4a6 Consistently use kdev for the kernel device. 
Submitted by:	vehemens <vehemens@verizon.net>
MFC after:	3 days
 2009-03-09 07:55:18 +00:00
Robert Noland
4d4420bda8 Clean up the printing on amd64. Should also be consistent on i386. 
MFC after:	3 days
 2009-03-09 07:50:27 +00:00
Robert Noland
d3f8d87d33 There is no need to sync these buffers to swap. 
MFC after:	3 days
 2009-03-09 07:49:13 +00:00
Robert Noland
254c58f9fd Change the flags to bus_dmamem around to allow it to sleep waiting for 
resources during allocation, but not during map load.  Also, zero the
buffers here.

MFC after:	3 days
 2009-03-09 07:47:03 +00:00
Robert Noland
00a55e42d6 Fix the flags to bus_dmamem_* to allow the allocation to sleep while 
waiting for resources.  It is really the load that we can't defer.
BUS_DMA_NOCACHE belongs on bus_dmamap_load() as well.

MFC after:	3 days
 2009-03-09 07:38:22 +00:00
Robert Noland
bf32f93e11 -Make the PCI(E)/AGP calculations consistent 
-Calculate the scratch address correctly

MFC after:	10 days
 2009-03-09 07:33:35 +00:00
Robert Noland
566be5d4e1 Call the right function for the right chipset. 
MFC after:	10 days
 2009-03-09 07:24:32 +00:00
Robert Noland
4fcda8938e Import support for ATI Radeon R600 and R700 series chips. 
Tested on an HD3850 (RV670) on loan from Warren Block.

Currently, you need one of the following for this to be useful:

	x11-drivers/xf86-video-radeonhd-devel (not tested)
	xf86-video-ati from git (EXA works, xv is too fast)
	xf86-video-radeonhd from git (EXA works, xv works)

There is no 3d support available from dri just yet.

MFC after:	2 weeks
 2009-03-07 21:36:57 +00:00
Robert Noland
51e39089c9 Initialize the vblank structures at load time. Previously we did this 
at irq install/uninstall time, but when we vt switch, we uninstall the
irq handler.  When the irq handler is reinstalled, the modeset ioctl
happens first.  The modeset ioctl is supposed to tell us that we can
disable vblank interrupts if there are no active consumers.  This will
fail after a vt switch until another modeset ioctl is called via dpms
or xrandr.  Leading to cases where either interrupts are on and can't
be disabled, or worse, no interrupts at all.

MFC after:	2 weeks
 2009-02-28 02:37:55 +00:00
Robert Noland
45de2347c4 Add a tuneable to allow disabling msi on drm at runtime. 
Suggested by:	jhb@

MFC after:	2 weeks
 2009-02-27 23:50:55 +00:00
Robert Noland
2a4f4fc196 Fix up some ioctl permissions issues long overlooked. 
Submitted by:	jkim@
MFC after:	2 weeks
 2009-02-27 06:01:42 +00:00
Robert Noland
23b90efbcf The GM45 handles vblank differently. Pull the changes from Intel in. 
MFC after:	2 Weeks
 2009-02-25 20:24:13 +00:00
Robert Noland
cc27cbe330 Remove D_NEEDGIANT. 
MFC after:	2 weeks
 2009-02-25 18:56:49 +00:00
Robert Noland
bbc33a7d31 Turn on MSI if the card supports it. There is a blacklist for chips 
which report that they are capable of MSI, but don't work correctly.

MFC after:	2 weeks
 2009-02-25 18:54:35 +00:00
Robert Noland
5493c70e90 Prepare the radeon driver for MSI support. 
MFC after:	2 weeks
 2009-02-25 18:50:35 +00:00
Robert Noland
82369f9166 Add some vblank related debugging and replace the DRM_WAIT_ON macro 
with a localized version.

MFC after:	2 weeks
 2009-02-25 18:48:33 +00:00
Robert Noland
dc5c632deb This was part of a sync to the code that Intel is shipping in linux. 
- Remove the old TTM interface
	- Move register definitions to i915_reg.h
	- Overhaul the irq handler

MFC after:	2 weeks
 2009-02-25 18:44:50 +00:00
Robert Noland
67f435f03e The i915 driver was the only consumer of locked task support. 
Now that it doesn't use it anymore, get right of the taskqueue
and locked task support.

MFC after:	2 weeks
 2009-02-25 18:25:47 +00:00
Robert Noland
c148ca706e The vblank_swap ioctl was fundamentally race prone. Get rid of it. 
MFC after:	2 weeks
 2009-02-25 18:22:57 +00:00
Robert Noland
a87b4f7293 There is no reason to hold the lock here. 
When I was LOCK_PROFILING this was pretty high up and there is no
reason for it.

MFC after:	2 weeks
 2009-02-25 18:19:16 +00:00