Commit Graph

288 Commits

Author SHA1 Message Date
Rui Paulo
c0a9702f95 ti_pruss: make sure the mmap'ed memory region is uncacheable.
MFC after:	1 week
2015-01-31 02:12:57 +00:00
Oleksandr Tymoshenko
f100177dfb Set LCDC clock frequency to 2*148500 KHz
Minimum LCDC is 2 so clock freq shouild be 2*max_pixel_clock. Maximum pixel
clock for HDMI is 148500 (1920x1080). But AM335x can not run in this mode
due to bandwidth and clock limitations
2015-01-29 01:59:42 +00:00
Ruslan Bukin
6411d14d62 Add ARMv7 performance monitoring counters.
Differential Revision:	https://reviews.freebsd.org/D1687
Reviewed by:	rpaulo
Sponsored by:	DARPA, AFRL
2015-01-28 16:08:07 +00:00
Oleksandr Tymoshenko
e505aef3ed - Increase default i2c bus timeout to 5 seconds from 1 second. Sometimes
1 second is not enugh for TDA19988 HDMI framer (e.g. on Beaglebone Black)
- Add per-device i2c_timout sysctl (dev.iichb.X.i2c_timeout) to control
    I2C bus timeout manually
- Pass softc instead of device_t to all sysctl handlers
2015-01-25 23:58:34 +00:00
Oleksandr Tymoshenko
72584f4cba Add vt(4) support to AM335x LCDC driver 2015-01-25 22:08:36 +00:00
Oleksandr Tymoshenko
5967db8dca After interrupt read value from register to make sure it reached hardware. This
should fix "Spurious inteerupt" message

Suggested by ian@
2015-01-24 01:53:28 +00:00
Oleksandr Tymoshenko
fbae9a50c4 Write ACK for all kinds of LCDC interrupts 2015-01-22 03:32:04 +00:00
Oleksandr Tymoshenko
7d948458b1 Remove "#define DEBUG" that conflicts with "option DEBUG" in kernel config 2015-01-21 19:23:46 +00:00
Ian Lepore
eb8711ce16 Rename bus_space-v6.c to bus_space_base.c, because it's not v6-specific
and now some v5 Marvell systems are using it.  Only define fdt_bus_tag
if option FDT is defined.
2015-01-21 03:44:29 +00:00
Oleksandr Tymoshenko
eaf6610dd7 Properly clear IRQ status in order to fix "Spurious IRQ" message from AINT.
This register is not documented in TRM but that's what linux driver does
2015-01-20 02:24:08 +00:00
Oleksandr Tymoshenko
81d8de5f75 Fix programming timing parameters to LCDC. Actual value used for HBP, HFP, HSW, VSW
is register's programmed value + 1.
2015-01-18 06:43:09 +00:00
Bjoern A. Zeeb
6333a401ff Fix cpsw(4) after r277203 which folded 'struct m_hdr' into 'struct mbuf'.
While in theory this should have been a transparent change (and was for all
other drivers), cpsw(4) never used the proper accessor macros in a few
places but spelt the indirect m_hdr.mh_* out itself.  Convert those to
use m_len and m_data and unbreak the driver build.
2015-01-15 02:22:52 +00:00
Luiz Otavio O Souza
2566c5264a Add support to turn off Beaglebone with poweroff(8) or shutdown(8) -p.
To cut off the power we need to start the shutdown sequence by writing
the OFF bit on PMIC.

Once the PMIC is programmed the SoC needs to toggle the PMIC_PWR_ENABLE
pin when it is ready for the PMIC to cut off the power.  This is done by
triggering the ALARM2 interrupt on SoC RTC.

The RTC driver only works in power management mode which means it won't
provide any kind of time keeping functionality.  It only implements a way
to trigger the ALARM2 interrupt when requested.

Differential Revision:	https://reviews.freebsd.org/D1489
Reviewed by:	rpaulo
MFC after:	2 weeks
2015-01-12 03:23:16 +00:00
Andrew Turner
3f53a2d612 Rename gic_init_secondary to arm_init_secondary_ic to help with the merge
of the arm_intrng project branch.
2015-01-11 16:46:43 +00:00
Hans Petter Selasky
b217d18412 Add 64-bit DMA support in the XHCI controller driver.
- Fix some comments and whitespace while at it.

MFC after:	1 month
Submitted by:	marius@
2015-01-05 20:22:18 +00:00
Ian Lepore
67009184e3 Remove -Wa,-march=armv7a from arm kernel configs, it makes clang 3.5 sad
and apparently isn't needed now that we're using the integrated assembler.
2015-01-01 23:21:46 +00:00
Luiz Otavio O Souza
bb0a868b54 Remove unnecessary code and, instead, use the provided iicbus_null_callback
callback.
2014-12-27 20:06:16 +00:00
Luiz Otavio O Souza
f7f772808b Fix a off-by-one bug.
Pointy hat to:	loos
2014-12-27 19:56:04 +00:00
Luiz Otavio O Souza
f2e44b6029 Fix the musb initialization sequence on AM335x.
According to http://e2e.ti.com/support/arm/sitara_arm/f/791/t/210729 the
USB reset pulse has an undocumented duration of 200ns and during this
period the module must not be acessed.

We wait for 100us to take into account for some imprecision of the early
DELAY() loop.

This fixes the eventual 'External Non-Linefetch Abort (S)' that happens at
boot while resetting the musb subsystem.

While here, enable the USB subsystem clock before the first access.

Discussed with: 	ian, adrian
MFC after:		2 weeks
2014-12-26 17:45:49 +00:00
Ian Lepore
2ed434b4bf Squelch a (bogus) gcc use-before-init warning. 2014-12-26 13:44:41 +00:00
Luiz Otavio O Souza
3681c8d718 Add interrupt support for GPIO pins on OMAP4 and AM335x.
This enables the use of GPIO pins as interrupt sources for kernel devices
directly attached to gpiobus (userland notification will be added soon).

The use of gpio interrupts for other kernel devices will be possible when
intrng is complete.

All GPIO pins can be set to trigger on:

- active-low;
- active-high;
- rising edge;
- falling edge.

Tested on:	Beaglebone-black
2014-12-25 17:28:26 +00:00
Luiz Otavio O Souza
e350f76c66 Bring in the last round of updates before adding the interrupt support.
Fix the following issues:

- Removed revision from device softc, it isn't used anywhere else out of
  device attach routine;

- Move the duplicated code for verification of valid banks (and pins) to
  a single function;

- Use some macros to simplify the handling of some constants;

- Update some stale comments.
2014-12-24 04:24:08 +00:00
Luiz Otavio O Souza
3b9e64af65 Do not return the total number of available pins but the maximum pin number
we can cope.

Previously the returned value could prevent access to some of the pins.
2014-12-23 19:31:56 +00:00
Luiz Otavio O Souza
a59806b252 Remove some leftovers from OMAP3 support. 2014-12-22 16:29:15 +00:00
Luiz Otavio O Souza
f9de33d497 Simplify the use of locks where possible, remove the locking when it is not
required.

Simplify the code a little bit.

Reviewed by:	andrew (previous version)
2014-12-22 16:12:55 +00:00
Ian Lepore
a0041e6d2f Replace the clock divisor terms with values that also result in a 1 MHz
clock, but actually work on real hardware, unlike the original set of
values I chose.

PR:		195009
Submitted by:	Scott Ellis <jumpnowtek@gmail.com>
2014-12-22 00:50:01 +00:00
Ian Lepore
88b80af731 Add -march=armv7a to the kernel compile for all ARM systems which are v7a.
Submitted by:	Michal Meloun <meloun@miracle.cz>
2014-12-21 23:48:32 +00:00
Ian Lepore
9d87c6c8fb Remove a volatile qualifier on return type that is ignored and results in
a -Wreturn-type warning when compiled with gcc.
2014-12-21 21:11:54 +00:00
Andrew Turner
3d6451aef8 Reduce the diff in the Ti aintc between head and arm_intrng 2014-12-21 16:48:57 +00:00
Ian Lepore
61bc42f782 Add a new sdhci quirk, SDHCI_QUIRK_WAITFOR_RESET_ASSERTED, to work around
TI OMAP controllers which will return the reset-in-progress bit as zero if
you read the status register too fast after setting the reset bit.

The zero is apparently from a stale snapshot of the internal state presented
in the interface register, and leads to a false indication that the reset
is complete when it either hasn't started yet or is in-progress.  The
workaround is to first loop until the bit is seen as asserted, then do the
normal loop waiting to see it de-asserted.

Submitted by:	Michal Meloun <meloun@miracle.cz>
2014-12-20 01:13:13 +00:00
Ian Lepore
a5d3a7fba9 Rewrap long lines; no functional changes.
Submitted by:	Michal Meloun <meloun@miracle.cz>
2014-12-19 23:24:54 +00:00
Ian Lepore
7a8f993664 Add code to set and reset open-drain mode on the bus when requested.
Submitted by:	Michal Meloun <meloun@miracle.cz>
2014-12-19 23:13:46 +00:00
Andrew Turner
0395da4366 Switch to a .cpu directive. These will work when clang 3.5 is imported
where the .arch directive is a nop.

MFC after:	1 week
Sponsored by:	ABT Systems Ltd
2014-12-05 19:23:51 +00:00
Rui Paulo
afe2c75694 Allow multiple devices to mmap. It's impossible to prevent this with
checks on the open/close functions.

MFC after:	1 week
2014-12-01 19:48:23 +00:00
Luiz Otavio O Souza
667357dc9b Moves all the duplicate code to a single function.
Verify for invalid modes and unwanted flags before pass the new flags to
driver.
2014-11-18 17:22:08 +00:00
Warner Losh
40e6bdaf1e opt_global.h is included automatically in the build. No need to
explicitly include it in these places.

Sponsored by: Netflix
2014-11-18 17:06:56 +00:00
Ian Lepore
e93af0f1b9 Fix the i2c bus speed divisors for TI OMAP4 and AM335x.
For OMAP4, the old values for 1MHz gave a bus frequency of about 890KHz.
The new numbers hit 1MHz exactly.

For AM335x the prescaler values are adjusted to give a 24MHz clock for
all 3 standard speeds, as the manual recommends (as near as we can tell,
there are errors and typos apparent in the document).  Also, 1MHz speed
is added, and has been tested successfully on a BeagleboneWhite board.

PR:		195009
2014-11-18 03:26:52 +00:00
Ian Lepore
844aff82a6 Allow i2c bus speed to be configured via hints, FDT data, and sysctl.
The current support for controlling i2c bus speed is an inconsistant mess.
There are 4 symbolic speed values defined, UNKNOWN, SLOW, FAST, FASTEST.
It seems to be universally assumed that SLOW means the standard 100KHz
rate from the original spec.  Nothing ever calls iicbus_reset() with a
speed of FAST, although some drivers would treat it as the 400KHz standard
speed.  Mostly iicbus_reset() is called with the speed set to UNKNOWN or
FASTEST, and there's really no telling what any individual driver will do
with those.

The speed of an i2c bus is limited by the speed of the slowest device on
the bus.  This means that generally the bus speed needs to be configured
based on the board/system and the components within it.  Historically for
i2c we've configured with device hints.  Newer systems use FDT data and it
documents a clock-frequency property for i2c busses.  Hobbyists and
developers are likely to want on the fly changes.  These changes provide
all 3 methods, but do not require any existing drivers to change to use
the new facilities.

This adds an iicbus method, iicbus_get_frequency(dev, speed) that gets the
frequency for the requested symbolic speed.  If the symbolic speed is SLOW
or if there is no speed configured for the bus, the returned value is
100KHz, always.  Otherwise, if bus speed is configured by hints, fdt,
tunable, or sysctl, that speed is returned.  It also adds a helper
function, iicbus_init_frequency() that any bus driver subclassed from
iicbus can initialize the frequency from some other source of info.

Initial driver implementations are provided for Freescale and TI.

Differential Revision:        https://reviews.freebsd.org/D1174
PR:		195009
2014-11-18 01:54:31 +00:00
Luiz Otavio O Souza
8839e0e9f3 Make the GPIO children attach to the first unit available and not only to
unit 0.

It seems that this 'simplification' was copied to all GPIO drivers in tree.

This fix a bug where a GPIO controller could fail to attach its children
(gpioc and gpiobus) if another GPIO driver attach first.
2014-10-28 18:33:59 +00:00
Luiz Otavio O Souza
1210d2685f Fix cpsw_detach() to not panic when called from cpsw_attach().
For an unkown reason (at moment), sometimes if_cpsw cannot read from PHY
and fails to attach calling cpsw_detach() which end up in a panic.

Fix it by doing the proper check before detach the miibus and also fix the
leak of few variables.

And to actually make it work, ether_ifattach() has to be moved to the end
of cpsw_attach() to avoid a race where calling ether_ifdetach() before
domain_init() (which will only run later on) would make it crash at
INP_INFO_RLOCK() on in_pcbpurgeif0().

Tested on:	BBB (am335x)
MFC after:	1 week
2014-10-24 21:08:02 +00:00
Rui Paulo
c5422af95f Style changes as pointed out by stas@.
MFC after:	1 week
2014-10-19 17:55:04 +00:00
Luiz Otavio O Souza
bcf1cd88da Fix the chan address for mtx_sleep() on bus wait. Without this fix the
threads waiting for the bus would never wake.

X-MFC-With: r270230
2014-10-18 18:27:24 +00:00
Andrew Turner
b6c7dacfc9 Rework the Ti GPIO code to allow for both the OMAP4 and AM335X attachments
to be present. Thsi creates a new per-SoC driver that handles probe and
setting/getting the gpio flags.

Differential Revision:	https://reviews.freebsd.org/D943
Reviewed by:	loos, rpaulo
MFC after:	1 week
2014-10-18 17:51:34 +00:00
Rui Paulo
daed8c66c5 Remove an unused mutex.
MFC after:	1 week
2014-10-18 17:36:57 +00:00
Rui Paulo
b79090d6db Make the ti_mbox and ti_pruss drivers optional.
MFC after:	1 week
2014-10-18 17:00:55 +00:00
Rui Paulo
2ffc65f982 Add a driver for the TI watchdog.
The TI watchdog timer is present on BeagleBone's.  Since 2014, U-Boot
has been booting the BeagleBone with the watchdog enabled.  We need to
disable it on boot to avoid a spurious reset.
The timer isn't exactly precise, but it will do as a watchdog.  This
is also a reflection of the watchdog(9) API.

In the future, we could handle interrupts, but the watchdog(9) API
needs to be a bit smarter before that can happen.

Differential Revision:	https://reviews.freebsd.org/D965
Reviewed by:	andrew
MFC after:	1 week
Relnotes:	yes
2014-10-18 16:59:21 +00:00
Andrew Turner
f7b9150ee9 Make the ti_padstate_devmap arrays ststic, they are only used with the
file where they are defined.
2014-10-14 13:24:25 +00:00
Andrew Turner
6e97fd7dbf Move the sdhci option to files.ti, it's common to both SoCs. 2014-10-13 16:40:40 +00:00
Andrew Turner
623b63e761 Use a switch on ti_chip() to find which SoC we are on. This allow us t
only enable support for the SoCs we are built for.
2014-10-13 16:33:08 +00:00
Andrew Turner
88e1e17451 Remove ti_mmchs.c, it has been replaced by ti_sdhci.c. 2014-10-13 16:20:04 +00:00
Andrew Turner
56f4208d56 Remove the need for files.beaglebone and std.beaglebone by moving the one
option they defined into files.am335x.
2014-10-13 16:16:32 +00:00
Andrew Turner
b0d1c7102e Sort the files in the am355x directory. 2014-10-13 16:12:28 +00:00
Andrew Turner
56d8b96cbc Start removing the omap3 support. In base it was only ever a header and a
few changes to drivers, no kernel config was added. As the SoCs are quite
old and the code is unmaintained start the process of removing support by
deleting the header file and code that depends on it along with the macro
SOC_OMAP3. Other Ti SoCs shouldn't be affected, other than for us to have
less code to maintain.

Differential Revision:	https://reviews.freebsd.org/D936
Reviewed by:	rpaulo, loos
2014-10-13 15:35:08 +00:00
Gleb Smirnoff
6625a48525 Mechanically convert to if_inc_counter(). 2014-09-19 09:20:16 +00:00
Ian Lepore
8c8f31e7b2 sdhci.h has grown a dependency on sysctl.h, include the latter where needed. 2014-09-01 19:20:34 +00:00
Luiz Otavio O Souza
801abb3eba Rewrite of ti_i2c based on gonzo's patch, fix the following bugs/problems:
. interrupt storm detected on "intr70:"; throttling interrupt source;

  . Added access serialization on iicbus_transfer(), previously there was
    no such protection and a new transfer could easily confuse the
    controller;

  . Add error checkings (i.e. stop the transfer when a error is detected
    and do _not_ overwrite the previous error);

  . On command done interrupt do not assume that the transfer was finished
    sucessfully as we will receive the command done interrupt even after
    errors;

  . Simplify the FIFO handling;

  . Reset the FIFO between the transfers as the FIFO may contain data from
    the last (failed) transfer;

  . Fix the iicbus speed for AM335x, which in turn will make better use of
    the I2C noise filter (set to one internal clock cycle);

  . Move the read and write handler to ithread instead of notifying the
    requesting thread with wakeup(9);

  . Fix the comments based on OMAP4 TRM.

The above changes allows me to read the EDID from my HDMI monitor on BBB
with gonzo's patches to support TDA19988 (which does 128 bytes reads) and
repeatedly scan the iicbus (with a modified i2c(8)) without lock up the bus.

Phabric:	D465
2014-08-20 17:02:37 +00:00
Ian Lepore
bda25c28ac Tell the assembler we're building for armv7a with security extensions,
so that the 'smc' (secure monitor call) opcode is valid.

Submitted by:	Stepan Dyatkovskiy <stpworld@narod.ru>
2014-08-01 20:32:29 +00:00
Kevin Lo
6ed1354934 Remove extra semicolons. 2014-06-06 16:37:42 +00:00
Luiz Otavio O Souza
d6cf3c637e FreeBSD, historically, has always used 8-bit addresses for i2c devices
(7-bit device address << 1), always leaving the room for the read/write bit.

This commit convert ti_i2c and revert r259127 on bcm2835_bsc to make them
compatible with 8-bit addresses.  Previous to this commit an i2c device
would have different addresses depending on the controller it was attached
to (by example, when compared to any iicbb(4) based i2c controller), which
was a pretty annoying behavior.

Also, update the PMIC i2c address on beaglebone* DTS files to match the new
address scheme.

Now the userland utilities need to do the correct slave address shifting
(but it is going to work with any i2c controller on the system).

Discussed with:	ian
MFC after:	2 weeks
2014-06-03 19:24:53 +00:00
Luiz Otavio O Souza
a673123f8c Remove the unnecessary i2c slave address assignment.
The ti_i2c controller only works in the master mode and the i2c address
passed on iicbus_reset() is used to set the controller slave address when
operating as an i2c slave (which isn't currently supported).

When talking to a slave, the slave address is correctly provided to
ti_i2c_tranfer().
2014-06-03 14:46:50 +00:00
Luiz Otavio O Souza
f7eebb7730 Configure the analog input 7 which, on BBB, is connected to the 3V3B rail
through a voltage divisor (R163 and R164 on page 4 of BBB schematic).

Add a note about this on ti_adc(4) man page.  The ti_adc(4) man page will
first appear on 10.1-RELEASE.

MFC after:	1 week
Suggested by:	Sulev-Madis Silber (ketas)
Manual page reviewed by:	brueffer (D127)
2014-06-02 02:00:17 +00:00
Luiz Otavio O Souza
b1b4b37f4d Export two new settings for the AM335x PWM, the clock prescaler (clkdiv)
and the actual PWM frequency.

Enforce the maximum value for the period sysctl.

The frequency systcl now allows the direct setting of the PWM frequency (it
will try to find the better clkdiv and period for a given frequency, i.e.
the ones that will give the better PWM resolution).

This allows the use lower frequencies on the PWM.  Without changing the
clock prescaler the minimum PWM frequency was 1.52kHz.

PWM frequencies checked with an osciloscope.

PWM output tested with some R/C servos at 50Hz.
2014-06-01 03:57:57 +00:00
Andrew Turner
4eb12144c0 Rework the Ti GPIO driver to work on multiple SoCs. At the moment it could
work with OMAP4 and AM335x without needing to recompile.

Reviewed by:	loos
2014-05-26 18:02:36 +00:00
Andrew Turner
77a732bda5 Make ti_padconf_devmap static in both places it is defined. 2014-05-25 10:56:45 +00:00
Andrew Turner
0a8c1fdf5a Allow the OMAP4 and AM335x prcm drivers to be compiled in the same kernel
by renaming the structures used.
2014-05-25 10:49:07 +00:00
Ian Lepore
11d47032ee Eliminate one of the causes of spurious interrupts on armv6. The arm weak
memory ordering model allows writes to different devices to complete out
of order, leading to a situation where the write that clears an interrupt
source at a device can complete after a write that unmasks and EOIs the
interrupt at the interrupt controller, leading to a spurious re-interrupt.

This adds a generic barrier function specific to the needs of interrupt
controllers, and calls that function from the GIC and TI AINTC controllers.
There may still be other soc-specific controllers that need to make the call.

Reviewed by:	cognet, Svatopluk Kraus <onwahe@gmail.com>
MFC after:	3 days
2014-05-24 16:21:16 +00:00
Andrew Turner
101355bc67 Allow us to compile the Ti iic driver for both OMAP4 and AM335x.
MFC after:	1 week
2014-05-17 18:52:20 +00:00
Andrew Turner
f37128c048 Move the Ti SoCs to use the ARM platform. This should help allowing a
single kernel to work on both PandaBoard and BeagleBone.
2014-05-17 18:35:22 +00:00
Andrew Turner
27521ff8e4 Add the start of the ARM platform code. This is based on the PowerPC
platform code, it is expected these will be merged in the future when the
ARM code is more complete.

Until more boards can be tested only use this with the Raspberry Pi and
rrename the functions on the other SoCs.

Reviewed by:	ian@
2014-05-17 11:27:36 +00:00
Ian Lepore
88b3694bd9 Move duplicated code to print l2 cache config into the common code. 2014-04-27 23:47:38 +00:00
Luiz Otavio O Souza
1f1e8f1681 Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.

Removes the module reset for now as more investigation would be needed.

Reported by:	jceel
2014-04-06 17:09:51 +00:00
Luiz Otavio O Souza
db8a14ec74 - Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
    lines, so we now allocate resources and setup our interrupt handler for
    all the (8) available interrupts.

    On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
    banks, 6 interrupts), but there are two set of registers where the
    first one is used to setup the delivery of interrupts to the MPU and
    the second set, setup the delivery of interrupts to the DSP.

    On AM335x, each set of registers controls each one of the interrupt
    lines.

- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
  the correct ones for these SoCs.

- Remove stray whitespace.

Based on OMAP3, OMAP4 and AM335x TRMs.

Tested on Beaglebone-black.
2014-04-05 17:53:59 +00:00
Ian Lepore
922e7b19a7 Adjust the comments about translating clock divisor bits to match recent
code changes.
2014-04-04 15:03:03 +00:00
Ian Lepore
05f1e1778e Let's try having just one mmc/sd controller driver.
Pointed out by:	gjb
2014-04-04 03:48:43 +00:00
Ian Lepore
8a9361b862 Switch OMAP4 (Pandaboard et. al.) to use the ti_sdhci driver. 2014-04-04 03:11:06 +00:00
Ian Lepore
927f53548b Fix the logic for translating between MMCHS and SDHCI clock divisors.
Submitted by:	Svatopluk Kraus <onwahe@gmail.com>
2014-04-04 03:04:29 +00:00
Ian Lepore
ef3c56a250 Various fixes to the ti_sdhci driver, mostly to make it work on Pandaboard.
- Don't allow high-speed mode on OMAP4 due to hardware erratum.
 - Check the proper bit in the status register when waiting for the
   controller to come out of reset.
 - Add handling for the "non-removable" fdt property by always returning
   "card is present" status.
 - Add the non-removable property for the MMC card on a Beaglebone Black.
 - Add the non-removable property for Pandaboard as a workaround.

For Pandaboard the card detect pin is handled by the twl6030 fpga device
which gets an interrupt on pin change and then has to query the fpga
for the actual status.  We don't have code to do that yet.

Submitted by:	Svatopluk Kraus <onwahe@gmail.com>
2014-04-04 00:59:40 +00:00
Luiz Otavio O Souza
9b1cba84ac Move the GPIO bank initialization to a new function to make easier to detect
errors.

Reset the GPIO module during the initialization.  This is guaranteed to be
the same as a hardware reset.  Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.

Do a better job freeing resources when there are errors and on
ti_gpio_detach().
2014-04-03 17:55:08 +00:00
Ian Lepore
5b9b849b45 Trivial changes/forced-commit to document previous change r264050 whose
description was eaten by the dog (or an editor crash or something).

Add variable-frequency support to the arm mpcore eventtimer driver.

This allows a platform's early init code to tell the mpcore driver that the
clock frequency can vary.  That causes the mpcore driver to register an
eventtimer, but not a timecounter.  The platform has to provide a time
counter using some other fixed-frequency clock, but can still use the
per-cpu goodness of the mpcore hardware for event timers.

When the platform support code does something to change the frequency of
the CPU clocks (power saving, thermal management) it must tell the mpcore
driver code about it using arm_tmr_change_frequency().
2014-04-02 18:49:50 +00:00
Ian Lepore
b24b2743ce 2014-04-02 18:43:56 +00:00
Luiz Otavio O Souza
ff5823beea Fix some of the style(9) problems on ti_gpio. Note that this commit does
not fix all the style(9) problems, but will open room for the next commits.

Remove redundant code and declarations.

No functional changes.
2014-04-01 18:46:56 +00:00
Luiz Otavio O Souza
855feb6867 Adds the ADC driver for TI AM3xxx SoC family.
The ADC has a 12bit resolution and its raw output can be read via sysctl(8)
interface.

The driver allows the setup of ADC clock, samples average and open delay
(the number of clock cycles to wait before start the conversion).

The TSC_ADC module is set in the general purpose mode (no touchscreen
support).

Tested on Beaglebone-black.

Written based on AM335x TRM.

Reviewed by:	rpaulo
Approved by:	adrian (mentor)
Tested by:	me, Brian J. McGovern, Sulev-Madis Silber (ketas)
2014-03-24 20:06:27 +00:00
Ian Lepore
5e4e1d4995 Eliminate irq_dispatch.S. Move the data items it contained into arm/intr.c
and the functionality it provided into arm/exception.S.  Rename the main
irq handling routine from arm_handler_execute() to arm_irq_handler() to
make it more congruent with how other exception handlers are named, and
also update its signature to reflect what has long been reality: it is
passed just a trapframe pointer, no interrupt number argument.
2014-03-10 18:10:09 +00:00
Warner Losh
59c993d121 Move all the files named foo/common.c to foo/foo_common.c, as
appropriate for each of the 'foo' in the tree. This will allow us to
compile them together (although symbol conflicts prevent us from doing
that today, this just fixes the file name collision).
2014-03-08 00:14:40 +00:00
Olivier Houchard
5b4e50ae33 When calculating the MPU freq, make sure not to overflow by using a uint64_t.
PR:	arm/187223
Submitted by:	Svatopluk Kraus <onwahe@gmail.com>
2014-03-06 21:07:13 +00:00
Ian Lepore
f0455d6562 Replace many pasted identical definitions of cpu_initclocks() with a common
implementation in arm/machdep.c.  Most arm platforms either don't need to
do anything, or just need to call the standard eventtimer init routines.
A generic implementation that does that is now provided via weak linkage.
Any platform that needs to do something different can provide a its own
implementation to override the generic one.
2014-02-26 22:06:10 +00:00
Ian Lepore
aab6f7ed9a Move the declaration for mpentry() into a header file instead of pasting
it into a bunch of different .c files.  Remove declarations for the unused
mptramp() function from everywhere except AramadaXP (and I think it's
really not used there either, because the code that references it appears
to be insanely does-nothing in nature).
2014-02-23 22:35:18 +00:00
Ian Lepore
a75a785aef Eliminate an unused-var warning by wrapping #if 0 around some tables of
values that were probably entered "for completeness" from a datasheet, and
for all I know may be useful/necessary some day.
2014-02-23 22:29:59 +00:00
Luiz Otavio O Souza
8c705c2c30 Allow the use of the OFW GPIO bus for ti_gpio and bcm2835_gpio. With this
change the gpio children can be described as directly connected to the GPIO
controller without the need of describing the OFW GPIO bus itself on the
DTS file.

With this commit the OFW GPIO bus is fully functional on BBB and RPi.

GPIO controllers which want to use the OFW GPIO bus will need similar
changes.

Approved by:	adrian (mentor, implicit)
2014-02-13 18:42:23 +00:00
Warner Losh
5f384f7c36 Remove trailing tabs causing false grep positives 2014-02-04 05:26:12 +00:00
Olivier Houchard
006a01df2c Don't call device_set_ivars() for the mmchs, it doesn't seem to be used,
and it overrides the ivars set by the simplebus.
2014-02-02 20:45:41 +00:00
Ian Lepore
add35ed5b8 Follow r261352 by updating all drivers which are children of simplebus
to check the status property in their probe routines.

Simplebus used to only instantiate its children whose status="okay"
but that was improper behavior, fixed in r261352.  Now that it doesn't
check anymore and probes all its children; the children all have to
do the check because really only the children know how to properly
interpret their status property strings.

Right now all existing drivers only understand "okay" versus something-
that's-not-okay, so they all use the new ofw_bus_status_okay() helper.
2014-02-02 19:17:28 +00:00
Andrew Turner
979d76c948 Remove STARTUP_PAGETABLE_ADDR from the ARM configs and replace it with
memory at the end of the kernel.

This helps reduce the SoC and board specific configuration required.

Reviewed by:	bsdimp
Tested by:	jmg (armeb), br
2014-01-28 09:12:04 +00:00
John-Mark Gurney
6eebe8507a fix args to mtx_init
Note that this commit hasn't been compile tested because these files
are not hooked up to the build...

PR:		186129
Submitted by:	Takanori Sawada
Approved by:	rpaulo
2014-01-27 17:31:21 +00:00
Ian Lepore
273f1d76d9 Doh! Use C comments, not C++. 2014-01-04 22:14:59 +00:00
Ian Lepore
219f39ba09 Convert static device mapping to use the new arm_devmap_add_entry(),
and add static mappings that cover most of the on-chip peripherals with
1MB section mappings.  This adds about 220MB or so available kva space
by not using a hard-coded 0xF0000000 as the mapping address.
2014-01-04 22:09:53 +00:00
Ian Lepore
faacdbd9cf Fix a typo that caused a loop to run beyond the end of the array it was
searching.  If you didn't configure a timer capture pin you'd get a data
abort as it wandered into the weeds, now you get a nice warning message
about your config, as originally intended.
2014-01-03 21:38:33 +00:00
Ian Lepore
fb962e6dcf Add PPS support to the am335x timer driver. This uses the timer hardware's
capture mode together with the timecounter's PPS polling feature to get
very accurate PPS capture without any interrupt processing (or latency).

Hardware timers 4 through 7 have associated capture-trigger input pins.
When the PPS support is compiled in the code automatically chooses the
first timer it finds that has the capture-trigger pin set to input mode
(this is configured via the fdt data).
2013-12-22 23:03:29 +00:00
Ian Lepore
97247a2acf A variety of cleanups...
- Use named constants for register bits, instead of mystery numebrs
   scattered around in the code.
 - Use inline functions for bus space read/write, instead of macros
   that rely on global variables.
 - Move the timecounter struct into the softc instead of treating it
   as a global variable.  Backlink from it to the softc.
 - This leaves a pointer to the softc as the only static/global variable
   and it's now used only by DELAY().
2013-12-22 21:44:32 +00:00
Ian Lepore
b125ed0241 Map out all the timer-related registers, and define named constants for
the bits within the registers.
2013-12-22 21:35:18 +00:00
Ian Lepore
299e547f97 Shorten the DMTIMER_ prefix used for register names to DMT_. This is in
preparation for adding more complete register defintions, some of which
have fairly long names.
2013-12-22 20:40:56 +00:00
Luiz Otavio O Souza
9fa569a713 After r256961 ofw_iicbuc.c will be built for any kernel which includes
options 'iicbus' and 'fdt'.  Remove the (now) unnecessary entries.

Verified on BBB (am335x), EFIKA_MX (imx51 - by ray@), DIGI-CCWMX53
(imx53 - kernel build).

Approved by:	adrian (mentor)
2013-12-12 18:29:36 +00:00
Luiz Otavio O Souza
05a92e03c3 Activate the device before attempt to access any of its registers. Without
this change we may end up with a panic (Fatal kernel mode data abort:
'External Non-Linefetch Abort (S)') as described in
http://e2e.ti.com/support/arm/sitara_arm/f/791/t/276862.aspx.

It is now possible to bring up I2C1 and I2C2 on BBB.

Approved by:	adrian (mentor)
2013-12-09 11:51:17 +00:00
Luiz Otavio O Souza
8537123a62 Fix a few typos on the scm (control module) pin mux definitions.
Approved by:	adrian (mentor)
2013-12-09 11:33:45 +00:00
Luiz Otavio O Souza
87bd9889d1 Similar to r255816, fix the math for the DELAY() calculation. It was off
by a really small amount because of the higher timer resolution.

Approved by:	adrian (mentor)
Verified on:	BBB
2013-12-08 13:46:27 +00:00
Luiz Otavio O Souza
9f16518401 Fix the pin value reading on AM335x. Because of the inverted logic it was
always returning '0' for all the reads, even for the outputs.  It is now
known to work with gpioiic(4) and gpioled(4).

Approved by:	adrian (mentor)
Tested on:	BBB
2013-12-06 18:09:10 +00:00
Ian Lepore
19bc299f1c Bugfixes... the host capabilties from FDT data are stored in host.caps, not
host.host_ocr, examine the correct field when setting up the hardware.  Also,
the offset for the capabilties register should be 0x140, not 0x240.

Submitted by:	Ilya Bakulin <ilya@bakulin.de>
Pointy hat to:	me
2013-11-19 22:14:35 +00:00
Rui Paulo
3477d65d6a Enable the ti_mbox and ti_pruss drivers. 2013-11-16 08:28:14 +00:00
Rui Paulo
8cfbb9cf03 Add a driver for the TI Programmable Realtime Unit Subsystem.
This is only a userland accessibility driver.  It mmaps the hardware region to
userland and posts interrupt notifications via kqueue.
2013-11-16 08:23:15 +00:00
Rui Paulo
5b8db1da54 Add a driver for the Texas Instruments Mailbox hardware. 2013-11-16 08:20:50 +00:00
Ian Lepore
5a8b65f67a Switch to the new common bus_space-v6.c, remove the local one. 2013-11-07 04:09:19 +00:00
Ian Lepore
515cbe8673 Call initarm_lastaddr() later in the init sequence, after establishing
static device mappings, rather than as the first of the initializations
that a platform can hook into.  This allows a platform to allocate KVA
from the top of the address space downwards for things like static device
mapping, and return the final "last usable address" result after that and
other early init work is done.

Because some platforms were doing work in initarm_lastaddr() that needs to
be done early, add a new initarm_early_init() routine and move the early
init code to that routine on those platforms.

Rename platform_devmap_init() to initarm_devmap_init() to match all the
other init routines called from initarm() that are designed to be
implemented by platform code.

Add a comment block that explains when these routines are called and the
type of work expected to be done in each of them.
2013-11-05 02:57:34 +00:00
Ian Lepore
3110e7eed8 Move remaining code and data related to static device mapping into the
new devmap.[ch] files.  Emphasize the MD nature of these things by using
the prefix arm_devmap_ on the function and type names (already a few of
these things found their way into MI code, hopefully it will be harder to
do by accident in the future).
2013-11-04 22:45:26 +00:00
Ian Lepore
760eb697b4 The ability to do 8-bit implies 4-bit capability too. Rearrange the cases
and add a fallthrough comment to make that happen.
2013-11-01 19:29:59 +00:00
Ian Lepore
4a98e46950 TI sdhci driver improvements, mostly related to fdt data...
Use the published compatible strings (our own invention, "ti,mmchs" is
still accepted as well, for now).

Don't blindly turn on 8-bit bus mode, because even though the conroller
supports it, the board has to be wired appropriately as well.  Use the
published property (bus-width=<n>) and honor all the valid values (1,4,8).

The eMMC device on a Beaglebone Black is wired for 8-bit, update the dts.

The mmchs controller can inherently do both 1.8v and 3.0v on the first
device and 1.8v only on other devices, unless an external transceiver is
used.  Set the voltage automatically for the first device and honor
the published fdt property (ti,dualvolt) for other devices.

Thanks go to Ilya Bakulin for figuring out the voltage compatibility stuff.
2013-11-01 19:22:06 +00:00
Ian Lepore
99895358c0 Sweep up a bit of arm-land fallout after r257244; include necessary
headers directly that are no longer available via accidental include.
2013-10-28 15:20:17 +00:00
Ian Lepore
99af02e3b6 Retire arm_remap_nocache() and the data and constants associated with it.
The only remaining user was the code that allocates bounce pages for armv4
busdma.  It's not clear why bounce pages would need uncached memory, but
if that ever changes, kmem_alloc_attr() would be the way to get it.
2013-10-27 03:13:26 +00:00
Ian Lepore
6489412064 Remove #include <machine/frame.h> from all the arm code that doesn't
really need it.  That would be almost everywhere it was included.  Add
it in a couple files that really do need it and were previously getting
it by accident via another header.
2013-10-27 01:34:10 +00:00
Ian Lepore
69d75558a7 Remove all #include <machine/pmap.h> from arm code. It's already
included by vm/pmap.h, which is a prerequisite for arm/machine/pmap.h
so there's no reason to ever include it directly.

Thanks to alc@ for pointing this out.
2013-10-27 00:51:46 +00:00
Ian Lepore
aef60d8c4a Add support for uarts other than the serial console in TI OMAP SoCs.
The TI uart hardware is ns16550-compatible, except that before it can
be used the clocks and power have to be enabled and a non-standard
mode control register has to be set to put the device in uart mode
(as opposed to irDa or other serial protocols).  This adds the extra
code in an extension to the standard ns8250 probe routine, and the
rest of the driver is just the standard ns8250 code.
2013-08-21 14:33:02 +00:00
Ian Lepore
14548b7c32 Make the noop clock successfully do nothing, because doing nothing and
returning an error status (which the NULL method pointers caused) isn't
nearly as useful.
2013-08-21 04:49:58 +00:00
Ian Lepore
4169ecbb8f Define the uart clocks so that they can be en/disabled at runtime. 2013-08-21 04:20:17 +00:00
Ian Lepore
59769a581f Make the standard sdhci(4) driver work for the TI OMAP family SoCs.
The MMCHS hardware is pretty much a standard SDHCI v2.0 controller with a
couple quirks, which are now supported by sdhci(4) as of r254507.

This should work for all TI SoCs that use the MMCHS hardware, but it has
only been tested on AM335x right now, so this enables it on those platforms
but leaves the existing ti_mmchs driver in place for other OMAP variants
until they can be tested.

This initial incarnation lacks DMA support (coming soon).  Even without it
this improves performance pretty noticibly over the ti_mmchs driver,
primarily because it now does multiblock IO.
2013-08-20 12:33:35 +00:00
Olivier Houchard
7497e6267c Let the platform calculate the timer frequency at runtime, and use that for
the omap4, instead of relying on the (wrong) value provided in the dts.
2013-08-05 20:14:56 +00:00
Rui Paulo
db10a06d50 Initialisation routines for the mailbox, spinlock and PRU-ICSS clocks. 2013-07-31 05:52:03 +00:00
Rui Paulo
b2b175ba30 Improve a comment. 2013-07-09 02:50:05 +00:00
Oleksandr Tymoshenko
c0195195d5 Add IDs for TPS65217C and TPS65217D 2013-07-08 05:06:32 +00:00
Oleksandr Tymoshenko
f1fa19dfe7 - AM335x requires updated soft-reset logic too 2013-07-08 04:27:03 +00:00
Oleksandr Tymoshenko
5a2168b2ef - Add USBSS driver for AM335x SoC. Driver is a wrapper around Mentors Graphic
USB OTG core.
2013-07-07 04:22:08 +00:00
Rui Paulo
522b93a92a Don't clear the SYSCONFIG register on boot.
This follows section 18.4.2.2 SD Soft Reset Flow in the TI AM335x Technical
Reference Manual and seems to fix the "ti_mmchs0: Error: current cmd NULL,
already done?" messages.
2013-07-06 04:18:34 +00:00
Oleksandr Tymoshenko
179232d853 Add support for ePWM submodule of PWMSS
ePWM is controlled by sysctl nodes dev.am335x_pwm.N.period,
dev.am335x_pwm.N.dutyA and dev.am335x_pwm.N.dutyB that controls
PWM period and duty cycles for channels A and B respectively.

Period and duty cycle are measured in clock ticks. Default
clock frequency for AM335x PWM subsystem is 100MHz
2013-07-04 20:13:22 +00:00
Oleksandr Tymoshenko
02ff64b84f - Request non-cached memory for framebuffer
- Properly probe/initialize syscons
2013-06-27 00:33:08 +00:00
Rui Paulo
8ab18d3034 Print the 'setting internal ...' message only with bootverbose. 2013-06-26 02:56:54 +00:00
Olivier Houchard
cd5ff81bd2 Increase the maximum KVM available on TI chips. Not sure why we suddenly need
that much, but that lets me boot with 1GB of RAM.
2013-06-09 22:51:11 +00:00
Oleksandr Tymoshenko
24ca3d19a9 AM335x LCD controller driver with syscons support
Limitations:
- Raster mode only
- 24 and 32 bpp only
2013-05-27 00:23:01 +00:00
Oleksandr Tymoshenko
7747ea65a0 Add PWM module driver for AM335x. Only eCAS subsystem is supported
Export function to configure eCAS submodule from another drivers.
It's used to control LCD panel backlight on AM335x EVM.
2013-05-27 00:13:27 +00:00
Oleksandr Tymoshenko
2487319716 Add SCM registers definitions for AM335x platform 2013-05-27 00:09:04 +00:00
Oleksandr Tymoshenko
2e9f638dbb Add clock definitions for LCD controller and PWM module 2013-05-27 00:06:24 +00:00
Tim Kientzle
11ee687c67 Back out r250768 until I can further investigate why it might
be causing problems with the BeagleBone Black boot.
2013-05-18 22:42:21 +00:00
Tim Kientzle
b5eb012033 Label the mmc child after the parent. 2013-05-18 12:53:20 +00:00
Gabor Kovesdan
b78540b1c7 - Correct mispellings of word resource
Submitted by:	Christoph Mallon <christoph.mallon@gmx.de>
2013-04-17 11:47:32 +00:00
Oleksandr Tymoshenko
08dab5832b Properly clean "spurious interrupt" state
Suggested by: Ian Lepore
2013-04-06 03:31:28 +00:00
Ian Lepore
33ff10ea55 Add a macro that gets the physical address of a memory mapped device
register from a bus space resource.

Note that this macro is just for ARM, and is intended to have a short
lifespan.  The DMA engines in some SoCs need the physical address of a
memory-mapped device register as one of the arguments for the transfer.
Several scattered ad-hoc solutions have been converted to use this macro,
which now also serves to mark the places where a more complete fix needs
to be applied (after that fix has been designed).
2013-03-17 03:04:43 +00:00
Alexander Motin
fdc5dd2d2f MFcalloutng:
Switch eventtimers(9) from using struct bintime to sbintime_t.
Even before this not a single driver really supported full dynamic range of
struct bintime even in theory, not speaking about practical inexpediency.
This change legitimates the status quo and cleans up the code.
2013-02-28 13:46:03 +00:00
Oleksandr Tymoshenko
8e02f209f9 Fix typo 2013-02-27 08:34:32 +00:00
Oleksandr Tymoshenko
5c7269aca4 - Initialize GPIO_OE register based on pinmux configuration
Although AM335x TRM states that GPIO_OE register is not used and just
reflects pads configuration in practice it does control pin behavior
and shoiuld be set in addition to pinmux setup
2013-02-27 08:32:34 +00:00
Oleksandr Tymoshenko
8f80e4e134 Fix off-by-one error in sanity checks 2013-02-25 09:33:48 +00:00
Oleksandr Tymoshenko
97b405f18f - Fix off-by-one error when returning max pin number
- Fix GPIOGET for output pins. Requesting state for
    output pin is valid operation, get the state from
    TI_GPIO_DATAOUTX register
2013-02-25 08:04:47 +00:00
Oleksandr Tymoshenko
e589740522 Fix copy-paste error in bus_space_unmap argument
While I'm at it - fix some style(9) issues

Submitted by:	Mikael Urankar
2013-02-15 21:24:21 +00:00
Tim Kientzle
ae6aefaf57 Another overhaul of the CPSW driver for BeagleBone
Major changes:
  * Finally tracked down the flow control setting that
    seems to have been causing TX stalls and watchdog timeouts
  * RX and TX paths now share a lot more code
  * TX interrupt is no longer used; we instead GC finished
    tx queue entries at the bottom of the start routine.
  * TX start now queues fragmented packets directly; it only
    invokes defrag() for occasional very fragmented packets.
  * "sysctl dev.cpsw" dumps controller statistics and queue counts
  * Host Error Interrupt will give extensive debugging information
    if the controller chokes on the queued data.
2013-02-03 01:08:01 +00:00