be booted. Due to a bug, this wasn't happening.
There is still a lesser bug in that the loader decides which file to boot
after the 10sec count down. This means the bootfile listed in the count
down in is wrong in the case where the loader will boot /kernel.old.
FICL. bootforth is now live on the Alpha!
**BEWARE** - you *MUST* build and install a current libstand or you will
most likely get zfree() panics at loader startup.
We should now be able to set up the loader.conf stuff on the Alpha too.
/boot/loader (even though it is 100% dormant in the Alpha version),
then the loader panics with a zfree error:Loading /boot/loader.test
*** keyboard not plugged in...
Console: SRM firmware console
panic: zfree(0x2003cb58,4096): wild pointer
versus the exact same code but without FICL linked in:
Loading /boot/loader
Console: SRM firmware console
VMS PAL rev: 0x1000600010114
OSF PAL rev: 0x1000600020116
Switch to OSF PAL code succeeded.
FreeBSD/alpha SRM disk boot, Revision 0.1
This is almost certainly an alpha infrastructure bug, not a FICL
problem. It's probably the same thing that made FICL fail for no
apparent reason on the Alpha.
code instead of using 32-bit code and having to just "know" that it's
really 16-bit instructions when things run. This also allows the code
to use fewer macros and more actual assembly statements, which eases
maintenance. Unfortunately, due to as(1) brokenness, we still use m4
macros for all 16-bit addresses, and all short jumps (i.e., 8-bit
relative addresses in the jump instruction) must be wrapped in .code32
directives to avoid useless bloat by as(1). This also fixes a few
problems that were preventing boot0 from compiling with the latest
and greatest version of as(1).
below). This did not work previously because interrupts were
disabled when PXE calls were being made, and they must be enabled.
This should also allow us to be compliant with all newer PXE rom's
from Intel.
For PXE 0.99, this has been tested using the Intel N440BX motherboard
and I am confident it will work on the Intel L440GX motherboard.
Lots of help/information from: jhb, peter
I would like to thank Michael Johnston <michael.johnston@intel.com>,
Mike Henry <mike.henry@intel.com>, and all the other PXE developers
at Intel for their help, and information in helping solve this
problem.
from user mode. Don't disable interrupts when returning from vm86 mode
to user mode either. Now, we only disable interrupts before calling a
hardware interrupt handler, which is the only time we _should_ be
disabling interrupts.
Because of this, err, feature, any routine that one called in vm86 mode
had to re-enable interrupts by setting the interrupt flag or interrupts
would remain disabled even after the routine returned. For example, I
have a simple debugging routine that uses a vm86 mode function to dump
any arbitrary memory word that I use to read the BIOS timer or any other
memory location. This function does 1 load instruction from memory and
then returns. Since it didn't re-enable interrupts, the first time I
called it to read the BIOS timer, it disabled interrupts. This also
affected the PXE bootstrap as it needs interrupts enabled while it is
processing. This patch fixes both of those situations so that those
functions do not worry about having to enable interrupts. Hardware
interrupt handlers worked fine with the old code because they always
enable interrupts as part of their routine.
If you have any problems with the loader after this commit, please
let me know. I'd like to MFC it in a week or two since PXE support
needs it.
Noticed by: ps, Michael Johnston <michael.johnston@intel.com>
- Add support for using the PCI BIOS functions for configuration space
accesses, and make this the default.
- Make PNPBIOS the default (obsoletes the PNPBIOS config option).
- Add two new boot-time tunables to disable each of the above.
You may specify TFTP or NFS via compile time options in the loader,
but not both at this time.
Also, remove a warning about not knowing how to boot from network
devices. We can obviously do that now.
