Neel Natu 02904c45ab Hide extended PerfCtr MSRs on AMD processors by clearing bits 23, 24 and 28 in
CPUID.80000001H:ECX.

Handle accesses to PerfCtrX and PerfEvtSelX MSRs by ignoring writes and
returning 0 on reads.

This further reduces the number of unimplemented MSRs hit by a Linux guest
during boot.
2014-10-17 03:04:38 +00:00
..
2014-10-10 14:35:51 +00:00
2014-10-09 15:19:35 +00:00
2014-10-12 18:01:52 +00:00
2014-09-25 19:10:32 +00:00
2014-10-11 16:17:49 +00:00
2014-10-11 16:34:01 +00:00
2014-10-10 23:52:56 +00:00
2014-10-09 16:12:01 +00:00
2014-10-14 03:39:31 +00:00
2014-09-23 06:32:19 +00:00