ea5f837ece
This code reads the PLL configuration registers and correctly programs things so the UART and such can come up. There's MIPS74k platform issues that need fixing; but this at least brings things up enough to echo stuff out the serial port and allow for interactive debugging with ddb. Tested: * AR71xx SoCs * AR933x SoC * AR9344 board (DB120) Obtained from: Qualcomm Atheros; Linux/OpenWRT |
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.. | ||
apb.c | ||
apbvar.h | ||
ar71xx_bus_space_reversed.c | ||
ar71xx_bus_space_reversed.h | ||
ar71xx_chip.c | ||
ar71xx_chip.h | ||
ar71xx_cpudef.h | ||
ar71xx_ehci.c | ||
ar71xx_fixup.c | ||
ar71xx_fixup.h | ||
ar71xx_gpio.c | ||
ar71xx_gpiovar.h | ||
ar71xx_machdep.c | ||
ar71xx_ohci.c | ||
ar71xx_pci_bus_space.c | ||
ar71xx_pci_bus_space.h | ||
ar71xx_pci.c | ||
ar71xx_setup.c | ||
ar71xx_setup.h | ||
ar71xx_spi.c | ||
ar71xx_wdog.c | ||
ar71xxreg.h | ||
ar91xx_chip.c | ||
ar91xx_chip.h | ||
ar91xxreg.h | ||
ar724x_chip.c | ||
ar724x_chip.h | ||
ar724x_pci.c | ||
ar724xreg.h | ||
ar933x_chip.c | ||
ar933x_chip.h | ||
ar933x_uart.h | ||
ar933xreg.h | ||
ar934x_chip.c | ||
ar934x_chip.h | ||
ar934xreg.h | ||
files.ar71xx | ||
if_arge.c | ||
if_argevar.h | ||
pcf2123_rtc.c | ||
pcf2123reg.h | ||
std.ar71xx | ||
uart_bus_ar71xx.c | ||
uart_bus_ar933x.c | ||
uart_cpu_ar71xx.c | ||
uart_cpu_ar933x.c | ||
uart_dev_ar933x.c | ||
uart_dev_ar933x.h |