0112b52b61
This includes new code for parsing microcode files as well as the kernel-side change to apply the update on all processors at the same time. Developed with help from Borislav Petkov, formerly bp@amd64.org. Tested using Athlon II X2 processor on a system where BIOS does not have the latest microcode version: /boot/firmware/microcode_amd.bin: updating cpu /dev/cpuctl0 to revision 0x10000c7... done. The microcode file is taken from here: https://web.archive.org/web/20160528230514/http://www.amd64.org/microcode.html (note that the original site seems to be down at the moment) It can also be found here: https://git.kernel.org/cgit/linux/kernel/git/firmware/linux-firmware.git/tree/amd-ucode Reviewed by: kib, stas MFC after: 2 weeks Relnotes: maybe Differential Revision: https://reviews.freebsd.org/D8384
93 lines
2.7 KiB
C
93 lines
2.7 KiB
C
/*-
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* Copyright (c) 2006, 2008 Stanislav Sedov <stas@FreeBSD.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef AMD_H
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#define AMD_H
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/*
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* Prototypes.
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*/
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ucode_probe_t amd_probe;
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ucode_update_t amd_update;
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ucode_probe_t amd10h_probe;
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ucode_update_t amd10h_update;
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typedef struct amd_fw_header {
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uint32_t date; /* Update creation date. */
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uint32_t xz0[2];
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uint32_t checksum; /* ucode checksum. */
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uint32_t xz1[2];
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uint32_t signature; /* Low byte of cpuid(0). */
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uint32_t magic; /* 0x0Xaaaaaa */
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uint32_t xz2[8];
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} amd_fw_header_t;
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#define AMD_MAGIC 0xaaaaaa
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/*
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* AMD family 10h and later.
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*/
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typedef struct amd_10h_fw_header {
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uint32_t data_code;
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uint32_t patch_id;
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uint16_t mc_patch_data_id;
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uint8_t mc_patch_data_len;
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uint8_t init_flag;
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uint32_t mc_patch_data_checksum;
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uint32_t nb_dev_id;
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uint32_t sb_dev_id;
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uint16_t processor_rev_id;
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uint8_t nb_rev_id;
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uint8_t sb_rev_id;
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uint8_t bios_api_rev;
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uint8_t reserved1[3];
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uint32_t match_reg[8];
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} amd_10h_fw_header_t;
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typedef struct equiv_cpu_entry {
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uint32_t installed_cpu;
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uint32_t fixed_errata_mask;
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uint32_t fixed_errata_compare;
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uint16_t equiv_cpu;
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uint16_t res;
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} equiv_cpu_entry_t;
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typedef struct section_header {
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uint32_t type;
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uint32_t size;
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} section_header_t;
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typedef struct container_header {
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uint32_t magic;
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} container_header_t;
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#define AMD_10H_MAGIC 0x414d44
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#define AMD_10H_EQUIV_TABLE_TYPE 0
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#define AMD_10H_uCODE_TYPE 1
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#endif /* !AMD_H */
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