Ruslan Bukin d509eaf204 Account for bigger secondary data cache line size. ...

Secondary data cache line size can be bigger than
primary data cache line size, so use biggest value
as a minimum alignment.

Submitted by:	kan
Sponsored by:	DARPA, AFRL

2016-11-19 16:36:38 +00:00

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_align.h

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_bus.h

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_inttypes.h

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_limits.h

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_stdint.h

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_types.h

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asm.h

Rename some CPU_MIPSxxx options and add new CPU_MIPSxxx options

2016-02-02 07:47:38 +00:00

atomic.h

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bootinfo.h

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bus_dma.h

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bus.h

Missing commit - remove MIPS fdt bus space.

2016-02-11 06:19:58 +00:00

cache_mipsNN.h

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cache_r4k.h

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cache.h

Account for bigger secondary data cache line size.

2016-11-19 16:36:38 +00:00

cdefs.h

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clock.h

Garbage collect unused prototype for clockintr().

2016-05-20 15:34:03 +00:00

counter.h

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cpu.h

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cpufunc.h

Add Ingenic XBurst coprocessor 0 extra bits.

2016-11-19 15:38:13 +00:00

cpuinfo.h

[mips] add support for using the MIPS user register for TLS data.

2016-08-07 01:29:55 +00:00

cpuregs.h

Add Ingenic XBurst coprocessor 0 extra bits.

2016-11-19 15:38:13 +00:00

db_machdep.h

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dump.h

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efi.h

Fix building on i386 and arm. But 'public domain' headers on the files

2016-10-13 06:56:23 +00:00

elf.h

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endian.h

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exec.h

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fdt.h

Remove bus space fdt for MIPS.

2016-02-11 06:19:32 +00:00

float.h

Add full softfloat and hardfloat support for MIPS.

2016-10-31 15:33:58 +00:00

floatingpoint.h

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fls64.h

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fpu.h

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frame.h

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gdb_machdep.h

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hwfunc.h

Allow the use of soft-interrupts for sending IPIs.

2016-09-08 17:37:13 +00:00

ieee.h

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ieeefp.h

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in_cksum.h

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intr_machdep.h

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intr.h

Fix MIPS INTRNG (both FDT and non-FDT) behaviour broken by r304459

2016-09-07 09:31:10 +00:00

kdb.h

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limits.h

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locore.h

Identify Ingenic CPUs.

2016-11-19 15:10:10 +00:00

md_var.h

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memdev.h

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metadata.h

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minidump.h

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mips_opcode.h

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octeon_cop2.h

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ofw_machdep.h

Tidy up mips ofw_machdep.h. Don't include openfirm.h because openfirm.h

2015-12-20 19:09:12 +00:00

param.h

Subject: [PATCH] Pass MACHINE_ARCH on command line for MIPS kernels.

2016-11-18 16:23:31 +00:00

pcb.h

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pcpu.h

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pmap.h

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pmc_mdep.h

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proc.h

The TLS offset is a property of the process ABI.

2016-09-15 17:25:52 +00:00

profile.h

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pte.h

[mips] Add TLB pagemask probing code, and print out the allowable page sizes.

2015-12-22 15:59:41 +00:00

ptrace.h

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reg.h

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regdef.h

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regnum.h

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reloc.h

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resource.h

Define PCI_RES_BUS for MIPS.

2016-04-12 07:18:48 +00:00

runq.h

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sc_machdep.h

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setjmp.h

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sf_buf.h

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sigframe.h

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signal.h

Correct definition of 'struct sigcontext' on MIPS.

2016-10-26 17:37:08 +00:00

smp.h

Rename ARM_INTRNG and MIPS_INTRNG to INTRNG. This will help with machine

2016-04-15 16:05:41 +00:00

stdarg.h

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sysarch.h

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tlb.h

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tls.h

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trap.h

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ucontext.h

POSIX states that #include <signal.h> shall make both mcontext_t and

2016-02-12 07:38:19 +00:00

varargs.h

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vdso.h

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vm.h

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vmparam.h

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