d99a015343
Authored by: Chris Williamson <chris.williamson@delphix.com> Reviewed by: Matthew Ahrens <mahrens@delphix.com> Reviewed by: George Wilson <george.wilson@delphix.com> Reviewed by: John Kennedy <john.kennedy@delphix.com> Reviewed by: Dan Kimmel <dan.kimmel@delphix.com> Approved by: Garrett D'Amore <garrett@damore.org> Ported-by: Don Brady <don.brady@delphix.com> Ported-by: John Kennedy <john.kennedy@delphix.com> OpenZFS-issue: https://www.illumos.org/issues/7431 OpenZFS-commit: https://github.com/openzfs/openzfs/commit/dfc11533 Porting Notes: * The CLI long option arguments for '-t' and '-m' don't parse on linux * Switched from kmem_alloc to vmem_alloc in zcp_lua_alloc * Lua implementation is built as its own module (zlua.ko) * Lua headers consumed directly by zfs code moved to 'include/sys/lua/' * There is no native setjmp/longjump available in stock Linux kernel. Brought over implementations from illumos and FreeBSD * The get_temporary_prop() was adapted due to VFS platform differences * Use of inline functions in lua parser to reduce stack usage per C call * Skip some ZFS Test Suite ZCP tests on sparc64 to avoid stack overflow
291 lines
8.3 KiB
C
291 lines
8.3 KiB
C
/* BEGIN CSTYLED */
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/*
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** $Id: lopcodes.h,v 1.142.1.2 2014/10/20 18:32:09 roberto Exp $
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** Opcodes for Lua virtual machine
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** See Copyright Notice in lua.h
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*/
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#ifndef lopcodes_h
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#define lopcodes_h
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#include "llimits.h"
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/*===========================================================================
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We assume that instructions are unsigned numbers.
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All instructions have an opcode in the first 6 bits.
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Instructions can have the following fields:
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`A' : 8 bits
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`B' : 9 bits
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`C' : 9 bits
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'Ax' : 26 bits ('A', 'B', and 'C' together)
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`Bx' : 18 bits (`B' and `C' together)
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`sBx' : signed Bx
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A signed argument is represented in excess K; that is, the number
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value is the unsigned value minus K. K is exactly the maximum value
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for that argument (so that -max is represented by 0, and +max is
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represented by 2*max), which is half the maximum for the corresponding
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unsigned argument.
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===========================================================================*/
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enum OpMode {iABC, iABx, iAsBx, iAx}; /* basic instruction format */
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/*
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** size and position of opcode arguments.
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*/
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#define SIZE_C 9
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#define SIZE_B 9
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#define SIZE_Bx (SIZE_C + SIZE_B)
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#define SIZE_A 8
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#define SIZE_Ax (SIZE_C + SIZE_B + SIZE_A)
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#define SIZE_OP 6
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#define POS_OP 0
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#define POS_A (POS_OP + SIZE_OP)
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#define POS_C (POS_A + SIZE_A)
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#define POS_B (POS_C + SIZE_C)
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#define POS_Bx POS_C
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#define POS_Ax POS_A
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/*
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** limits for opcode arguments.
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** we use (signed) int to manipulate most arguments,
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** so they must fit in LUAI_BITSINT-1 bits (-1 for sign)
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*/
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#if SIZE_Bx < LUAI_BITSINT-1
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#define MAXARG_Bx ((1<<SIZE_Bx)-1)
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#define MAXARG_sBx (MAXARG_Bx>>1) /* `sBx' is signed */
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#else
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#define MAXARG_Bx MAX_INT
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#define MAXARG_sBx MAX_INT
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#endif
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#if SIZE_Ax < LUAI_BITSINT-1
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#define MAXARG_Ax ((1<<SIZE_Ax)-1)
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#else
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#define MAXARG_Ax MAX_INT
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#endif
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#define MAXARG_A ((1<<SIZE_A)-1)
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#define MAXARG_B ((1<<SIZE_B)-1)
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#define MAXARG_C ((1<<SIZE_C)-1)
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/* creates a mask with `n' 1 bits at position `p' */
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#define MASK1(n,p) ((~((~(Instruction)0)<<(n)))<<(p))
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/* creates a mask with `n' 0 bits at position `p' */
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#define MASK0(n,p) (~MASK1(n,p))
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/*
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** the following macros help to manipulate instructions
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*/
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#define GET_OPCODE(i) (cast(OpCode, ((i)>>POS_OP) & MASK1(SIZE_OP,0)))
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#define SET_OPCODE(i,o) ((i) = (((i)&MASK0(SIZE_OP,POS_OP)) | \
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((cast(Instruction, o)<<POS_OP)&MASK1(SIZE_OP,POS_OP))))
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#define getarg(i,pos,size) (cast(int, ((i)>>pos) & MASK1(size,0)))
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#define setarg(i,v,pos,size) ((i) = (((i)&MASK0(size,pos)) | \
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((cast(Instruction, v)<<pos)&MASK1(size,pos))))
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#define GETARG_A(i) getarg(i, POS_A, SIZE_A)
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#define SETARG_A(i,v) setarg(i, v, POS_A, SIZE_A)
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#define GETARG_B(i) getarg(i, POS_B, SIZE_B)
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#define SETARG_B(i,v) setarg(i, v, POS_B, SIZE_B)
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#define GETARG_C(i) getarg(i, POS_C, SIZE_C)
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#define SETARG_C(i,v) setarg(i, v, POS_C, SIZE_C)
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#define GETARG_Bx(i) getarg(i, POS_Bx, SIZE_Bx)
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#define SETARG_Bx(i,v) setarg(i, v, POS_Bx, SIZE_Bx)
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#define GETARG_Ax(i) getarg(i, POS_Ax, SIZE_Ax)
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#define SETARG_Ax(i,v) setarg(i, v, POS_Ax, SIZE_Ax)
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#define GETARG_sBx(i) (GETARG_Bx(i)-MAXARG_sBx)
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#define SETARG_sBx(i,b) SETARG_Bx((i),cast(unsigned int, (b)+MAXARG_sBx))
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#define CREATE_ABC(o,a,b,c) ((cast(Instruction, o)<<POS_OP) \
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| (cast(Instruction, a)<<POS_A) \
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| (cast(Instruction, b)<<POS_B) \
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| (cast(Instruction, c)<<POS_C))
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#define CREATE_ABx(o,a,bc) ((cast(Instruction, o)<<POS_OP) \
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| (cast(Instruction, a)<<POS_A) \
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| (cast(Instruction, bc)<<POS_Bx))
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#define CREATE_Ax(o,a) ((cast(Instruction, o)<<POS_OP) \
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| (cast(Instruction, a)<<POS_Ax))
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/*
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** Macros to operate RK indices
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*/
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/* this bit 1 means constant (0 means register) */
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#define BITRK (1 << (SIZE_B - 1))
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/* test whether value is a constant */
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#define ISK(x) ((x) & BITRK)
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/* gets the index of the constant */
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#define INDEXK(r) ((int)(r) & ~BITRK)
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#define MAXINDEXRK (BITRK - 1)
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/* code a constant index as a RK value */
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#define RKASK(x) ((x) | BITRK)
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/*
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** invalid register that fits in 8 bits
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*/
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#define NO_REG MAXARG_A
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/*
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** R(x) - register
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** Kst(x) - constant (in constant table)
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** RK(x) == if ISK(x) then Kst(INDEXK(x)) else R(x)
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*/
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/*
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** grep "ORDER OP" if you change these enums
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*/
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typedef enum {
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/*----------------------------------------------------------------------
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name args description
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------------------------------------------------------------------------*/
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OP_MOVE,/* A B R(A) := R(B) */
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OP_LOADK,/* A Bx R(A) := Kst(Bx) */
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OP_LOADKX,/* A R(A) := Kst(extra arg) */
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OP_LOADBOOL,/* A B C R(A) := (Bool)B; if (C) pc++ */
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OP_LOADNIL,/* A B R(A), R(A+1), ..., R(A+B) := nil */
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OP_GETUPVAL,/* A B R(A) := UpValue[B] */
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OP_GETTABUP,/* A B C R(A) := UpValue[B][RK(C)] */
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OP_GETTABLE,/* A B C R(A) := R(B)[RK(C)] */
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OP_SETTABUP,/* A B C UpValue[A][RK(B)] := RK(C) */
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OP_SETUPVAL,/* A B UpValue[B] := R(A) */
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OP_SETTABLE,/* A B C R(A)[RK(B)] := RK(C) */
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OP_NEWTABLE,/* A B C R(A) := {} (size = B,C) */
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OP_SELF,/* A B C R(A+1) := R(B); R(A) := R(B)[RK(C)] */
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OP_ADD,/* A B C R(A) := RK(B) + RK(C) */
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OP_SUB,/* A B C R(A) := RK(B) - RK(C) */
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OP_MUL,/* A B C R(A) := RK(B) * RK(C) */
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OP_DIV,/* A B C R(A) := RK(B) / RK(C) */
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OP_MOD,/* A B C R(A) := RK(B) % RK(C) */
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OP_POW,/* A B C R(A) := RK(B) ^ RK(C) */
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OP_UNM,/* A B R(A) := -R(B) */
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OP_NOT,/* A B R(A) := not R(B) */
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OP_LEN,/* A B R(A) := length of R(B) */
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OP_CONCAT,/* A B C R(A) := R(B).. ... ..R(C) */
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OP_JMP,/* A sBx pc+=sBx; if (A) close all upvalues >= R(A - 1) */
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OP_EQ,/* A B C if ((RK(B) == RK(C)) ~= A) then pc++ */
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OP_LT,/* A B C if ((RK(B) < RK(C)) ~= A) then pc++ */
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OP_LE,/* A B C if ((RK(B) <= RK(C)) ~= A) then pc++ */
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OP_TEST,/* A C if not (R(A) <=> C) then pc++ */
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OP_TESTSET,/* A B C if (R(B) <=> C) then R(A) := R(B) else pc++ */
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OP_CALL,/* A B C R(A), ... ,R(A+C-2) := R(A)(R(A+1), ... ,R(A+B-1)) */
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OP_TAILCALL,/* A B C return R(A)(R(A+1), ... ,R(A+B-1)) */
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OP_RETURN,/* A B return R(A), ... ,R(A+B-2) (see note) */
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OP_FORLOOP,/* A sBx R(A)+=R(A+2);
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if R(A) <?= R(A+1) then { pc+=sBx; R(A+3)=R(A) }*/
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OP_FORPREP,/* A sBx R(A)-=R(A+2); pc+=sBx */
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OP_TFORCALL,/* A C R(A+3), ... ,R(A+2+C) := R(A)(R(A+1), R(A+2)); */
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OP_TFORLOOP,/* A sBx if R(A+1) ~= nil then { R(A)=R(A+1); pc += sBx }*/
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OP_SETLIST,/* A B C R(A)[(C-1)*FPF+i] := R(A+i), 1 <= i <= B */
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OP_CLOSURE,/* A Bx R(A) := closure(KPROTO[Bx]) */
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OP_VARARG,/* A B R(A), R(A+1), ..., R(A+B-2) = vararg */
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OP_EXTRAARG/* Ax extra (larger) argument for previous opcode */
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} OpCode;
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#define NUM_OPCODES (cast(int, OP_EXTRAARG) + 1)
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/*===========================================================================
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Notes:
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(*) In OP_CALL, if (B == 0) then B = top. If (C == 0), then `top' is
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set to last_result+1, so next open instruction (OP_CALL, OP_RETURN,
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OP_SETLIST) may use `top'.
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(*) In OP_VARARG, if (B == 0) then use actual number of varargs and
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set top (like in OP_CALL with C == 0).
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(*) In OP_RETURN, if (B == 0) then return up to `top'.
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(*) In OP_SETLIST, if (B == 0) then B = `top'; if (C == 0) then next
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'instruction' is EXTRAARG(real C).
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(*) In OP_LOADKX, the next 'instruction' is always EXTRAARG.
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(*) For comparisons, A specifies what condition the test should accept
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(true or false).
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(*) All `skips' (pc++) assume that next instruction is a jump.
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===========================================================================*/
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/*
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** masks for instruction properties. The format is:
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** bits 0-1: op mode
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** bits 2-3: C arg mode
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** bits 4-5: B arg mode
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** bit 6: instruction set register A
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** bit 7: operator is a test (next instruction must be a jump)
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*/
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enum OpArgMask {
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OpArgN, /* argument is not used */
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OpArgU, /* argument is used */
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OpArgR, /* argument is a register or a jump offset */
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OpArgK /* argument is a constant or register/constant */
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};
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LUAI_DDEC const lu_byte luaP_opmodes[NUM_OPCODES];
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#define getOpMode(m) (cast(enum OpMode, luaP_opmodes[m] & 3))
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#define getBMode(m) (cast(enum OpArgMask, (luaP_opmodes[m] >> 4) & 3))
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#define getCMode(m) (cast(enum OpArgMask, (luaP_opmodes[m] >> 2) & 3))
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#define testAMode(m) (luaP_opmodes[m] & (1 << 6))
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#define testTMode(m) (luaP_opmodes[m] & (1 << 7))
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LUAI_DDEC const char *const luaP_opnames[NUM_OPCODES+1]; /* opcode names */
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/* number of list items to accumulate before a SETLIST instruction */
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#define LFIELDS_PER_FLUSH 50
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#endif
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/* END CSTYLED */
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