Justin Hibbits 49d36ba409 Older Book-E processors (e500v1/e500v2) don't support dcbzl. ... The only difference between dcbzl and dcbz is dcbzl operates on native cache line lengths regardless of L1CSR0[DCBZ32]. Since we don't change the cache line size, the cacheline_size variable will reflect the used cache line length, and dcbz will work as expected.		2016-01-26 04:41:18 +00:00
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booke_machdep.c	Remove dead code and dead comments, most notably the implemenation of the	2016-01-10 18:00:01 +00:00
locore.S	Remove dead code and dead comments, most notably the implemenation of the	2016-01-10 18:00:01 +00:00
machdep_e500.c	Add platform support for QorIQ SoCs.	2015-12-30 03:43:25 +00:00
machdep_ppc4xx.c
mp_cpudep.c	Follow up r223485, which made AIM use the ABI thread pointer instead of	2013-11-11 17:37:50 +00:00
platform_bare.c	Rearchitect platform memory map parsing to make it less	2013-12-01 19:43:15 +00:00
pmap.c	Older Book-E processors (e500v1/e500v2) don't support dcbzl.	2016-01-26 04:41:18 +00:00
trap_subr.S	Add more interrupts handled for booke.	2015-12-11 01:23:18 +00:00