cea4d8752f
end for isa(4). o Add a seperate bus frontend for acpi(4) and allow ISA DMA for it when ISA is configured in the kernel. This allows acpi(4) attachments in non-ISA configurations, as is possible for ia64. o Add a seperate bus frontend for pci(4) and detect known single port parallel cards. o Merge PC98 specific changes under pc98/cbus into the MI driver. The changes are minor enough for conditional compilation and in this form invites better abstraction. o Have ppc(4) usabled on all platforms, now that ISA specifics are untangled enough.
282 lines
6.9 KiB
C
282 lines
6.9 KiB
C
/*-
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* Copyright (c) 1997-2000 Nicolas Souchu
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* Copyright (c) 2001 Alcove - Nicolas Souchu
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* Copyright (c) 2006 Marcel Moolenaar
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/malloc.h>
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#if defined(__i386__) && defined(PC98)
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#include <pc98/cbus/cbus.h>
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#else
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#include <isa/isareg.h>
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#endif
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#include <isa/isavar.h>
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#include <dev/ppbus/ppbconf.h>
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#include <dev/ppbus/ppb_msq.h>
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#include <dev/ppc/ppcvar.h>
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#include <dev/ppc/ppcreg.h>
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#include "ppbus_if.h"
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static int ppc_isa_probe(device_t dev);
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int ppc_isa_attach(device_t dev);
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int ppc_isa_write(device_t, char *, int, int);
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static device_method_t ppc_isa_methods[] = {
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/* device interface */
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DEVMETHOD(device_probe, ppc_isa_probe),
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DEVMETHOD(device_attach, ppc_isa_attach),
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DEVMETHOD(device_detach, ppc_attach),
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/* bus interface */
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DEVMETHOD(bus_read_ivar, ppc_read_ivar),
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DEVMETHOD(bus_setup_intr, ppc_setup_intr),
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DEVMETHOD(bus_teardown_intr, ppc_teardown_intr),
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DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
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/* ppbus interface */
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DEVMETHOD(ppbus_io, ppc_io),
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DEVMETHOD(ppbus_exec_microseq, ppc_exec_microseq),
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DEVMETHOD(ppbus_reset_epp, ppc_reset_epp),
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DEVMETHOD(ppbus_setmode, ppc_setmode),
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DEVMETHOD(ppbus_ecp_sync, ppc_ecp_sync),
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DEVMETHOD(ppbus_read, ppc_read),
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DEVMETHOD(ppbus_write, ppc_isa_write),
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{ 0, 0 }
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};
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static driver_t ppc_isa_driver = {
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ppc_driver_name,
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ppc_isa_methods,
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sizeof(struct ppc_data),
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};
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static struct isa_pnp_id lpc_ids[] = {
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{ 0x0004d041, "Standard parallel printer port" }, /* PNP0400 */
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{ 0x0104d041, "ECP parallel printer port" }, /* PNP0401 */
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{ 0 }
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};
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static void
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ppc_isa_dmadone(struct ppc_data *ppc)
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{
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isa_dmadone(ppc->ppc_dmaflags, ppc->ppc_dmaddr, ppc->ppc_dmacnt,
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ppc->ppc_dmachan);
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}
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int
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ppc_isa_attach(device_t dev)
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{
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struct ppc_data *ppc = device_get_softc(dev);
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if ((ppc->ppc_avm & PPB_ECP) && (ppc->ppc_dmachan > 0)) {
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/* acquire the DMA channel forever */ /* XXX */
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isa_dma_acquire(ppc->ppc_dmachan);
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isa_dmainit(ppc->ppc_dmachan, 1024); /* nlpt.BUFSIZE */
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ppc->ppc_dmadone = ppc_isa_dmadone;
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}
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return (ppc_attach(dev));
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}
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static int
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ppc_isa_probe(device_t dev)
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{
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device_t parent;
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int error;
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parent = device_get_parent(dev);
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error = ISA_PNP_PROBE(parent, dev, lpc_ids);
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if (error == ENXIO)
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return (ENXIO);
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if (error != 0) /* XXX shall be set after detection */
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device_set_desc(dev, "Parallel port");
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return (ppc_probe(dev, 0));
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}
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/*
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* Call this function if you want to send data in any advanced mode
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* of your parallel port: FIFO, DMA
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*
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* If what you want is not possible (no ECP, no DMA...),
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* EINVAL is returned
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*/
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int
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ppc_isa_write(device_t dev, char *buf, int len, int how)
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{
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struct ppc_data *ppc = device_get_softc(dev);
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char ecr, ecr_sav, ctr, ctr_sav;
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int s, error = 0;
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int spin;
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if (!(ppc->ppc_avm & PPB_ECP) || !ppc->ppc_registered)
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return (EINVAL);
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if (ppc->ppc_dmachan == 0)
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return (EINVAL);
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#ifdef PPC_DEBUG
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printf("w");
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#endif
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ecr_sav = r_ecr(ppc);
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ctr_sav = r_ctr(ppc);
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/*
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* Send buffer with DMA, FIFO and interrupts
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*/
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/* byte mode, no intr, no DMA, dir=0, flush fifo */
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ecr = PPC_ECR_STD | PPC_DISABLE_INTR;
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w_ecr(ppc, ecr);
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/* disable nAck interrupts */
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ctr = r_ctr(ppc);
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ctr &= ~IRQENABLE;
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w_ctr(ppc, ctr);
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ppc->ppc_dmaflags = 0;
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ppc->ppc_dmaddr = (caddr_t)buf;
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ppc->ppc_dmacnt = (u_int)len;
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switch (ppc->ppc_mode) {
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case PPB_COMPATIBLE:
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/* compatible mode with FIFO, no intr, DMA, dir=0 */
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ecr = PPC_ECR_FIFO | PPC_DISABLE_INTR | PPC_ENABLE_DMA;
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break;
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case PPB_ECP:
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ecr = PPC_ECR_ECP | PPC_DISABLE_INTR | PPC_ENABLE_DMA;
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break;
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default:
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error = EINVAL;
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goto error;
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}
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w_ecr(ppc, ecr);
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ecr = r_ecr(ppc);
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/* enter splhigh() not to be preempted
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* by the dma interrupt, we may miss
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* the wakeup otherwise
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*/
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s = splhigh();
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ppc->ppc_dmastat = PPC_DMA_INIT;
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/* enable interrupts */
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ecr &= ~PPC_SERVICE_INTR;
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ppc->ppc_irqstat = PPC_IRQ_DMA;
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w_ecr(ppc, ecr);
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isa_dmastart(ppc->ppc_dmaflags, ppc->ppc_dmaddr, ppc->ppc_dmacnt,
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ppc->ppc_dmachan);
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ppc->ppc_dmastat = PPC_DMA_STARTED;
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#ifdef PPC_DEBUG
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printf("s%d", ppc->ppc_dmacnt);
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#endif
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/* Wait for the DMA completed interrupt. We hope we won't
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* miss it, otherwise a signal will be necessary to unlock the
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* process.
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*/
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do {
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/* release CPU */
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error = tsleep(ppc, PPBPRI | PCATCH, "ppcdma", 0);
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} while (error == EWOULDBLOCK);
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splx(s);
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if (error) {
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#ifdef PPC_DEBUG
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printf("i");
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#endif
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/* stop DMA */
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isa_dmadone(ppc->ppc_dmaflags, ppc->ppc_dmaddr,
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ppc->ppc_dmacnt, ppc->ppc_dmachan);
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/* no dma, no interrupt, flush the fifo */
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w_ecr(ppc, PPC_ECR_RESET);
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ppc->ppc_dmastat = PPC_DMA_INTERRUPTED;
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goto error;
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}
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/* wait for an empty fifo */
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while (!(r_ecr(ppc) & PPC_FIFO_EMPTY)) {
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for (spin=100; spin; spin--)
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if (r_ecr(ppc) & PPC_FIFO_EMPTY)
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goto fifo_empty;
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#ifdef PPC_DEBUG
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printf("Z");
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#endif
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error = tsleep(ppc, PPBPRI | PCATCH, "ppcfifo", hz/100);
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if (error != EWOULDBLOCK) {
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#ifdef PPC_DEBUG
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printf("I");
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#endif
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/* no dma, no interrupt, flush the fifo */
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w_ecr(ppc, PPC_ECR_RESET);
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ppc->ppc_dmastat = PPC_DMA_INTERRUPTED;
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error = EINTR;
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goto error;
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}
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}
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fifo_empty:
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/* no dma, no interrupt, flush the fifo */
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w_ecr(ppc, PPC_ECR_RESET);
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error:
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/* PDRQ must be kept unasserted until nPDACK is
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* deasserted for a minimum of 350ns (SMC datasheet)
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*
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* Consequence may be a FIFO that never empty
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*/
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DELAY(1);
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w_ecr(ppc, ecr_sav);
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w_ctr(ppc, ctr_sav);
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return (error);
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}
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DRIVER_MODULE(ppc, isa, ppc_isa_driver, ppc_devclass, 0, 0);
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