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that generates a fatal bus trap. Normally, the chips are setup to do 128 byte DMA bursts, but when on this CPU, they can only safely due 4-byte DMA bursts due to this bug. Details of the exact nature of the bug are sketchy, but some can be found at https://forum.openwrt.org/viewtopic.php?pid=70060 on pages 4, 5 and 6. There's a small performance penalty associated with this workaround, so it is only enabled when needed on the Atheros AR71xx platforms. Unfortunately, this condition is impossible to detect at runtime without MIPS specific ifdefs. Rather than cast an overly-broad net like Linux/OpenWRT dues (which enables this workaround all the time on MIPS32 platforms), we put this option in the kernel for just the affected machines. Sam didn't like this aspect of the patch when he reviewed it, and I'd love to hear sane proposals on how to fix it :) Reviewed by: sam@ |
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| .. | ||
| ath_hal | ||
| ath_rate | ||
| ah_osdep.c | ||
| ah_osdep.h | ||
| if_ath_pci.c | ||
| if_ath.c | ||
| if_athioctl.h | ||
| if_athrate.h | ||
| if_athvar.h | ||