e28fbecafb
Linux-driven changes to the way the chip's two interrupt controllers are defined (we only support one of them) led to no interrupt processing, so the system would hang after device instantiation. This workaround just rewrites the FDT data on the fly to get interrupt handling back under the control of the main GIC device. If/when we ever support deep sleep modes that involve powering down the main GIC, we'll have to undo this change, write a driver for the GPC-PIC, and somehow manage the handoff of responsibilities between the two drivers as the chip transitions in/out of deep sleep mode. |
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imx | ||
vybrid | ||
fsl_ocotp.c | ||
fsl_ocotpreg.h | ||
fsl_ocotpvar.h |