d07cc22b30
Add a eint_bank member to the allwinner_pins structure. On Allwinner SoCs not all pins can do interrupt. Older SoC (A10/A13 and A20) there is a maximum number of interrupts set to 32 and all the configuration is done in the same registers. While on "newer" SoCs (>=A31) interrupts registers are splitted per pin bank (i.e. all interrupts available in bank B will be configured with a sets of registers and the one in bank G in another set). While here set the names to all interrupts function to pX_eintY where X is the bank name and Y the interrupt number. To whom ever in the future look at the H5 manual and notice that the bank F have interrupts support : This isn't true, trust me. MFC after: 1 month |
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allwinner | ||
altera/socfpga | ||
amlogic/aml8726 | ||
annapurna/alpine | ||
arm | ||
broadcom/bcm2835 | ||
cloudabi32 | ||
conf | ||
freescale | ||
include | ||
linux | ||
mv | ||
nvidia | ||
qemu | ||
ralink | ||
rockchip | ||
samsung/exynos | ||
ti | ||
versatile | ||
xilinx |