54064a2fd3
1. Deadcode in ecore_init_cache_line_size(), qlnx_ioctl() and qlnx_clean_filters() 2. ARRAY_VS_SINGLETON issue in qlnx_remove_all_mcast_mac() and qlnx_update_rx_prod() MFC after:5 days
535 lines
17 KiB
C
535 lines
17 KiB
C
/*
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* Copyright (c) 2017-2018 Cavium, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __BCM_OSAL_ECORE_PACKAGE
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#define __BCM_OSAL_ECORE_PACKAGE
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#include "qlnx_os.h"
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#include "ecore_status.h"
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#include <sys/bitstring.h>
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#if __FreeBSD_version >= 1100090
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#include <linux/bitmap.h>
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#else
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#include <ofed/include/linux/bitops.h>
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#endif
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/*
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* prototypes of freebsd specific functions required by ecore
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*/
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extern uint32_t qlnx_pci_bus_get_bar_size(void *ecore_dev, uint8_t bar_id);
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extern uint32_t qlnx_pci_read_config_byte(void *ecore_dev, uint32_t pci_reg,
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uint8_t *reg_value);
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extern uint32_t qlnx_pci_read_config_word(void *ecore_dev, uint32_t pci_reg,
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uint16_t *reg_value);
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extern uint32_t qlnx_pci_read_config_dword(void *ecore_dev, uint32_t pci_reg,
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uint32_t *reg_value);
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extern void qlnx_pci_write_config_byte(void *ecore_dev, uint32_t pci_reg,
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uint8_t reg_value);
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extern void qlnx_pci_write_config_word(void *ecore_dev, uint32_t pci_reg,
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uint16_t reg_value);
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extern void qlnx_pci_write_config_dword(void *ecore_dev, uint32_t pci_reg,
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uint32_t reg_value);
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extern int qlnx_pci_find_capability(void *ecore_dev, int cap);
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extern uint32_t qlnx_direct_reg_rd32(void *p_hwfn, uint32_t *reg_addr);
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extern void qlnx_direct_reg_wr32(void *p_hwfn, void *reg_addr, uint32_t value);
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extern uint32_t qlnx_reg_rd32(void *p_hwfn, uint32_t reg_addr);
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extern void qlnx_reg_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value);
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extern void qlnx_reg_wr16(void *p_hwfn, uint32_t reg_addr, uint16_t value);
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extern void qlnx_dbell_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value);
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extern void *qlnx_dma_alloc_coherent(void *ecore_dev, bus_addr_t *phys,
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uint32_t size);
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extern void qlnx_dma_free_coherent(void *ecore_dev, void *v_addr,
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bus_addr_t phys, uint32_t size);
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extern void qlnx_link_update(void *p_hwfn);
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extern void qlnx_barrier(void *p_hwfn);
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extern void *qlnx_zalloc(uint32_t size);
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extern void qlnx_get_protocol_stats(void *cdev, int proto_type,
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void *proto_stats);
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extern void qlnx_sp_isr(void *arg);
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#ifdef ECORE_PACKAGE
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/* Memory Types */
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#define u8 uint8_t
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#define u16 uint16_t
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#define u32 uint32_t
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#define u64 uint64_t
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#define s16 uint16_t
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#define s32 uint32_t
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#ifndef QLNX_RDMA
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typedef uint16_t __le16;
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typedef uint32_t __le32;
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typedef uint16_t __be16;
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typedef uint32_t __be32;
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static __inline unsigned long
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roundup_pow_of_two(unsigned long x)
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{
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return (1UL << flsl(x - 1));
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}
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static __inline int
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is_power_of_2(unsigned long n)
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{
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return (n == roundup_pow_of_two(n));
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}
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static __inline unsigned long
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rounddown_pow_of_two(unsigned long x)
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{
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return (1UL << (flsl(x) - 1));
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}
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#define max_t(type, val1, val2) \
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((type)(val1) > (type)(val2) ? (type)(val1) : (val2))
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#define min_t(type, val1, val2) \
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((type)(val1) < (type)(val2) ? (type)(val1) : (val2))
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#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0]))
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#define nothing do {} while(0)
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#define BUILD_BUG_ON(cond) nothing
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#endif /* #ifndef QLNX_RDMA */
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#define OSAL_CPU_TO_BE64(val) htobe64(val)
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#define OSAL_BE64_TO_CPU(val) be64toh(val)
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#define OSAL_CPU_TO_BE32(val) htobe32(val)
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#define OSAL_BE32_TO_CPU(val) be32toh(val)
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#define OSAL_CPU_TO_LE32(val) htole32(val)
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#define OSAL_LE32_TO_CPU(val) le32toh(val)
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#define OSAL_CPU_TO_BE16(val) htobe16(val)
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#define OSAL_BE16_TO_CPU(val) be16toh(val)
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#define OSAL_CPU_TO_LE16(val) htole16(val)
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#define OSAL_LE16_TO_CPU(val) le16toh(val)
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static __inline uint32_t
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qlnx_get_cache_line_size(void)
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{
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return (CACHE_LINE_SIZE);
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}
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#define OSAL_CACHE_LINE_SIZE qlnx_get_cache_line_size()
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#define OSAL_BE32 uint32_t
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#define dma_addr_t bus_addr_t
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#define osal_size_t size_t
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typedef struct mtx osal_spinlock_t;
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typedef struct mtx osal_mutex_t;
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typedef void * osal_dpc_t;
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typedef struct _osal_list_entry_t
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{
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struct _osal_list_entry_t *next, *prev;
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} osal_list_entry_t;
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typedef struct osal_list_t
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{
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osal_list_entry_t *head, *tail;
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unsigned long cnt;
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} osal_list_t;
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/* OSAL functions */
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#define OSAL_UDELAY(time) DELAY(time)
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#define OSAL_MSLEEP(time) qlnx_mdelay(__func__, time)
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#define OSAL_ALLOC(dev, GFP, size) qlnx_zalloc(size)
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#define OSAL_ZALLOC(dev, GFP, size) qlnx_zalloc(size)
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#define OSAL_VALLOC(dev, size) qlnx_zalloc(size)
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#define OSAL_VZALLOC(dev, size) qlnx_zalloc(size)
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#define OSAL_FREE(dev, memory) free(memory, M_QLNXBUF)
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#define OSAL_VFREE(dev, memory) free(memory, M_QLNXBUF)
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#define OSAL_MEM_ZERO(mem, size) bzero(mem, size)
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#define OSAL_MEMCPY(dst, src, size) memcpy(dst, src, size)
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#define OSAL_DMA_ALLOC_COHERENT(dev, phys, size) \
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qlnx_dma_alloc_coherent(dev, phys, size)
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#define OSAL_DMA_FREE_COHERENT(dev, virt, phys, size) \
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qlnx_dma_free_coherent(dev, virt, phys, size)
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#define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol) (0)
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#define REG_WR(hwfn, addr, val) qlnx_reg_wr32(hwfn, addr, val)
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#define REG_WR16(hwfn, addr, val) qlnx_reg_wr16(hwfn, addr, val)
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#define DIRECT_REG_WR(p_hwfn, addr, value) qlnx_direct_reg_wr32(p_hwfn, addr, value)
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#define DIRECT_REG_RD(p_hwfn, addr) qlnx_direct_reg_rd32(p_hwfn, addr)
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#define REG_RD(hwfn, addr) qlnx_reg_rd32(hwfn, addr)
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#define DOORBELL(hwfn, addr, value) \
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qlnx_dbell_wr32(hwfn, addr, value)
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#define OSAL_SPIN_LOCK_ALLOC(p_hwfn, mutex)
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#define OSAL_SPIN_LOCK_DEALLOC(mutex) mtx_destroy(mutex)
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#define OSAL_SPIN_LOCK_INIT(lock) {\
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mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_SPIN); \
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}
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#define OSAL_SPIN_UNLOCK(lock) {\
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mtx_unlock(lock); \
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}
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#define OSAL_SPIN_LOCK(lock) {\
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mtx_lock(lock); \
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}
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#define OSAL_MUTEX_ALLOC(p_hwfn, mutex)
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#define OSAL_MUTEX_DEALLOC(mutex) mtx_destroy(mutex)
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#define OSAL_MUTEX_INIT(lock) {\
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mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_DEF);\
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}
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#define OSAL_MUTEX_ACQUIRE(lock) mtx_lock(lock)
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#define OSAL_MUTEX_RELEASE(lock) mtx_unlock(lock)
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#define OSAL_DPC_ALLOC(hwfn) malloc(PAGE_SIZE, M_QLNXBUF, M_NOWAIT)
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#define OSAL_DPC_INIT(dpc, hwfn) nothing
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#define OSAL_SCHEDULE_RECOVERY_HANDLER(x) nothing
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#define OSAL_HW_ERROR_OCCURRED(hwfn, err_type) nothing
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#define OSAL_DPC_SYNC(hwfn) nothing
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static inline void OSAL_DCBX_AEN(void *p_hwfn, u32 mib_type)
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{
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return;
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}
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static inline bool OSAL_NVM_IS_ACCESS_ENABLED(void *p_hwfn)
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{
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return 1;
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}
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#define OSAL_LIST_INIT(list) \
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do { \
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(list)->head = NULL; \
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(list)->tail = NULL; \
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(list)->cnt = 0; \
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} while (0)
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#define OSAL_LIST_INSERT_ENTRY_AFTER(entry, entry_prev, list) \
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do { \
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(entry)->prev = (entry_prev); \
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(entry)->next = (entry_prev)->next; \
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(entry)->next->prev = (entry); \
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(entry_prev)->next = (entry); \
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(list)->cnt++; \
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} while (0);
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#define OSAL_LIST_SPLICE_TAIL_INIT(new_list, list) \
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do { \
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((new_list)->tail)->next = ((list)->head); \
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((list)->head)->prev = ((new_list)->tail); \
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(list)->head = (new_list)->head; \
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(list)->cnt = (list)->cnt + (new_list)->cnt; \
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OSAL_LIST_INIT(new_list); \
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} while (0);
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#define OSAL_LIST_PUSH_HEAD(entry, list) \
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do { \
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(entry)->prev = (osal_list_entry_t *)0; \
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(entry)->next = (list)->head; \
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if ((list)->tail == (osal_list_entry_t *)0) { \
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(list)->tail = (entry); \
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} else { \
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(list)->head->prev = (entry); \
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} \
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(list)->head = (entry); \
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(list)->cnt++; \
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} while (0)
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#define OSAL_LIST_PUSH_TAIL(entry, list) \
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do { \
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(entry)->next = (osal_list_entry_t *)0; \
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(entry)->prev = (list)->tail; \
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if ((list)->tail) { \
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(list)->tail->next = (entry); \
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} else { \
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(list)->head = (entry); \
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} \
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(list)->tail = (entry); \
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(list)->cnt++; \
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} while (0)
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#define OSAL_LIST_FIRST_ENTRY(list, type, field) \
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(type *)((list)->head)
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#define OSAL_LIST_REMOVE_ENTRY(entry, list) \
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do { \
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if ((list)->head == (entry)) { \
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if ((list)->head) { \
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(list)->head = (list)->head->next; \
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if ((list)->head) { \
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(list)->head->prev = (osal_list_entry_t *)0; \
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} else { \
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(list)->tail = (osal_list_entry_t *)0; \
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} \
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(list)->cnt--; \
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} \
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} else if ((list)->tail == (entry)) { \
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if ((list)->tail) { \
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(list)->tail = (list)->tail->prev; \
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if ((list)->tail) { \
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(list)->tail->next = (osal_list_entry_t *)0; \
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} else { \
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(list)->head = (osal_list_entry_t *)0; \
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} \
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(list)->cnt--; \
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} \
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} else { \
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(entry)->prev->next = (entry)->next; \
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(entry)->next->prev = (entry)->prev; \
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(list)->cnt--; \
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} \
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} while (0)
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#define OSAL_LIST_IS_EMPTY(list) \
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((list)->cnt == 0)
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#define OSAL_LIST_NEXT(entry, field, type) \
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(type *)((&((entry)->field))->next)
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#define OSAL_LIST_FOR_EACH_ENTRY(entry, list, field, type) \
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for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field); \
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entry; \
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entry = OSAL_LIST_NEXT(entry, field, type))
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#define OSAL_LIST_FOR_EACH_ENTRY_SAFE(entry, tmp_entry, list, field, type) \
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for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field), \
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tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL; \
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entry != NULL; \
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entry = (type *)tmp_entry, \
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tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL)
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#define OSAL_BAR_SIZE(dev, bar_id) qlnx_pci_bus_get_bar_size(dev, bar_id)
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#define OSAL_PCI_READ_CONFIG_BYTE(dev, reg, value) \
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qlnx_pci_read_config_byte(dev, reg, value);
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#define OSAL_PCI_READ_CONFIG_WORD(dev, reg, value) \
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qlnx_pci_read_config_word(dev, reg, value);
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#define OSAL_PCI_READ_CONFIG_DWORD(dev, reg, value) \
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qlnx_pci_read_config_dword(dev, reg, value);
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#define OSAL_PCI_WRITE_CONFIG_BYTE(dev, reg, value) \
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qlnx_pci_write_config_byte(dev, reg, value);
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#define OSAL_PCI_WRITE_CONFIG_WORD(dev, reg, value) \
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qlnx_pci_write_config_word(dev, reg, value);
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#define OSAL_PCI_WRITE_CONFIG_DWORD(dev, reg, value) \
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qlnx_pci_write_config_dword(dev, reg, value);
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#define OSAL_PCI_FIND_CAPABILITY(dev, cap) qlnx_pci_find_capability(dev, cap);
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#define OSAL_MMIOWB(dev) qlnx_barrier(dev)
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#define OSAL_BARRIER(dev) qlnx_barrier(dev)
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#define OSAL_SMP_MB(dev) mb()
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#define OSAL_SMP_RMB(dev) rmb()
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#define OSAL_SMP_WMB(dev) wmb()
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#define OSAL_RMB(dev) rmb()
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#define OSAL_WMB(dev) wmb()
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#define OSAL_DMA_SYNC(dev, addr, length, is_post)
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#define OSAL_FIND_FIRST_BIT find_first_bit
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#define OSAL_SET_BIT(bit, bitmap) bit_set((bitstr_t *)bitmap, bit)
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#define OSAL_CLEAR_BIT(bit, bitmap) bit_clear((bitstr_t *)bitmap, bit)
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#define OSAL_TEST_BIT(bit, bitmap) bit_test((bitstr_t *)bitmap, bit)
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#define OSAL_FIND_FIRST_ZERO_BIT(bitmap, length) \
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find_first_zero_bit(bitmap, length)
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#define OSAL_LINK_UPDATE(hwfn) qlnx_link_update(hwfn)
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#define OSAL_VF_FLR_UPDATE(hwfn)
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#define QLNX_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
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#define QLNX_ROUNDUP(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
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#define OSAL_NUM_ACTIVE_CPU() mp_ncpus
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#ifndef DIV_ROUND_UP
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#define DIV_ROUND_UP(size, to_what) QLNX_DIV_ROUND_UP((size), (to_what))
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#endif
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#define ROUNDUP(value, to_what) QLNX_ROUNDUP((value), (to_what))
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#define OSAL_ROUNDUP_POW_OF_TWO(val) roundup_pow_of_two((val))
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static __inline uint32_t
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qlnx_log2(uint32_t x)
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{
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uint32_t log = 0;
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while (x >>= 1) log++;
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return (log);
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}
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#define OSAL_LOG2(val) qlnx_log2(val)
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#define OFFSETOF(str, field) offsetof(str, field)
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#define PRINT device_printf
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#define PRINT_ERR device_printf
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#define OSAL_ASSERT(is_assert) nothing
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#define OSAL_BEFORE_PF_START(cdev, my_id) {};
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#define OSAL_AFTER_PF_STOP(cdev, my_id) {};
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#define INLINE __inline
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#define OSAL_INLINE __inline
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#define OSAL_UNLIKELY
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#define OSAL_NULL NULL
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#define OSAL_MAX_T(type, __max1, __max2) max_t(type, __max1, __max2)
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#define OSAL_MIN_T(type, __max1, __max2) min_t(type, __max1, __max2)
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#define __iomem
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#define OSAL_IOMEM
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#define int_ptr_t void *
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#define osal_int_ptr_t void *
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#define OSAL_BUILD_BUG_ON(cond) nothing
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#define REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset))
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#define OSAL_REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset))
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#define OSAL_PAGE_SIZE PAGE_SIZE
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#define OSAL_STRCPY(dst, src) strcpy(dst, src)
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#define OSAL_STRNCPY(dst, src, bytes) strncpy(dst, src, bytes)
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#define OSAL_STRLEN(src) strlen(src)
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#define OSAL_SPRINTF sprintf
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#define OSAL_SNPRINTF snprintf
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#define OSAL_MEMSET memset
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#define OSAL_ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0]))
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#define osal_uintptr_t u64
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#define OSAL_SLOWPATH_IRQ_REQ(p_hwfn) (0)
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#define OSAL_GET_PROTOCOL_STATS(p_hwfn, type, stats) \
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qlnx_get_protocol_stats(p_hwfn, type, stats);
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#define OSAL_POLL_MODE_DPC(hwfn) {if (cold) qlnx_sp_isr(hwfn);}
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#define OSAL_WARN(cond, fmt, args...) \
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if (cond) printf("%s: WARNING: " fmt, __func__, ## args);
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#define OSAL_BITMAP_WEIGHT(bitmap, nbits) bitmap_weight(bitmap, nbits)
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#define OSAL_GET_RDMA_SB_ID(p_hwfn, cnq_id) ecore_rdma_get_sb_id(p_hwfn, cnq_id)
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static inline int
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qlnx_test_and_change_bit(long bit, volatile unsigned long *var)
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{
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long val;
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var += BIT_WORD(bit);
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bit %= BITS_PER_LONG;
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bit = (1UL << bit);
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val = *var;
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#if __FreeBSD_version >= 1100000
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if (val & bit)
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return (test_and_clear_bit(bit, var));
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return (test_and_set_bit(bit, var));
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#else
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if (val & bit)
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return (test_and_clear_bit(bit, (long *)var));
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return (test_and_set_bit(bit, (long *)var));
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#endif
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}
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#if __FreeBSD_version < 1100000
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static inline unsigned
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bitmap_weight(unsigned long *bitmap, unsigned nbits)
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{
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unsigned bit;
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unsigned retval = 0;
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for_each_set_bit(bit, bitmap, nbits)
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retval++;
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return (retval);
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}
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#endif
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#define OSAL_TEST_AND_FLIP_BIT qlnx_test_and_change_bit
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#define OSAL_TEST_AND_CLEAR_BIT test_and_clear_bit
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#define OSAL_MEMCMP memcmp
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#define OSAL_SPIN_LOCK_IRQSAVE(x,y) {y=0; mtx_lock(x);}
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#define OSAL_SPIN_UNLOCK_IRQSAVE(x,y) {y= 0; mtx_unlock(x);}
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static inline u32
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OSAL_CRC32(u32 crc, u8 *ptr, u32 length)
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{
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int i;
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while (length--) {
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crc ^= *ptr++;
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for (i = 0; i < 8; i++)
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crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);
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}
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return crc;
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}
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static inline void
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OSAL_CRC8_POPULATE(u8 * cdu_crc8_table, u8 polynomial)
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{
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return;
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}
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static inline u8
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OSAL_CRC8(u8 * cdu_crc8_table, u8 * data_to_crc, int data_to_crc_len, u8 init_value)
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{
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return ECORE_NOTIMPL;
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}
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#define OSAL_HW_INFO_CHANGE(p_hwfn, offset)
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#define OSAL_MFW_TLV_REQ(p_hwfn)
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#define OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, req, vf_sw_info) {};
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#define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, res) (0)
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#endif /* #ifdef ECORE_PACKAGE */
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#endif /* #ifdef __BCM_OSAL_ECORE_PACKAGE */
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