1995-07-05 12:15:52 +00:00
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/*-
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1995-02-09 09:47:31 +00:00
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* cyclades cyclom-y serial driver
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* Andrew Herbert <andrew@werple.apana.org.au>, 17 August 1993
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*
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* Copyright (c) 1993 Andrew Herbert.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name Andrew Herbert may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL I BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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2003-06-02 16:32:55 +00:00
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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1997-12-16 17:40:42 +00:00
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#include "opt_compat.h"
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1997-09-03 01:50:24 +00:00
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1995-02-09 09:47:31 +00:00
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/*
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1995-07-05 12:15:52 +00:00
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* TODO:
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* Atomic COR change.
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* Consoles.
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1995-02-09 09:47:31 +00:00
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*/
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/*
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1995-07-05 12:15:52 +00:00
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* Temporary compile-time configuration options.
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1995-02-09 09:47:31 +00:00
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*/
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1995-07-05 12:15:52 +00:00
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#define RxFifoThreshold (CD1400_RX_FIFO_SIZE / 2)
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/* Number of chars in the receiver FIFO before an
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* an interrupt is generated. Should depend on
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* line speed. Needs to be about 6 on a 486DX33
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* for 4 active ports at 115200 bps. Why doesn't
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* 10 work?
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*/
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#define PollMode /* Use polling-based irq service routine, not the
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* hardware svcack lines. Must be defined for
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* Cyclom-16Y boards. Less efficient for Cyclom-8Ys,
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* and stops 4 * 115200 bps from working.
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*/
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#undef Smarts /* Enable slightly more CD1400 intelligence. Mainly
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* the output CR/LF processing, plus we can avoid a
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* few checks usually done in ttyinput().
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*
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* XXX not fully implemented, and not particularly
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* worthwhile.
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*/
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#undef CyDebug /* Include debugging code (not very expensive). */
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1995-02-09 09:47:31 +00:00
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1995-07-05 12:15:52 +00:00
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/* These will go away. */
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#undef SOFT_CTS_OFLOW
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#define SOFT_HOTCHAR
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1995-02-09 09:47:31 +00:00
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#include <sys/param.h>
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#include <sys/systm.h>
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2001-05-01 08:13:21 +00:00
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#include <sys/bus.h>
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1995-02-09 09:47:31 +00:00
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#include <sys/conf.h>
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1997-03-23 03:37:54 +00:00
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#include <sys/fcntl.h>
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1998-08-11 17:01:32 +00:00
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#include <sys/interrupt.h>
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1995-02-09 09:47:31 +00:00
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#include <sys/kernel.h>
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2001-05-01 08:13:21 +00:00
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#include <sys/lock.h>
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1995-07-05 12:15:52 +00:00
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#include <sys/malloc.h>
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2001-01-30 17:05:58 +00:00
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#include <sys/mutex.h>
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2004-10-05 07:42:19 +00:00
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#include <sys/serial.h>
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1995-02-09 09:47:31 +00:00
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#include <sys/syslog.h>
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2001-05-01 08:13:21 +00:00
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#include <sys/tty.h>
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1999-05-28 13:23:21 +00:00
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#include <machine/psl.h>
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1995-02-09 09:47:31 +00:00
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2004-05-01 18:09:16 +00:00
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#include <dev/ic/cd1400.h>
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#include <dev/cy/cyreg.h>
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#include <dev/cy/cyvar.h>
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1995-02-09 09:47:31 +00:00
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2004-04-05 08:16:23 +00:00
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#define NCY 10 /* KLUDGE */
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2000-05-28 13:40:48 +00:00
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2004-10-05 07:42:19 +00:00
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#define NPORTS (NCY * CY_MAX_PORTS)
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1995-07-05 12:15:52 +00:00
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#define CY_MAX_PORTS (CD1400_NO_OF_CHANNELS * CY_MAX_CD1400s)
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/* We encode the cyclom unit number (cyu) in spare bits in the IVR's. */
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#define CD1400_xIVR_CHAN_SHIFT 3
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1997-09-03 01:50:24 +00:00
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#define CD1400_xIVR_CHAN 0x1F
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1995-02-09 09:47:31 +00:00
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1998-12-17 17:40:13 +00:00
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/*
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* ETC states. com->etc may also contain a hardware ETC command value,
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* meaning that execution of that command is pending.
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*/
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#define ETC_NONE 0 /* we depend on bzero() setting this */
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#define ETC_BREAK_STARTING 1
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#define ETC_BREAK_STARTED 2
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#define ETC_BREAK_ENDING 3
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#define ETC_BREAK_ENDED 4
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1995-07-05 12:15:52 +00:00
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#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */
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1995-02-09 09:47:31 +00:00
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1995-07-05 12:15:52 +00:00
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/*
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* com state bits.
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* (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
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* than the other bits so that they can be tested as a group without masking
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* off the low bits.
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*
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* The following com and tty flags correspond closely:
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2004-10-05 07:42:19 +00:00
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* CS_BUSY = TS_BUSY (maintained by cystart(), cypoll() and
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1999-09-25 16:21:39 +00:00
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* comstop())
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2004-10-05 07:42:19 +00:00
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* CS_TTGO = ~TS_TTSTOP (maintained by cyparam() and cystart())
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* CS_CTS_OFLOW = CCTS_OFLOW (maintained by cyparam())
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* CS_RTS_IFLOW = CRTS_IFLOW (maintained by cyparam())
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1995-07-05 12:15:52 +00:00
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* TS_FLUSH is not used.
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* XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
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* XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
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*/
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#define CS_BUSY 0x80 /* output in progress */
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#define CS_TTGO 0x40 /* output not stopped by XOFF */
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#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */
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#define CS_CHECKMSR 1 /* check of MSR scheduled */
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#define CS_CTS_OFLOW 2 /* use CTS output flow control */
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#define CS_ODONE 4 /* output completed */
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#define CS_RTS_IFLOW 8 /* use RTS input flow control */
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1998-11-28 15:48:09 +00:00
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#define CSE_ODONE 1 /* output transmitted */
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1995-07-05 12:15:52 +00:00
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static char const * const error_desc[] = {
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#define CE_OVERRUN 0
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"silo overflow",
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#define CE_INTERRUPT_BUF_OVERFLOW 1
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"interrupt-level buffer overflow",
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#define CE_TTY_BUF_OVERFLOW 2
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"tty-level buffer overflow",
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};
|
1995-02-09 09:47:31 +00:00
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1995-07-05 12:15:52 +00:00
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#define CE_NTYPES 3
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#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum])
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1995-02-09 09:47:31 +00:00
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2003-11-16 00:55:54 +00:00
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#ifdef SMP
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2004-10-05 07:42:19 +00:00
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#define COM_LOCK() mtx_lock_spin(&cy_lock)
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#define COM_UNLOCK() mtx_unlock_spin(&cy_lock)
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2003-11-16 00:55:54 +00:00
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#else
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#define COM_LOCK()
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#define COM_UNLOCK()
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#endif
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1995-07-05 12:15:52 +00:00
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/* types. XXX - should be elsewhere */
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typedef u_char bool_t; /* boolean */
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1995-02-09 09:47:31 +00:00
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1995-07-05 12:15:52 +00:00
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/* queue of linear buffers */
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struct lbq {
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u_char *l_head; /* next char to process */
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u_char *l_tail; /* one past the last char to process */
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struct lbq *l_next; /* next in queue */
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bool_t l_queued; /* nonzero if queued */
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};
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1995-02-09 09:47:31 +00:00
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1995-07-05 12:15:52 +00:00
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/* com device structure */
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struct com_s {
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u_char state; /* miscellaneous flag bits */
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1998-12-17 17:40:13 +00:00
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u_char etc; /* pending Embedded Transmit Command */
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1998-11-28 15:48:09 +00:00
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u_char extra_state; /* more flag bits, separate for order trick */
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1998-08-13 19:03:22 +00:00
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u_char gfrcr_image; /* copy of value read from GFRCR */
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u_char mcr_dtr; /* MCR bit that is wired to DTR */
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1995-07-05 12:15:52 +00:00
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u_char mcr_image; /* copy of value written to MCR */
|
1998-08-13 19:03:22 +00:00
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u_char mcr_rts; /* MCR bit that is wired to RTS */
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1995-07-05 12:15:52 +00:00
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int unit; /* unit number */
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1995-02-09 09:47:31 +00:00
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1995-07-05 12:15:52 +00:00
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/*
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* The high level of the driver never reads status registers directly
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* because there would be too many side effects to handle conveniently.
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* Instead, it reads copies of the registers stored here by the
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* interrupt handler.
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*/
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u_char last_modem_status; /* last MSR read by intr handler */
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u_char prev_modem_status; /* last MSR handled by high level */
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1995-02-09 09:47:31 +00:00
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1995-07-05 12:15:52 +00:00
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u_char *ibuf; /* start of input buffer */
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u_char *ibufend; /* end of input buffer */
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1999-02-04 15:54:02 +00:00
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u_char *ibufold; /* old input buffer, to be freed */
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1995-07-05 12:15:52 +00:00
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u_char *ihighwater; /* threshold in input buffer */
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u_char *iptr; /* next free spot in input buffer */
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1999-02-04 15:54:02 +00:00
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int ibufsize; /* size of ibuf (not include error bytes) */
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int ierroff; /* offset of error bytes in ibuf */
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1995-02-09 09:47:31 +00:00
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1995-07-05 12:15:52 +00:00
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struct lbq obufq; /* head of queue of output buffers */
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struct lbq obufs[2]; /* output buffers */
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1995-02-09 09:47:31 +00:00
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1997-09-03 01:50:24 +00:00
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int cy_align; /* index for register alignment */
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1995-07-05 12:15:52 +00:00
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cy_addr cy_iobase; /* base address of this port's cyclom */
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cy_addr iobase; /* base address of this port's cd1400 */
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1998-08-13 19:03:22 +00:00
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int mcr_rts_reg; /* cd1400 reg number of reg holding mcr_rts */
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1995-02-09 09:47:31 +00:00
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1995-07-05 12:15:52 +00:00
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struct tty *tp; /* cross reference */
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u_long bytes_in; /* statistics */
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u_long bytes_out;
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u_int delta_error_counts[CE_NTYPES];
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u_long error_counts[CE_NTYPES];
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u_int recv_exception; /* exception chars received */
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u_int mdm; /* modem signal changes */
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#ifdef CyDebug
|
2004-10-05 07:42:19 +00:00
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u_int start_count; /* no. of calls to cystart() */
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1995-07-05 12:15:52 +00:00
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u_int start_real; /* no. of calls that did something */
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1995-02-09 09:47:31 +00:00
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#endif
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1998-11-22 17:40:32 +00:00
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u_char car; /* CD1400 CAR shadow (if first unit in cd) */
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1995-07-05 12:15:52 +00:00
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u_char channel_control;/* CD1400 CCR control command shadow */
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u_char cor[3]; /* CD1400 COR1-3 shadows */
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u_char intr_enable; /* CD1400 SRER shadow */
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1995-02-09 09:47:31 +00:00
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1995-07-05 12:15:52 +00:00
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/*
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* Data area for output buffers. Someday we should build the output
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* buffer queue without copying data.
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*/
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u_char obuf1[256];
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u_char obuf2[256];
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};
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1995-02-09 09:47:31 +00:00
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2004-04-05 08:16:23 +00:00
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devclass_t cy_devclass;
|
2004-05-01 18:09:16 +00:00
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char cy_driver_name[] = "cy";
|
2004-04-05 08:16:23 +00:00
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2002-03-20 07:51:46 +00:00
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static void cd1400_channel_cmd(struct com_s *com, int cmd);
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static void cd1400_channel_cmd_wait(struct com_s *com);
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2002-03-23 16:01:49 +00:00
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static void cd_etc(struct com_s *com, int etc);
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static int cd_getreg(struct com_s *com, int reg);
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static void cd_setreg(struct com_s *com, int reg, int val);
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2004-10-05 07:42:19 +00:00
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static void cyinput(struct com_s *com);
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static int cyparam(struct tty *tp, struct termios *t);
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static void cypoll(void *arg);
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static void cysettimeout(void);
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static int cysetwater(struct com_s *com, speed_t speed);
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static int cyspeed(speed_t speed, u_long cy_clock, int *prescaler_io);
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static void cystart(struct tty *tp);
|
2002-03-23 16:01:49 +00:00
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static void comstop(struct tty *tp, int rw);
|
2004-10-05 07:42:19 +00:00
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static timeout_t cywakeup;
|
2002-03-23 16:01:49 +00:00
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static void disc_optim(struct tty *tp, struct termios *t,
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struct com_s *com);
|
1995-07-05 12:15:52 +00:00
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2004-10-05 07:42:19 +00:00
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static t_break_t cybreak;
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static t_modem_t cymodem;
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static t_open_t cyopen;
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static t_close_t cyclose;
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|
1995-02-09 09:47:31 +00:00
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#ifdef CyDebug
|
2002-03-23 16:01:49 +00:00
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void cystatus(int unit);
|
1995-02-09 09:47:31 +00:00
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#endif
|
1995-07-05 12:15:52 +00:00
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|
2004-10-05 07:42:19 +00:00
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static struct mtx cy_lock;
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static int cy_inited;
|
1995-12-22 15:02:22 +00:00
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1995-07-05 12:15:52 +00:00
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/* table and macro for fast conversion from a unit number to its com struct */
|
2004-10-05 07:42:19 +00:00
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static struct com_s *p_cy_addr[NPORTS];
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#define cy_addr(unit) (p_cy_addr[unit])
|
1995-02-09 09:47:31 +00:00
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2004-10-05 07:42:19 +00:00
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static u_int cy_events; /* input chars + weighted output completions */
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static void *cy_fast_ih;
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static void *cy_slow_ih;
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static int cy_timeout;
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static int cy_timeouts_until_log;
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static struct callout_handle cy_timeout_handle
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= CALLOUT_HANDLE_INITIALIZER(&cy_timeout_handle);
|
1995-02-09 09:47:31 +00:00
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|
1995-07-05 12:15:52 +00:00
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|
#ifdef CyDebug
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static u_int cd_inbs;
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static u_int cy_inbs;
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static u_int cd_outbs;
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static u_int cy_outbs;
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static u_int cy_svrr_probes;
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static u_int cy_timeouts;
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#endif
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1995-02-09 09:47:31 +00:00
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1997-09-03 01:50:24 +00:00
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static int cy_chip_offset[] = {
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1997-11-10 15:46:33 +00:00
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0x0000, 0x0400, 0x0800, 0x0c00, 0x0200, 0x0600, 0x0a00, 0x0e00,
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1997-09-03 01:50:24 +00:00
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};
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1995-07-05 12:15:52 +00:00
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static int cy_nr_cd1400s[NCY];
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1996-10-13 01:09:24 +00:00
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static int cy_total_devices;
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1995-07-05 12:15:52 +00:00
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#undef RxFifoThreshold
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static int volatile RxFifoThreshold = (CD1400_RX_FIFO_SIZE / 2);
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2004-05-01 18:09:16 +00:00
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int
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2004-10-05 07:42:19 +00:00
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cy_units(cy_addr cy_iobase, int cy_align)
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1996-10-13 01:09:24 +00:00
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{
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1997-09-03 01:50:24 +00:00
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int cyu;
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u_char firmware_version;
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int i;
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cy_addr iobase;
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1996-10-13 01:09:24 +00:00
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1996-10-04 10:33:13 +00:00
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for (cyu = 0; cyu < CY_MAX_CD1400s; ++cyu) {
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1996-10-13 01:09:24 +00:00
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iobase = cy_iobase + (cy_chip_offset[cyu] << cy_align);
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1997-09-03 01:50:24 +00:00
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1995-07-05 12:15:52 +00:00
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/* wait for chip to become ready for new command */
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1995-10-11 02:41:13 +00:00
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for (i = 0; i < 10; i++) {
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1995-07-05 12:15:52 +00:00
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DELAY(50);
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1996-10-13 01:09:24 +00:00
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if (!cd_inb(iobase, CD1400_CCR, cy_align))
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1995-07-05 12:15:52 +00:00
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break;
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}
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1995-02-09 09:47:31 +00:00
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1995-07-05 12:15:52 +00:00
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/* clear the GFRCR register */
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1996-10-13 01:09:24 +00:00
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cd_outb(iobase, CD1400_GFRCR, cy_align, 0);
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1995-02-09 09:47:31 +00:00
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1995-07-05 12:15:52 +00:00
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/* issue a reset command */
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1996-10-13 01:09:24 +00:00
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cd_outb(iobase, CD1400_CCR, cy_align,
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1995-07-05 12:15:52 +00:00
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CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET);
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1995-02-09 09:47:31 +00:00
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2002-02-26 17:04:29 +00:00
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/* XXX bogus initialization to avoid a gcc bug/warning. */
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firmware_version = 0;
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1995-07-05 12:15:52 +00:00
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/* wait for the CD1400 to initialize itself */
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1995-10-11 02:41:13 +00:00
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for (i = 0; i < 200; i++) {
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1995-07-05 12:15:52 +00:00
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DELAY(50);
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1995-02-09 09:47:31 +00:00
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1995-07-05 12:15:52 +00:00
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/* retrieve firmware version */
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1997-09-03 01:50:24 +00:00
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firmware_version = cd_inb(iobase, CD1400_GFRCR,
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cy_align);
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1995-10-11 02:41:13 +00:00
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if ((firmware_version & 0xf0) == 0x40)
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1995-07-05 12:15:52 +00:00
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break;
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}
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1995-02-09 09:47:31 +00:00
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1995-07-05 12:15:52 +00:00
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/*
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* Anything in the 0x40-0x4F range is fine.
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* If one CD1400 is bad then we don't support higher
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* numbered good ones on this board.
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*/
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1995-10-11 02:41:13 +00:00
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if ((firmware_version & 0xf0) != 0x40)
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1995-07-05 12:15:52 +00:00
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break;
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}
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1996-10-13 01:09:24 +00:00
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return (cyu);
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1995-07-05 12:15:52 +00:00
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}
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1995-02-09 09:47:31 +00:00
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2003-12-02 12:36:00 +00:00
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void *
|
2004-10-05 07:42:19 +00:00
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cyattach_common(cy_addr cy_iobase, int cy_align)
|
1996-10-13 01:09:24 +00:00
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{
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1997-09-03 01:50:24 +00:00
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int adapter;
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int cyu;
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1998-08-13 19:03:22 +00:00
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u_char firmware_version;
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1997-09-03 01:50:24 +00:00
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cy_addr iobase;
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int ncyu;
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int unit;
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2004-10-05 07:42:19 +00:00
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struct tty *tp;
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1996-10-13 01:09:24 +00:00
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2004-10-05 07:42:19 +00:00
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while (cy_inited != 2)
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if (atomic_cmpset_int(&cy_inited, 0, 1)) {
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mtx_init(&cy_lock, cy_driver_name, NULL, MTX_SPIN);
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atomic_store_rel_int(&cy_inited, 2);
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2004-04-05 07:43:18 +00:00
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}
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1996-10-13 01:09:24 +00:00
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adapter = cy_total_devices;
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if ((u_int)adapter >= NCY) {
|
1997-09-03 01:50:24 +00:00
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printf(
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"cy%d: can't attach adapter: insufficient cy devices configured\n",
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adapter);
|
2003-12-02 12:36:00 +00:00
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return (NULL);
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1996-10-13 01:09:24 +00:00
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}
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ncyu = cy_units(cy_iobase, cy_align);
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if (ncyu == 0)
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2003-12-02 12:36:00 +00:00
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return (NULL);
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1996-10-13 01:09:24 +00:00
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cy_nr_cd1400s[adapter] = ncyu;
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cy_total_devices++;
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unit = adapter * CY_MAX_PORTS;
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1996-10-04 10:33:13 +00:00
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for (cyu = 0; cyu < ncyu; ++cyu) {
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1995-07-05 12:15:52 +00:00
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int cdu;
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|
1997-09-03 01:50:24 +00:00
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iobase = (cy_addr) (cy_iobase
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+ (cy_chip_offset[cyu] << cy_align));
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1998-08-13 19:03:22 +00:00
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firmware_version = cd_inb(iobase, CD1400_GFRCR, cy_align);
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1997-09-03 01:50:24 +00:00
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1995-07-05 12:15:52 +00:00
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/* Set up a receive timeout period of than 1+ ms. */
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1998-08-13 19:03:22 +00:00
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cd_outb(iobase, CD1400_PPR, cy_align,
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howmany(CY_CLOCK(firmware_version)
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/ CD1400_PPR_PRESCALER, 1000));
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|
1995-07-05 12:15:52 +00:00
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for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; ++cdu, ++unit) {
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struct com_s *com;
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int s;
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|
2004-10-05 07:42:19 +00:00
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com = malloc(sizeof *com, M_DEVBUF, M_NOWAIT | M_ZERO);
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if (com == NULL)
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break;
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com->unit = unit;
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1998-08-13 19:03:22 +00:00
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com->gfrcr_image = firmware_version;
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if (CY_RTS_DTR_SWAPPED(firmware_version)) {
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2004-10-05 07:42:19 +00:00
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com->mcr_dtr = CD1400_MSVR1_RTS;
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com->mcr_rts = CD1400_MSVR2_DTR;
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1998-08-13 19:03:22 +00:00
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com->mcr_rts_reg = CD1400_MSVR2;
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} else {
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2004-10-05 07:42:19 +00:00
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com->mcr_dtr = CD1400_MSVR2_DTR;
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com->mcr_rts = CD1400_MSVR1_RTS;
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1998-08-13 19:03:22 +00:00
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com->mcr_rts_reg = CD1400_MSVR1;
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}
|
2004-10-05 07:42:19 +00:00
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com->obufs[0].l_head = com->obuf1;
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com->obufs[1].l_head = com->obuf2;
|
1995-07-05 12:15:52 +00:00
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1996-10-13 01:09:24 +00:00
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com->cy_align = cy_align;
|
1997-09-03 01:50:24 +00:00
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com->cy_iobase = cy_iobase;
|
2004-10-05 07:42:19 +00:00
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com->iobase = iobase;
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1998-11-22 17:40:32 +00:00
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com->car = ~CD1400_CAR_CHAN;
|
1995-02-09 09:47:31 +00:00
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|
2004-10-05 07:42:19 +00:00
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|
tp = com->tp = ttyalloc();
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|
tp->t_open = cyopen;
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|
tp->t_close = cyclose;
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|
tp->t_oproc = cystart;
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tp->t_stop = comstop;
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tp->t_param = cyparam;
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|
tp->t_break = cybreak;
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|
tp->t_modem = cymodem;
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tp->t_sc = com;
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|
|
if (cysetwater(com, tp->t_init_in.c_ispeed) != 0) {
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|
free(com, M_DEVBUF);
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|
return (NULL);
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|
|
|
}
|
1995-07-05 12:15:52 +00:00
|
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|
2004-10-05 07:42:19 +00:00
|
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|
s = spltty();
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cy_addr(unit) = com;
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|
splx(s);
|
1995-12-22 15:02:22 +00:00
|
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|
2004-10-05 07:42:19 +00:00
|
|
|
if (cy_fast_ih == NULL) {
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|
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|
swi_add(&tty_ithd, "cy", cypoll, NULL, SWI_TTY, 0,
|
|
|
|
&cy_fast_ih);
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|
swi_add(&clk_ithd, "cy", cypoll, NULL, SWI_CLOCK, 0,
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|
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|
&cy_slow_ih);
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|
|
}
|
2005-10-16 20:22:56 +00:00
|
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|
ttycreate(tp, TS_CALLOUT, "c%r%r",
|
2004-10-05 07:42:19 +00:00
|
|
|
adapter, unit % CY_MAX_PORTS);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
}
|
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
/* ensure an edge for the next interrupt */
|
1998-11-23 13:58:55 +00:00
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|
cy_outb(cy_iobase, CY_CLEAR_INTR, cy_align, 0);
|
1995-02-09 09:47:31 +00:00
|
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|
2004-10-05 07:42:19 +00:00
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|
return (cy_addr(adapter * CY_MAX_PORTS));
|
1995-02-09 09:47:31 +00:00
|
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|
}
|
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|
1995-12-08 11:19:42 +00:00
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static int
|
2004-10-05 07:42:19 +00:00
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cyopen(struct tty *tp, struct cdev *dev)
|
1995-02-09 09:47:31 +00:00
|
|
|
{
|
1995-07-05 12:15:52 +00:00
|
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|
struct com_s *com;
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|
|
int s;
|
1995-02-09 09:47:31 +00:00
|
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|
2004-10-05 07:42:19 +00:00
|
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|
com = tp->t_sc;
|
1995-07-05 12:15:52 +00:00
|
|
|
s = spltty();
|
|
|
|
/*
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|
|
|
* We jump to this label after all non-interrupted sleeps to pick
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|
|
|
* up any changes of the device state.
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|
|
|
*/
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
/* Encode per-board unit in LIVR for access in intr routines. */
|
|
|
|
cd_setreg(com, CD1400_LIVR,
|
|
|
|
(com->unit & CD1400_xIVR_CHAN) << CD1400_xIVR_CHAN_SHIFT);
|
1998-12-24 14:17:57 +00:00
|
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|
|
1995-07-05 12:15:52 +00:00
|
|
|
/*
|
2004-10-05 07:42:19 +00:00
|
|
|
* Flush fifos. This requires a full channel reset which
|
|
|
|
* also disables the transmitter and receiver. Recover
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|
|
|
* from this.
|
1995-07-05 12:15:52 +00:00
|
|
|
*/
|
2004-10-05 07:42:19 +00:00
|
|
|
cd1400_channel_cmd(com,
|
|
|
|
CD1400_CCR_CMDRESET | CD1400_CCR_CHANRESET);
|
|
|
|
cd1400_channel_cmd(com, com->channel_control);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
critical_enter();
|
|
|
|
COM_LOCK();
|
|
|
|
com->prev_modem_status = com->last_modem_status
|
|
|
|
= cd_getreg(com, CD1400_MSVR2);
|
|
|
|
cd_setreg(com, CD1400_SRER,
|
|
|
|
com->intr_enable
|
|
|
|
= CD1400_SRER_MDMCH | CD1400_SRER_RXDATA);
|
|
|
|
COM_UNLOCK();
|
|
|
|
critical_exit();
|
|
|
|
cysettimeout();
|
1995-07-05 12:15:52 +00:00
|
|
|
return (0);
|
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
static void
|
2004-10-05 07:42:19 +00:00
|
|
|
cyclose(struct tty *tp)
|
1995-07-05 12:15:52 +00:00
|
|
|
{
|
|
|
|
cy_addr iobase;
|
2004-10-05 07:42:19 +00:00
|
|
|
struct com_s *com;
|
1995-07-05 12:15:52 +00:00
|
|
|
int s;
|
|
|
|
int unit;
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
com = tp->t_sc;
|
1995-07-05 12:15:52 +00:00
|
|
|
unit = com->unit;
|
|
|
|
iobase = com->iobase;
|
|
|
|
s = spltty();
|
1998-12-17 17:40:13 +00:00
|
|
|
/* XXX */
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
1998-12-17 17:40:13 +00:00
|
|
|
com->etc = ETC_NONE;
|
|
|
|
cd_setreg(com, CD1400_COR2, com->cor[1] &= ~CD1400_COR2_ETC);
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
2004-10-05 07:42:19 +00:00
|
|
|
cd_etc(com, CD1400_ETC_STOPBREAK);
|
1998-12-17 17:40:13 +00:00
|
|
|
cd1400_channel_cmd(com, CD1400_CCR_CMDRESET | CD1400_CCR_FTF);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
{
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_SRER, com->intr_enable = 0);
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1995-07-05 12:15:52 +00:00
|
|
|
tp = com->tp;
|
1999-01-28 01:59:53 +00:00
|
|
|
if ((tp->t_cflag & HUPCL)
|
1995-07-05 12:15:52 +00:00
|
|
|
/*
|
|
|
|
* XXX we will miss any carrier drop between here and the
|
|
|
|
* next open. Perhaps we should watch DCD even when the
|
|
|
|
* port is closed; it is not sufficient to check it at
|
|
|
|
* the next open because it might go up and down while
|
|
|
|
* we're not watching.
|
|
|
|
*/
|
2004-10-05 07:42:19 +00:00
|
|
|
|| (!tp->t_actout
|
|
|
|
&& !(com->prev_modem_status & CD1400_MSVR2_CD)
|
|
|
|
&& !(tp->t_init_in.c_cflag & CLOCAL))
|
1995-07-05 12:15:52 +00:00
|
|
|
|| !(tp->t_state & TS_ISOPEN)) {
|
2004-10-05 07:42:19 +00:00
|
|
|
(void)cymodem(tp, 0, SER_DTR);
|
1995-07-05 12:15:52 +00:00
|
|
|
|
|
|
|
/* Disable receiver (leave transmitter enabled). */
|
|
|
|
com->channel_control = CD1400_CCR_CMDCHANCTL
|
|
|
|
| CD1400_CCR_XMTEN
|
|
|
|
| CD1400_CCR_RCVDIS;
|
1998-11-22 17:40:32 +00:00
|
|
|
cd1400_channel_cmd(com, com->channel_control);
|
1995-07-05 12:15:52 +00:00
|
|
|
|
2004-07-11 15:18:39 +00:00
|
|
|
ttydtrwaitstart(tp);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
}
|
2004-10-05 07:42:19 +00:00
|
|
|
tp->t_actout = FALSE;
|
|
|
|
wakeup(&tp->t_actout);
|
1995-07-05 12:15:52 +00:00
|
|
|
wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */
|
|
|
|
splx(s);
|
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2000-09-07 01:33:02 +00:00
|
|
|
/*
|
2001-02-09 22:37:24 +00:00
|
|
|
* This function:
|
|
|
|
* a) needs to be called with COM_LOCK() held, and
|
|
|
|
* b) needs to return with COM_LOCK() held.
|
2000-09-07 01:33:02 +00:00
|
|
|
*/
|
1999-02-04 15:54:02 +00:00
|
|
|
static void
|
2004-10-05 07:42:19 +00:00
|
|
|
cyinput(struct com_s *com)
|
1999-02-04 15:54:02 +00:00
|
|
|
{
|
|
|
|
u_char *buf;
|
|
|
|
int incc;
|
|
|
|
u_char line_status;
|
|
|
|
int recv_data;
|
|
|
|
struct tty *tp;
|
|
|
|
|
|
|
|
buf = com->ibuf;
|
|
|
|
tp = com->tp;
|
|
|
|
if (!(tp->t_state & TS_ISOPEN)) {
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events -= (com->iptr - com->ibuf);
|
1999-02-04 15:54:02 +00:00
|
|
|
com->iptr = com->ibuf;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
|
|
|
|
/*
|
|
|
|
* Avoid the grotesquely inefficient lineswitch routine
|
|
|
|
* (ttyinput) in "raw" mode. It usually takes about 450
|
|
|
|
* instructions (that's without canonical processing or echo!).
|
|
|
|
* slinput is reasonably fast (usually 40 instructions plus
|
|
|
|
* call overhead).
|
|
|
|
*/
|
2000-09-07 01:33:02 +00:00
|
|
|
|
1999-02-04 15:54:02 +00:00
|
|
|
do {
|
2000-09-07 01:33:02 +00:00
|
|
|
/*
|
|
|
|
* This may look odd, but it is using save-and-enable
|
|
|
|
* semantics instead of the save-and-disable semantics
|
|
|
|
* that are used everywhere else.
|
|
|
|
*/
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1999-02-04 15:54:02 +00:00
|
|
|
incc = com->iptr - buf;
|
|
|
|
if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
|
|
|
|
&& (com->state & CS_RTS_IFLOW
|
|
|
|
|| tp->t_iflag & IXOFF)
|
|
|
|
&& !(tp->t_state & TS_TBLOCK))
|
|
|
|
ttyblock(tp);
|
|
|
|
com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
|
|
|
|
+= b_to_q((char *)buf, incc, &tp->t_rawq);
|
|
|
|
buf += incc;
|
|
|
|
tk_nin += incc;
|
|
|
|
tk_rawcc += incc;
|
|
|
|
tp->t_rawcc += incc;
|
|
|
|
ttwakeup(tp);
|
|
|
|
if (tp->t_state & TS_TTSTOP
|
|
|
|
&& (tp->t_iflag & IXANY
|
|
|
|
|| tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
|
|
|
|
tp->t_state &= ~TS_TTSTOP;
|
|
|
|
tp->t_lflag &= ~FLUSHO;
|
2004-10-05 07:42:19 +00:00
|
|
|
cystart(tp);
|
1999-02-04 15:54:02 +00:00
|
|
|
}
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
1999-02-04 15:54:02 +00:00
|
|
|
} while (buf < com->iptr);
|
|
|
|
} else {
|
|
|
|
do {
|
2000-09-07 01:33:02 +00:00
|
|
|
/*
|
|
|
|
* This may look odd, but it is using save-and-enable
|
|
|
|
* semantics instead of the save-and-disable semantics
|
|
|
|
* that are used everywhere else.
|
|
|
|
*/
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1999-02-04 15:54:02 +00:00
|
|
|
line_status = buf[com->ierroff];
|
|
|
|
recv_data = *buf++;
|
|
|
|
if (line_status
|
2004-10-05 07:42:19 +00:00
|
|
|
& (CD1400_RDSR_BREAK | CD1400_RDSR_FE | CD1400_RDSR_OE | CD1400_RDSR_PE)) {
|
|
|
|
if (line_status & CD1400_RDSR_BREAK)
|
1999-02-04 15:54:02 +00:00
|
|
|
recv_data |= TTY_BI;
|
2004-10-05 07:42:19 +00:00
|
|
|
if (line_status & CD1400_RDSR_FE)
|
1999-02-04 15:54:02 +00:00
|
|
|
recv_data |= TTY_FE;
|
2004-10-05 07:42:19 +00:00
|
|
|
if (line_status & CD1400_RDSR_OE)
|
1999-02-04 15:54:02 +00:00
|
|
|
recv_data |= TTY_OE;
|
2004-10-05 07:42:19 +00:00
|
|
|
if (line_status & CD1400_RDSR_PE)
|
1999-02-04 15:54:02 +00:00
|
|
|
recv_data |= TTY_PE;
|
|
|
|
}
|
2004-06-04 16:02:56 +00:00
|
|
|
ttyld_rint(tp, recv_data);
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
1999-02-04 15:54:02 +00:00
|
|
|
} while (buf < com->iptr);
|
|
|
|
}
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events -= (com->iptr - com->ibuf);
|
1999-02-04 15:54:02 +00:00
|
|
|
com->iptr = com->ibuf;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* There is now room for another low-level buffer full of input,
|
|
|
|
* so enable RTS if it is now disabled and there is room in the
|
|
|
|
* high-level buffer.
|
|
|
|
*/
|
|
|
|
if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & com->mcr_rts) &&
|
|
|
|
!(tp->t_state & TS_TBLOCK))
|
|
|
|
cd_setreg(com, com->mcr_rts_reg,
|
|
|
|
com->mcr_image |= com->mcr_rts);
|
|
|
|
}
|
|
|
|
|
1995-02-09 09:47:31 +00:00
|
|
|
void
|
2004-10-05 07:42:19 +00:00
|
|
|
cyintr(void *vcom)
|
1995-07-05 12:15:52 +00:00
|
|
|
{
|
2003-12-02 12:36:00 +00:00
|
|
|
struct com_s *basecom;
|
1997-09-03 01:50:24 +00:00
|
|
|
int baseu;
|
|
|
|
int cy_align;
|
|
|
|
cy_addr cy_iobase;
|
|
|
|
int cyu;
|
|
|
|
cy_addr iobase;
|
|
|
|
u_char status;
|
2003-12-02 12:36:00 +00:00
|
|
|
int unit;
|
1995-07-05 12:15:52 +00:00
|
|
|
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK(); /* XXX could this be placed down lower in the loop? */
|
1997-08-30 08:08:10 +00:00
|
|
|
|
2003-12-02 12:36:00 +00:00
|
|
|
basecom = (struct com_s *)vcom;
|
|
|
|
baseu = basecom->unit;
|
|
|
|
cy_align = basecom->cy_align;
|
|
|
|
cy_iobase = basecom->cy_iobase;
|
|
|
|
unit = baseu / CY_MAX_PORTS;
|
1995-07-05 12:15:52 +00:00
|
|
|
|
|
|
|
/* check each CD1400 in turn */
|
1996-10-04 14:17:32 +00:00
|
|
|
for (cyu = 0; cyu < cy_nr_cd1400s[unit]; ++cyu) {
|
1997-09-03 01:50:24 +00:00
|
|
|
iobase = (cy_addr) (cy_iobase
|
|
|
|
+ (cy_chip_offset[cyu] << cy_align));
|
1995-07-05 12:15:52 +00:00
|
|
|
/* poll to see if it has any work */
|
1996-10-13 01:09:24 +00:00
|
|
|
status = cd_inb(iobase, CD1400_SVRR, cy_align);
|
1995-07-05 12:15:52 +00:00
|
|
|
if (status == 0)
|
|
|
|
continue;
|
1995-02-09 09:47:31 +00:00
|
|
|
#ifdef CyDebug
|
1995-07-05 12:15:52 +00:00
|
|
|
++cy_svrr_probes;
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
1995-07-05 12:15:52 +00:00
|
|
|
/* service requests as appropriate, giving priority to RX */
|
|
|
|
if (status & CD1400_SVRR_RXRDY) {
|
|
|
|
struct com_s *com;
|
|
|
|
u_int count;
|
|
|
|
u_char *ioptr;
|
|
|
|
u_char line_status;
|
|
|
|
u_char recv_data;
|
|
|
|
u_char serv_type;
|
|
|
|
#ifdef PollMode
|
|
|
|
u_char save_rir;
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifdef PollMode
|
1996-10-13 01:09:24 +00:00
|
|
|
save_rir = cd_inb(iobase, CD1400_RIR, cy_align);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
/* enter rx service */
|
1996-10-13 01:09:24 +00:00
|
|
|
cd_outb(iobase, CD1400_CAR, cy_align, save_rir);
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_addr(baseu + cyu * CD1400_NO_OF_CHANNELS)->car
|
1998-11-22 17:40:32 +00:00
|
|
|
= save_rir & CD1400_CAR_CHAN;
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1996-10-13 01:09:24 +00:00
|
|
|
serv_type = cd_inb(iobase, CD1400_RIVR, cy_align);
|
2004-10-05 07:42:19 +00:00
|
|
|
com = cy_addr(baseu
|
1995-07-05 12:15:52 +00:00
|
|
|
+ ((serv_type >> CD1400_xIVR_CHAN_SHIFT)
|
|
|
|
& CD1400_xIVR_CHAN));
|
1995-02-09 09:47:31 +00:00
|
|
|
#else
|
1995-07-05 12:15:52 +00:00
|
|
|
/* ack receive service */
|
1998-11-23 13:58:55 +00:00
|
|
|
serv_type = cy_inb(iobase, CY8_SVCACKR, cy_align);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
com = cy_addr(baseu +
|
1995-07-05 12:15:52 +00:00
|
|
|
+ ((serv_type >> CD1400_xIVR_CHAN_SHIFT)
|
|
|
|
& CD1400_xIVR_CHAN));
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
if (serv_type & CD1400_RIVR_EXCEPTION) {
|
|
|
|
++com->recv_exception;
|
1996-10-13 01:09:24 +00:00
|
|
|
line_status = cd_inb(iobase, CD1400_RDSR, cy_align);
|
1995-07-05 12:15:52 +00:00
|
|
|
/* break/unnattached error bits or real input? */
|
1996-10-13 01:09:24 +00:00
|
|
|
recv_data = cd_inb(iobase, CD1400_RDSR, cy_align);
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifndef SOFT_HOTCHAR
|
|
|
|
if (line_status & CD1400_RDSR_SPECIAL
|
2004-06-26 09:20:07 +00:00
|
|
|
&& com->tp->t_hotchar != 0)
|
2004-10-05 07:42:19 +00:00
|
|
|
swi_sched(cy_fast_ih, 0);
|
2000-10-25 05:19:40 +00:00
|
|
|
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
1995-07-05 12:15:52 +00:00
|
|
|
#if 1 /* XXX "intelligent" PFO error handling would break O error handling */
|
2004-10-05 07:42:19 +00:00
|
|
|
if (line_status & (CD1400_RDSR_PE|CD1400_RDSR_FE|CD1400_RDSR_BREAK)) {
|
1995-07-05 12:15:52 +00:00
|
|
|
/*
|
|
|
|
Don't store PE if IGNPAR and BI if IGNBRK,
|
|
|
|
this hack allows "raw" tty optimization
|
|
|
|
works even if IGN* is set.
|
|
|
|
*/
|
|
|
|
if ( com->tp == NULL
|
|
|
|
|| !(com->tp->t_state & TS_ISOPEN)
|
2004-10-05 07:42:19 +00:00
|
|
|
|| ((line_status & (CD1400_RDSR_PE|CD1400_RDSR_FE))
|
1999-01-28 01:59:53 +00:00
|
|
|
&& (com->tp->t_iflag & IGNPAR))
|
2004-10-05 07:42:19 +00:00
|
|
|
|| ((line_status & CD1400_RDSR_BREAK)
|
1999-01-28 01:59:53 +00:00
|
|
|
&& (com->tp->t_iflag & IGNBRK)))
|
1995-07-05 12:15:52 +00:00
|
|
|
goto cont;
|
2004-10-05 07:42:19 +00:00
|
|
|
if ( (line_status & (CD1400_RDSR_PE|CD1400_RDSR_FE))
|
1995-07-05 12:15:52 +00:00
|
|
|
&& (com->tp->t_state & TS_CAN_BYPASS_L_RINT)
|
2004-10-05 07:42:19 +00:00
|
|
|
&& ((line_status & CD1400_RDSR_FE)
|
|
|
|
|| ((line_status & CD1400_RDSR_PE)
|
1999-01-28 01:59:53 +00:00
|
|
|
&& (com->tp->t_iflag & INPCK))))
|
1995-07-05 12:15:52 +00:00
|
|
|
recv_data = 0;
|
|
|
|
}
|
|
|
|
#endif /* 1 */
|
|
|
|
++com->bytes_in;
|
|
|
|
#ifdef SOFT_HOTCHAR
|
2004-06-26 09:20:07 +00:00
|
|
|
if (com->tp->t_hotchar != 0 && recv_data == com->tp->t_hotchar)
|
2004-10-05 07:42:19 +00:00
|
|
|
swi_sched(cy_fast_ih, 0);
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
1995-07-05 12:15:52 +00:00
|
|
|
ioptr = com->iptr;
|
|
|
|
if (ioptr >= com->ibufend)
|
|
|
|
CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
|
|
|
|
else {
|
2004-10-05 07:42:19 +00:00
|
|
|
if (com->tp != NULL && com->tp->t_do_timestamp)
|
|
|
|
microtime(&com->tp->t_timestamp);
|
|
|
|
++cy_events;
|
1995-07-05 12:15:52 +00:00
|
|
|
ioptr[0] = recv_data;
|
1999-02-04 15:54:02 +00:00
|
|
|
ioptr[com->ierroff] = line_status;
|
1995-07-05 12:15:52 +00:00
|
|
|
com->iptr = ++ioptr;
|
|
|
|
if (ioptr == com->ihighwater
|
1998-08-13 19:03:22 +00:00
|
|
|
&& com->state & CS_RTS_IFLOW)
|
|
|
|
cd_outb(iobase, com->mcr_rts_reg,
|
|
|
|
cy_align,
|
|
|
|
com->mcr_image &=
|
|
|
|
~com->mcr_rts);
|
2004-10-05 07:42:19 +00:00
|
|
|
if (line_status & CD1400_RDSR_OE)
|
1995-07-05 12:15:52 +00:00
|
|
|
CE_RECORD(com, CE_OVERRUN);
|
|
|
|
}
|
|
|
|
goto cont;
|
|
|
|
} else {
|
|
|
|
int ifree;
|
|
|
|
|
1996-10-13 01:09:24 +00:00
|
|
|
count = cd_inb(iobase, CD1400_RDCR, cy_align);
|
1998-03-18 20:52:28 +00:00
|
|
|
if (!count)
|
|
|
|
goto cont;
|
1995-07-05 12:15:52 +00:00
|
|
|
com->bytes_in += count;
|
|
|
|
ioptr = com->iptr;
|
|
|
|
ifree = com->ibufend - ioptr;
|
|
|
|
if (count > ifree) {
|
|
|
|
count -= ifree;
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events += ifree;
|
1996-07-30 19:50:37 +00:00
|
|
|
if (ifree != 0) {
|
2004-10-05 07:42:19 +00:00
|
|
|
if (com->tp != NULL && com->tp->t_do_timestamp)
|
|
|
|
microtime(&com->tp->t_timestamp);
|
1996-07-30 19:50:37 +00:00
|
|
|
do {
|
|
|
|
recv_data = cd_inb(iobase,
|
1997-09-03 01:50:24 +00:00
|
|
|
CD1400_RDSR,
|
|
|
|
cy_align);
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifdef SOFT_HOTCHAR
|
2004-06-26 09:20:07 +00:00
|
|
|
if (com->tp->t_hotchar != 0
|
1996-07-30 19:50:37 +00:00
|
|
|
&& recv_data
|
2004-06-26 09:20:07 +00:00
|
|
|
== com->tp->t_hotchar)
|
2004-10-05 07:42:19 +00:00
|
|
|
swi_sched(cy_fast_ih,
|
2003-11-16 13:31:45 +00:00
|
|
|
0);
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
1996-07-30 19:50:37 +00:00
|
|
|
ioptr[0] = recv_data;
|
1999-02-04 15:54:02 +00:00
|
|
|
ioptr[com->ierroff] = 0;
|
1996-07-30 19:50:37 +00:00
|
|
|
++ioptr;
|
|
|
|
} while (--ifree != 0);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
com->delta_error_counts
|
|
|
|
[CE_INTERRUPT_BUF_OVERFLOW] += count;
|
|
|
|
do {
|
1997-09-03 01:50:24 +00:00
|
|
|
recv_data = cd_inb(iobase, CD1400_RDSR,
|
|
|
|
cy_align);
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifdef SOFT_HOTCHAR
|
2004-06-26 09:20:07 +00:00
|
|
|
if (com->tp->t_hotchar != 0
|
|
|
|
&& recv_data == com->tp->t_hotchar)
|
2004-10-05 07:42:19 +00:00
|
|
|
swi_sched(cy_fast_ih, 0);
|
1995-07-05 12:15:52 +00:00
|
|
|
#endif
|
|
|
|
} while (--count != 0);
|
|
|
|
} else {
|
2004-10-05 07:42:19 +00:00
|
|
|
if (com->tp != NULL && com->tp->t_do_timestamp)
|
|
|
|
microtime(&com->tp->t_timestamp);
|
1995-07-05 12:15:52 +00:00
|
|
|
if (ioptr <= com->ihighwater
|
|
|
|
&& ioptr + count > com->ihighwater
|
|
|
|
&& com->state & CS_RTS_IFLOW)
|
1998-08-13 19:03:22 +00:00
|
|
|
cd_outb(iobase, com->mcr_rts_reg,
|
|
|
|
cy_align,
|
|
|
|
com->mcr_image
|
|
|
|
&= ~com->mcr_rts);
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events += count;
|
1995-07-05 12:15:52 +00:00
|
|
|
do {
|
1997-09-03 01:50:24 +00:00
|
|
|
recv_data = cd_inb(iobase, CD1400_RDSR,
|
|
|
|
cy_align);
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifdef SOFT_HOTCHAR
|
2004-06-26 09:20:07 +00:00
|
|
|
if (com->tp->t_hotchar != 0
|
|
|
|
&& recv_data == com->tp->t_hotchar)
|
2004-10-05 07:42:19 +00:00
|
|
|
swi_sched(cy_fast_ih, 0);
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
1995-07-05 12:15:52 +00:00
|
|
|
ioptr[0] = recv_data;
|
1999-02-04 15:54:02 +00:00
|
|
|
ioptr[com->ierroff] = 0;
|
1995-07-05 12:15:52 +00:00
|
|
|
++ioptr;
|
|
|
|
} while (--count != 0);
|
1995-02-09 09:47:31 +00:00
|
|
|
}
|
1995-07-05 12:15:52 +00:00
|
|
|
com->iptr = ioptr;
|
1995-02-09 09:47:31 +00:00
|
|
|
}
|
1995-07-05 12:15:52 +00:00
|
|
|
cont:
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
/* terminate service context */
|
1995-02-09 09:47:31 +00:00
|
|
|
#ifdef PollMode
|
1996-10-13 01:09:24 +00:00
|
|
|
cd_outb(iobase, CD1400_RIR, cy_align,
|
1995-07-05 12:15:52 +00:00
|
|
|
save_rir
|
|
|
|
& ~(CD1400_RIR_RDIREQ | CD1400_RIR_RBUSY));
|
1995-02-09 09:47:31 +00:00
|
|
|
#else
|
1996-10-13 01:09:24 +00:00
|
|
|
cd_outb(iobase, CD1400_EOSRR, cy_align, 0);
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
if (status & CD1400_SVRR_MDMCH) {
|
|
|
|
struct com_s *com;
|
|
|
|
u_char modem_status;
|
1995-02-09 09:47:31 +00:00
|
|
|
#ifdef PollMode
|
1995-07-05 12:15:52 +00:00
|
|
|
u_char save_mir;
|
1995-02-09 09:47:31 +00:00
|
|
|
#else
|
1995-07-05 12:15:52 +00:00
|
|
|
u_char vector;
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef PollMode
|
1996-10-13 01:09:24 +00:00
|
|
|
save_mir = cd_inb(iobase, CD1400_MIR, cy_align);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
/* enter modem service */
|
1996-10-13 01:09:24 +00:00
|
|
|
cd_outb(iobase, CD1400_CAR, cy_align, save_mir);
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_addr(baseu + cyu * CD1400_NO_OF_CHANNELS)->car
|
1998-11-22 17:40:32 +00:00
|
|
|
= save_mir & CD1400_CAR_CHAN;
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
com = cy_addr(baseu + cyu * CD1400_NO_OF_CHANNELS
|
1995-07-05 12:15:52 +00:00
|
|
|
+ (save_mir & CD1400_MIR_CHAN));
|
1995-02-09 09:47:31 +00:00
|
|
|
#else
|
1995-07-05 12:15:52 +00:00
|
|
|
/* ack modem service */
|
1998-11-23 13:58:55 +00:00
|
|
|
vector = cy_inb(iobase, CY8_SVCACKM, cy_align);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
com = cy_addr(baseu
|
1995-07-05 12:15:52 +00:00
|
|
|
+ ((vector >> CD1400_xIVR_CHAN_SHIFT)
|
|
|
|
& CD1400_xIVR_CHAN));
|
|
|
|
#endif
|
|
|
|
++com->mdm;
|
1996-10-13 01:09:24 +00:00
|
|
|
modem_status = cd_inb(iobase, CD1400_MSVR2, cy_align);
|
1995-07-05 12:15:52 +00:00
|
|
|
if (modem_status != com->last_modem_status) {
|
|
|
|
/*
|
|
|
|
* Schedule high level to handle DCD changes. Note
|
|
|
|
* that we don't use the delta bits anywhere. Some
|
|
|
|
* UARTs mess them up, and it's easy to remember the
|
|
|
|
* previous bits and calculate the delta.
|
|
|
|
*/
|
|
|
|
com->last_modem_status = modem_status;
|
|
|
|
if (!(com->state & CS_CHECKMSR)) {
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events += LOTS_OF_EVENTS;
|
1995-07-05 12:15:52 +00:00
|
|
|
com->state |= CS_CHECKMSR;
|
2004-10-05 07:42:19 +00:00
|
|
|
swi_sched(cy_fast_ih, 0);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifdef SOFT_CTS_OFLOW
|
|
|
|
/* handle CTS change immediately for crisp flow ctl */
|
|
|
|
if (com->state & CS_CTS_OFLOW) {
|
2004-10-05 07:42:19 +00:00
|
|
|
if (modem_status & CD1400_MSVR2_CTS) {
|
1995-07-05 12:15:52 +00:00
|
|
|
com->state |= CS_ODEVREADY;
|
|
|
|
if (com->state >= (CS_BUSY | CS_TTGO
|
|
|
|
| CS_ODEVREADY)
|
|
|
|
&& !(com->intr_enable
|
|
|
|
& CD1400_SRER_TXRDY))
|
1997-09-03 01:50:24 +00:00
|
|
|
cd_outb(iobase, CD1400_SRER,
|
|
|
|
cy_align,
|
1995-07-05 12:15:52 +00:00
|
|
|
com->intr_enable
|
1998-11-28 15:48:09 +00:00
|
|
|
= com->intr_enable
|
|
|
|
& ~CD1400_SRER_TXMPTY
|
|
|
|
| CD1400_SRER_TXRDY);
|
1995-07-05 12:15:52 +00:00
|
|
|
} else {
|
|
|
|
com->state &= ~CS_ODEVREADY;
|
1997-09-03 01:50:24 +00:00
|
|
|
if (com->intr_enable
|
|
|
|
& CD1400_SRER_TXRDY)
|
|
|
|
cd_outb(iobase, CD1400_SRER,
|
|
|
|
cy_align,
|
1995-07-05 12:15:52 +00:00
|
|
|
com->intr_enable
|
1998-11-28 15:48:09 +00:00
|
|
|
= com->intr_enable
|
|
|
|
& ~CD1400_SRER_TXRDY
|
|
|
|
| CD1400_SRER_TXMPTY);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
/* terminate service context */
|
1995-02-09 09:47:31 +00:00
|
|
|
#ifdef PollMode
|
1996-10-13 01:09:24 +00:00
|
|
|
cd_outb(iobase, CD1400_MIR, cy_align,
|
1995-07-05 12:15:52 +00:00
|
|
|
save_mir
|
|
|
|
& ~(CD1400_MIR_RDIREQ | CD1400_MIR_RBUSY));
|
1995-02-09 09:47:31 +00:00
|
|
|
#else
|
1996-10-13 01:09:24 +00:00
|
|
|
cd_outb(iobase, CD1400_EOSRR, cy_align, 0);
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
if (status & CD1400_SVRR_TXRDY) {
|
|
|
|
struct com_s *com;
|
1995-02-09 09:47:31 +00:00
|
|
|
#ifdef PollMode
|
1995-07-05 12:15:52 +00:00
|
|
|
u_char save_tir;
|
1995-02-09 09:47:31 +00:00
|
|
|
#else
|
1995-07-05 12:15:52 +00:00
|
|
|
u_char vector;
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef PollMode
|
1996-10-13 01:09:24 +00:00
|
|
|
save_tir = cd_inb(iobase, CD1400_TIR, cy_align);
|
1995-07-05 12:15:52 +00:00
|
|
|
|
|
|
|
/* enter tx service */
|
1996-10-13 01:09:24 +00:00
|
|
|
cd_outb(iobase, CD1400_CAR, cy_align, save_tir);
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_addr(baseu + cyu * CD1400_NO_OF_CHANNELS)->car
|
1998-11-22 17:40:32 +00:00
|
|
|
= save_tir & CD1400_CAR_CHAN;
|
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
com = cy_addr(baseu
|
1995-07-05 12:15:52 +00:00
|
|
|
+ cyu * CD1400_NO_OF_CHANNELS
|
|
|
|
+ (save_tir & CD1400_TIR_CHAN));
|
1995-02-09 09:47:31 +00:00
|
|
|
#else
|
1995-07-05 12:15:52 +00:00
|
|
|
/* ack transmit service */
|
1998-11-23 13:58:55 +00:00
|
|
|
vector = cy_inb(iobase, CY8_SVCACKT, cy_align);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
com = cy_addr(baseu
|
1995-07-05 12:15:52 +00:00
|
|
|
+ ((vector >> CD1400_xIVR_CHAN_SHIFT)
|
|
|
|
& CD1400_xIVR_CHAN));
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
|
|
|
|
1998-12-17 17:40:13 +00:00
|
|
|
if (com->etc != ETC_NONE) {
|
|
|
|
if (com->intr_enable & CD1400_SRER_TXRDY) {
|
|
|
|
/*
|
|
|
|
* Here due to sloppy SRER_TXRDY
|
|
|
|
* enabling. Ignore. Come back when
|
|
|
|
* tx is empty.
|
|
|
|
*/
|
|
|
|
cd_outb(iobase, CD1400_SRER, cy_align,
|
|
|
|
com->intr_enable
|
1999-01-28 01:59:53 +00:00
|
|
|
= (com->intr_enable
|
|
|
|
& ~CD1400_SRER_TXRDY)
|
1998-12-17 17:40:13 +00:00
|
|
|
| CD1400_SRER_TXMPTY);
|
|
|
|
goto terminate_tx_service;
|
|
|
|
}
|
|
|
|
switch (com->etc) {
|
|
|
|
case CD1400_ETC_SENDBREAK:
|
|
|
|
case CD1400_ETC_STOPBREAK:
|
|
|
|
/*
|
|
|
|
* Start the command. Come back on
|
|
|
|
* next tx empty interrupt, hopefully
|
|
|
|
* after command has been executed.
|
|
|
|
*/
|
|
|
|
cd_outb(iobase, CD1400_COR2, cy_align,
|
|
|
|
com->cor[1] |= CD1400_COR2_ETC);
|
|
|
|
cd_outb(iobase, CD1400_TDR, cy_align,
|
|
|
|
CD1400_ETC_CMD);
|
|
|
|
cd_outb(iobase, CD1400_TDR, cy_align,
|
|
|
|
com->etc);
|
|
|
|
if (com->etc == CD1400_ETC_SENDBREAK)
|
|
|
|
com->etc = ETC_BREAK_STARTING;
|
|
|
|
else
|
|
|
|
com->etc = ETC_BREAK_ENDING;
|
|
|
|
goto terminate_tx_service;
|
|
|
|
case ETC_BREAK_STARTING:
|
|
|
|
/*
|
|
|
|
* BREAK is now on. Continue with
|
|
|
|
* SRER_TXMPTY processing, hopefully
|
|
|
|
* don't come back.
|
|
|
|
*/
|
|
|
|
com->etc = ETC_BREAK_STARTED;
|
|
|
|
break;
|
|
|
|
case ETC_BREAK_STARTED:
|
|
|
|
/*
|
|
|
|
* Came back due to sloppy SRER_TXMPTY
|
|
|
|
* enabling. Hope again.
|
|
|
|
*/
|
|
|
|
break;
|
|
|
|
case ETC_BREAK_ENDING:
|
|
|
|
/*
|
|
|
|
* BREAK is now off. Continue with
|
|
|
|
* SRER_TXMPTY processing and don't
|
|
|
|
* come back. The SWI handler will
|
|
|
|
* restart tx interrupts if necessary.
|
|
|
|
*/
|
|
|
|
cd_outb(iobase, CD1400_COR2, cy_align,
|
|
|
|
com->cor[1]
|
|
|
|
&= ~CD1400_COR2_ETC);
|
|
|
|
com->etc = ETC_BREAK_ENDED;
|
|
|
|
if (!(com->state & CS_ODONE)) {
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events += LOTS_OF_EVENTS;
|
1998-12-17 17:40:13 +00:00
|
|
|
com->state |= CS_ODONE;
|
2004-10-05 07:42:19 +00:00
|
|
|
swi_sched(cy_fast_ih, 0);
|
1998-12-17 17:40:13 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case ETC_BREAK_ENDED:
|
|
|
|
/*
|
|
|
|
* Shouldn't get here. Hope again.
|
|
|
|
*/
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
1998-11-28 15:48:09 +00:00
|
|
|
if (com->intr_enable & CD1400_SRER_TXMPTY) {
|
|
|
|
if (!(com->extra_state & CSE_ODONE)) {
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events += LOTS_OF_EVENTS;
|
1998-11-28 15:48:09 +00:00
|
|
|
com->extra_state |= CSE_ODONE;
|
2004-10-05 07:42:19 +00:00
|
|
|
swi_sched(cy_fast_ih, 0);
|
1998-11-28 15:48:09 +00:00
|
|
|
}
|
|
|
|
cd_outb(iobase, CD1400_SRER, cy_align,
|
|
|
|
com->intr_enable
|
|
|
|
&= ~CD1400_SRER_TXMPTY);
|
|
|
|
goto terminate_tx_service;
|
|
|
|
}
|
1995-07-05 12:15:52 +00:00
|
|
|
if (com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
|
|
|
|
u_char *ioptr;
|
|
|
|
u_int ocount;
|
|
|
|
|
|
|
|
ioptr = com->obufq.l_head;
|
|
|
|
ocount = com->obufq.l_tail - ioptr;
|
|
|
|
if (ocount > CD1400_TX_FIFO_SIZE)
|
|
|
|
ocount = CD1400_TX_FIFO_SIZE;
|
|
|
|
com->bytes_out += ocount;
|
|
|
|
do
|
1997-09-03 01:50:24 +00:00
|
|
|
cd_outb(iobase, CD1400_TDR, cy_align,
|
|
|
|
*ioptr++);
|
1995-07-05 12:15:52 +00:00
|
|
|
while (--ocount != 0);
|
|
|
|
com->obufq.l_head = ioptr;
|
|
|
|
if (ioptr >= com->obufq.l_tail) {
|
|
|
|
struct lbq *qp;
|
|
|
|
|
|
|
|
qp = com->obufq.l_next;
|
|
|
|
qp->l_queued = FALSE;
|
|
|
|
qp = qp->l_next;
|
|
|
|
if (qp != NULL) {
|
|
|
|
com->obufq.l_head = qp->l_head;
|
|
|
|
com->obufq.l_tail = qp->l_tail;
|
|
|
|
com->obufq.l_next = qp;
|
|
|
|
} else {
|
|
|
|
/* output just completed */
|
|
|
|
com->state &= ~CS_BUSY;
|
1998-11-28 15:48:09 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* The setting of CSE_ODONE may be
|
|
|
|
* stale here. We currently only
|
|
|
|
* use it when CS_BUSY is set, and
|
|
|
|
* fixing it when we clear CS_BUSY
|
|
|
|
* is easiest.
|
|
|
|
*/
|
|
|
|
if (com->extra_state & CSE_ODONE) {
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events -= LOTS_OF_EVENTS;
|
1998-11-28 15:48:09 +00:00
|
|
|
com->extra_state &= ~CSE_ODONE;
|
|
|
|
}
|
|
|
|
|
1996-10-13 01:09:24 +00:00
|
|
|
cd_outb(iobase, CD1400_SRER, cy_align,
|
1995-07-05 12:15:52 +00:00
|
|
|
com->intr_enable
|
1999-01-28 01:59:53 +00:00
|
|
|
= (com->intr_enable
|
|
|
|
& ~CD1400_SRER_TXRDY)
|
1998-11-28 15:48:09 +00:00
|
|
|
| CD1400_SRER_TXMPTY);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
if (!(com->state & CS_ODONE)) {
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events += LOTS_OF_EVENTS;
|
1995-07-05 12:15:52 +00:00
|
|
|
com->state |= CS_ODONE;
|
1997-09-03 01:50:24 +00:00
|
|
|
|
|
|
|
/* handle at high level ASAP */
|
2004-10-05 07:42:19 +00:00
|
|
|
swi_sched(cy_fast_ih, 0);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
/* terminate service context */
|
1998-11-28 15:48:09 +00:00
|
|
|
terminate_tx_service:
|
1995-02-09 09:47:31 +00:00
|
|
|
#ifdef PollMode
|
1996-10-13 01:09:24 +00:00
|
|
|
cd_outb(iobase, CD1400_TIR, cy_align,
|
1995-07-05 12:15:52 +00:00
|
|
|
save_tir
|
|
|
|
& ~(CD1400_TIR_RDIREQ | CD1400_TIR_RBUSY));
|
1995-02-09 09:47:31 +00:00
|
|
|
#else
|
1996-10-13 01:09:24 +00:00
|
|
|
cd_outb(iobase, CD1400_EOSRR, cy_align, 0);
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
}
|
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
/* ensure an edge for the next interrupt */
|
1998-11-23 13:58:55 +00:00
|
|
|
cy_outb(cy_iobase, CY_CLEAR_INTR, cy_align, 0);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
swi_sched(cy_slow_ih, SWI_DELAY);
|
1997-08-30 08:08:10 +00:00
|
|
|
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
1995-02-09 09:47:31 +00:00
|
|
|
}
|
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
static void
|
|
|
|
cybreak(struct tty *tp, int sig)
|
1995-02-09 09:47:31 +00:00
|
|
|
{
|
1995-07-05 12:15:52 +00:00
|
|
|
struct com_s *com;
|
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
com = tp->t_sc;
|
|
|
|
if (sig)
|
1998-12-17 17:40:13 +00:00
|
|
|
cd_etc(com, CD1400_ETC_SENDBREAK);
|
2004-10-05 07:42:19 +00:00
|
|
|
else
|
1998-12-17 17:40:13 +00:00
|
|
|
cd_etc(com, CD1400_ETC_STOPBREAK);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1998-08-11 17:01:32 +00:00
|
|
|
static void
|
2004-10-05 07:42:19 +00:00
|
|
|
cypoll(void *arg)
|
1995-07-05 12:15:52 +00:00
|
|
|
{
|
|
|
|
int unit;
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifdef CyDebug
|
|
|
|
++cy_timeouts;
|
|
|
|
#endif
|
2004-10-05 07:42:19 +00:00
|
|
|
if (cy_events == 0)
|
1995-07-05 12:15:52 +00:00
|
|
|
return;
|
|
|
|
repeat:
|
2004-10-05 07:42:19 +00:00
|
|
|
for (unit = 0; unit < NPORTS; ++unit) {
|
1995-07-05 12:15:52 +00:00
|
|
|
struct com_s *com;
|
|
|
|
int incc;
|
|
|
|
struct tty *tp;
|
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
com = cy_addr(unit);
|
1995-07-05 12:15:52 +00:00
|
|
|
if (com == NULL)
|
|
|
|
continue;
|
|
|
|
tp = com->tp;
|
|
|
|
if (tp == NULL) {
|
|
|
|
/*
|
|
|
|
* XXX forget any events related to closed devices
|
|
|
|
* (actually never opened devices) so that we don't
|
|
|
|
* loop.
|
|
|
|
*/
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
1995-07-05 12:15:52 +00:00
|
|
|
incc = com->iptr - com->ibuf;
|
|
|
|
com->iptr = com->ibuf;
|
|
|
|
if (com->state & CS_CHECKMSR) {
|
|
|
|
incc += LOTS_OF_EVENTS;
|
|
|
|
com->state &= ~CS_CHECKMSR;
|
|
|
|
}
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events -= incc;
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1995-07-05 12:15:52 +00:00
|
|
|
if (incc != 0)
|
|
|
|
log(LOG_DEBUG,
|
2004-10-05 07:42:19 +00:00
|
|
|
"cy%d: %d events for device with no tp\n",
|
1995-07-05 12:15:52 +00:00
|
|
|
unit, incc);
|
|
|
|
continue;
|
|
|
|
}
|
1999-02-04 15:54:02 +00:00
|
|
|
if (com->iptr != com->ibuf) {
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
2004-10-05 07:42:19 +00:00
|
|
|
cyinput(com);
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
if (com->state & CS_CHECKMSR) {
|
|
|
|
u_char delta_modem_status;
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
2004-10-05 07:42:19 +00:00
|
|
|
cyinput(com);
|
1995-07-05 12:15:52 +00:00
|
|
|
delta_modem_status = com->last_modem_status
|
|
|
|
^ com->prev_modem_status;
|
|
|
|
com->prev_modem_status = com->last_modem_status;
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events -= LOTS_OF_EVENTS;
|
1995-07-05 12:15:52 +00:00
|
|
|
com->state &= ~CS_CHECKMSR;
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
2004-10-05 07:42:19 +00:00
|
|
|
if (delta_modem_status & CD1400_MSVR2_CD)
|
2004-06-04 20:04:52 +00:00
|
|
|
ttyld_modem(tp,
|
2004-10-05 07:42:19 +00:00
|
|
|
com->prev_modem_status & CD1400_MSVR2_CD);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
1998-11-28 15:48:09 +00:00
|
|
|
if (com->extra_state & CSE_ODONE) {
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events -= LOTS_OF_EVENTS;
|
1998-11-28 15:48:09 +00:00
|
|
|
com->extra_state &= ~CSE_ODONE;
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1998-11-28 15:48:09 +00:00
|
|
|
if (!(com->state & CS_BUSY)) {
|
|
|
|
tp->t_state &= ~TS_BUSY;
|
|
|
|
ttwwakeup(com->tp);
|
|
|
|
}
|
1998-12-17 17:40:13 +00:00
|
|
|
if (com->etc != ETC_NONE) {
|
|
|
|
if (com->etc == ETC_BREAK_ENDED)
|
|
|
|
com->etc = ETC_NONE;
|
|
|
|
wakeup(&com->etc);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (com->state & CS_ODONE) {
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events -= LOTS_OF_EVENTS;
|
1998-12-17 17:40:13 +00:00
|
|
|
com->state &= ~CS_ODONE;
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
2004-06-04 16:02:56 +00:00
|
|
|
ttyld_start(tp);
|
1998-11-28 15:48:09 +00:00
|
|
|
}
|
2004-10-05 07:42:19 +00:00
|
|
|
if (cy_events == 0)
|
1995-07-05 12:15:52 +00:00
|
|
|
break;
|
1995-02-09 09:47:31 +00:00
|
|
|
}
|
2004-10-05 07:42:19 +00:00
|
|
|
if (cy_events >= LOTS_OF_EVENTS)
|
1995-07-05 12:15:52 +00:00
|
|
|
goto repeat;
|
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
static int
|
2004-10-05 07:42:19 +00:00
|
|
|
cyparam(struct tty *tp, struct termios *t)
|
1995-02-09 09:47:31 +00:00
|
|
|
{
|
1995-07-05 12:15:52 +00:00
|
|
|
int bits;
|
|
|
|
int cflag;
|
|
|
|
struct com_s *com;
|
|
|
|
u_char cor_change;
|
1998-08-13 19:03:22 +00:00
|
|
|
u_long cy_clock;
|
1995-07-05 12:15:52 +00:00
|
|
|
int idivisor;
|
|
|
|
int iflag;
|
|
|
|
int iprescaler;
|
1995-02-09 09:47:31 +00:00
|
|
|
int itimeout;
|
1995-07-05 12:15:52 +00:00
|
|
|
int odivisor;
|
|
|
|
int oprescaler;
|
1995-02-09 09:47:31 +00:00
|
|
|
u_char opt;
|
1995-07-05 12:15:52 +00:00
|
|
|
int s;
|
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
com = tp->t_sc;
|
1998-08-13 13:54:10 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
/* check requested parameters */
|
1998-08-13 19:03:22 +00:00
|
|
|
cy_clock = CY_CLOCK(com->gfrcr_image);
|
2004-10-05 07:42:19 +00:00
|
|
|
idivisor = cyspeed(t->c_ispeed, cy_clock, &iprescaler);
|
2003-09-27 12:40:23 +00:00
|
|
|
if (idivisor <= 0)
|
1995-07-05 12:15:52 +00:00
|
|
|
return (EINVAL);
|
2004-10-05 07:42:19 +00:00
|
|
|
odivisor = cyspeed(t->c_ospeed != 0 ? t->c_ospeed : tp->t_ospeed,
|
2003-09-27 12:40:23 +00:00
|
|
|
cy_clock, &oprescaler);
|
|
|
|
if (odivisor <= 0)
|
1995-07-05 12:15:52 +00:00
|
|
|
return (EINVAL);
|
|
|
|
|
|
|
|
/* parameters are OK, convert them to the com struct and the device */
|
1998-08-13 19:03:22 +00:00
|
|
|
s = spltty();
|
2003-09-27 12:40:23 +00:00
|
|
|
if (t->c_ospeed == 0)
|
2004-10-05 07:42:19 +00:00
|
|
|
(void)cymodem(tp, 0, SER_DTR);
|
1995-07-05 12:15:52 +00:00
|
|
|
else
|
2004-10-05 07:42:19 +00:00
|
|
|
(void)cymodem(tp, SER_DTR, 0);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
(void) cysetwater(com, t->c_ispeed);
|
1999-02-04 15:54:02 +00:00
|
|
|
|
|
|
|
/* XXX we don't actually change the speed atomically. */
|
|
|
|
|
2003-09-27 12:40:23 +00:00
|
|
|
cd_setreg(com, CD1400_RBPR, idivisor);
|
|
|
|
cd_setreg(com, CD1400_RCOR, iprescaler);
|
|
|
|
cd_setreg(com, CD1400_TBPR, odivisor);
|
|
|
|
cd_setreg(com, CD1400_TCOR, oprescaler);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* channel control
|
|
|
|
* receiver enable
|
|
|
|
* transmitter enable (always set)
|
|
|
|
*/
|
1995-07-05 12:15:52 +00:00
|
|
|
cflag = t->c_cflag;
|
|
|
|
opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN
|
|
|
|
| (cflag & CREAD ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS);
|
|
|
|
if (opt != com->channel_control) {
|
|
|
|
com->channel_control = opt;
|
1998-11-22 17:40:32 +00:00
|
|
|
cd1400_channel_cmd(com, opt);
|
1995-02-09 09:47:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef Smarts
|
|
|
|
/* set special chars */
|
1995-07-05 12:15:52 +00:00
|
|
|
/* XXX if one is _POSIX_VDISABLE, can't use some others */
|
|
|
|
if (t->c_cc[VSTOP] != _POSIX_VDISABLE)
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_SCHR1, t->c_cc[VSTOP]);
|
1995-07-05 12:15:52 +00:00
|
|
|
if (t->c_cc[VSTART] != _POSIX_VDISABLE)
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_SCHR2, t->c_cc[VSTART]);
|
1995-07-05 12:15:52 +00:00
|
|
|
if (t->c_cc[VINTR] != _POSIX_VDISABLE)
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_SCHR3, t->c_cc[VINTR]);
|
1995-07-05 12:15:52 +00:00
|
|
|
if (t->c_cc[VSUSP] != _POSIX_VDISABLE)
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_SCHR4, t->c_cc[VSUSP]);
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* set channel option register 1 -
|
|
|
|
* parity mode
|
|
|
|
* stop bits
|
|
|
|
* char length
|
|
|
|
*/
|
|
|
|
opt = 0;
|
|
|
|
/* parity */
|
|
|
|
if (cflag & PARENB) {
|
1995-07-05 12:15:52 +00:00
|
|
|
if (cflag & PARODD)
|
|
|
|
opt |= CD1400_COR1_PARODD;
|
|
|
|
opt |= CD1400_COR1_PARNORMAL;
|
1995-02-09 09:47:31 +00:00
|
|
|
}
|
1995-07-05 12:15:52 +00:00
|
|
|
iflag = t->c_iflag;
|
1995-02-09 09:47:31 +00:00
|
|
|
if (!(iflag & INPCK))
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR1_NOINPCK;
|
|
|
|
bits = 1 + 1;
|
1995-02-09 09:47:31 +00:00
|
|
|
/* stop bits */
|
1995-07-05 12:15:52 +00:00
|
|
|
if (cflag & CSTOPB) {
|
|
|
|
++bits;
|
|
|
|
opt |= CD1400_COR1_STOP2;
|
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
/* char length */
|
1995-07-05 12:15:52 +00:00
|
|
|
switch (cflag & CSIZE) {
|
|
|
|
case CS5:
|
|
|
|
bits += 5;
|
|
|
|
opt |= CD1400_COR1_CS5;
|
|
|
|
break;
|
|
|
|
case CS6:
|
|
|
|
bits += 6;
|
|
|
|
opt |= CD1400_COR1_CS6;
|
|
|
|
break;
|
|
|
|
case CS7:
|
|
|
|
bits += 7;
|
|
|
|
opt |= CD1400_COR1_CS7;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
bits += 8;
|
|
|
|
opt |= CD1400_COR1_CS8;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
cor_change = 0;
|
|
|
|
if (opt != com->cor[0]) {
|
|
|
|
cor_change |= CD1400_CCR_COR1;
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_COR1, com->cor[0] = opt);
|
1995-02-09 09:47:31 +00:00
|
|
|
}
|
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
/*
|
|
|
|
* Set receive time-out period, normally to max(one char time, 5 ms).
|
|
|
|
*/
|
2003-09-27 12:40:23 +00:00
|
|
|
itimeout = (1000 * bits + t->c_ispeed - 1) / t->c_ispeed;
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifdef SOFT_HOTCHAR
|
|
|
|
#define MIN_RTP 1
|
|
|
|
#else
|
|
|
|
#define MIN_RTP 5
|
|
|
|
#endif
|
2003-09-27 12:40:23 +00:00
|
|
|
if (itimeout < MIN_RTP)
|
|
|
|
itimeout = MIN_RTP;
|
1995-07-05 12:15:52 +00:00
|
|
|
if (!(t->c_lflag & ICANON) && t->c_cc[VMIN] != 0 && t->c_cc[VTIME] != 0
|
|
|
|
&& t->c_cc[VTIME] * 10 > itimeout)
|
|
|
|
itimeout = t->c_cc[VTIME] * 10;
|
|
|
|
if (itimeout > 255)
|
|
|
|
itimeout = 255;
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_RTPR, itimeout);
|
1995-07-05 12:15:52 +00:00
|
|
|
|
1995-02-09 09:47:31 +00:00
|
|
|
/*
|
|
|
|
* set channel option register 2 -
|
|
|
|
* flow control
|
|
|
|
*/
|
|
|
|
opt = 0;
|
|
|
|
#ifdef Smarts
|
|
|
|
if (iflag & IXANY)
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR2_IXANY;
|
1995-02-09 09:47:31 +00:00
|
|
|
if (iflag & IXOFF)
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR2_IXOFF;
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifndef SOFT_CTS_OFLOW
|
1995-02-09 09:47:31 +00:00
|
|
|
if (cflag & CCTS_OFLOW)
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR2_CCTS_OFLOW;
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
1995-07-05 12:15:52 +00:00
|
|
|
if (opt != com->cor[1]) {
|
|
|
|
cor_change |= CD1400_CCR_COR2;
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_COR2, com->cor[1] = opt);
|
1995-02-09 09:47:31 +00:00
|
|
|
}
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1995-02-09 09:47:31 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* set channel option register 3 -
|
|
|
|
* receiver FIFO interrupt threshold
|
|
|
|
* flow control
|
|
|
|
*/
|
1995-07-05 12:15:52 +00:00
|
|
|
opt = RxFifoThreshold;
|
1995-02-09 09:47:31 +00:00
|
|
|
#ifdef Smarts
|
|
|
|
if (t->c_lflag & ICANON)
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR3_SCD34; /* detect INTR & SUSP chars */
|
1995-02-09 09:47:31 +00:00
|
|
|
if (iflag & IXOFF)
|
1995-07-05 12:15:52 +00:00
|
|
|
/* detect and transparently handle START and STOP chars */
|
|
|
|
opt |= CD1400_COR3_FCT | CD1400_COR3_SCD12;
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
1995-07-05 12:15:52 +00:00
|
|
|
if (opt != com->cor[2]) {
|
|
|
|
cor_change |= CD1400_CCR_COR3;
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_COR3, com->cor[2] = opt);
|
1995-02-09 09:47:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* notify the CD1400 if COR1-3 have changed */
|
1995-07-05 12:15:52 +00:00
|
|
|
if (cor_change)
|
1998-11-22 17:40:32 +00:00
|
|
|
cd1400_channel_cmd(com, CD1400_CCR_CMDCORCHG | cor_change);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* set channel option register 4 -
|
|
|
|
* CR/NL processing
|
|
|
|
* break processing
|
|
|
|
* received exception processing
|
|
|
|
*/
|
|
|
|
opt = 0;
|
|
|
|
if (iflag & IGNCR)
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR4_IGNCR;
|
1995-02-09 09:47:31 +00:00
|
|
|
#ifdef Smarts
|
|
|
|
/*
|
|
|
|
* we need a new ttyinput() for this, as we don't want to
|
|
|
|
* have ICRNL && INLCR being done in both layers, or to have
|
|
|
|
* synchronisation problems
|
|
|
|
*/
|
|
|
|
if (iflag & ICRNL)
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR4_ICRNL;
|
1995-02-09 09:47:31 +00:00
|
|
|
if (iflag & INLCR)
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR4_INLCR;
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
|
|
|
if (iflag & IGNBRK)
|
1998-12-17 18:43:08 +00:00
|
|
|
opt |= CD1400_COR4_IGNBRK | CD1400_COR4_NOBRKINT;
|
|
|
|
/*
|
|
|
|
* The `-ignbrk -brkint parmrk' case is not handled by the hardware,
|
|
|
|
* so only tell the hardware about -brkint if -parmrk.
|
|
|
|
*/
|
|
|
|
if (!(iflag & (BRKINT | PARMRK)))
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR4_NOBRKINT;
|
|
|
|
#if 0
|
|
|
|
/* XXX using this "intelligence" breaks reporting of overruns. */
|
1995-02-09 09:47:31 +00:00
|
|
|
if (iflag & IGNPAR)
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR4_PFO_DISCARD;
|
1995-02-09 09:47:31 +00:00
|
|
|
else {
|
1995-07-05 12:15:52 +00:00
|
|
|
if (iflag & PARMRK)
|
|
|
|
opt |= CD1400_COR4_PFO_ESC;
|
|
|
|
else
|
|
|
|
opt |= CD1400_COR4_PFO_NUL;
|
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
#else
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR4_PFO_EXCEPTION;
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_COR4, opt);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* set channel option register 5 -
|
|
|
|
*/
|
|
|
|
opt = 0;
|
|
|
|
if (iflag & ISTRIP)
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR5_ISTRIP;
|
|
|
|
if (t->c_iflag & IEXTEN)
|
|
|
|
/* enable LNEXT (e.g. ctrl-v quoting) handling */
|
|
|
|
opt |= CD1400_COR5_LNEXT;
|
1995-02-09 09:47:31 +00:00
|
|
|
#ifdef Smarts
|
|
|
|
if (t->c_oflag & ONLCR)
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR5_ONLCR;
|
1995-02-09 09:47:31 +00:00
|
|
|
if (t->c_oflag & OCRNL)
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR5_OCRNL;
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_COR5, opt);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
/*
|
1996-12-05 12:43:30 +00:00
|
|
|
* We always generate modem status change interrupts for CD changes.
|
|
|
|
* Among other things, this is necessary to track TS_CARR_ON for
|
|
|
|
* pstat to print even when the driver doesn't care. CD changes
|
|
|
|
* should be rare so interrupts for them are not worth extra code to
|
|
|
|
* avoid. We avoid interrupts for other modem status changes (except
|
|
|
|
* for CTS changes when SOFT_CTS_OFLOW is configured) since this is
|
|
|
|
* simplest and best.
|
1995-07-05 12:15:52 +00:00
|
|
|
*/
|
1996-12-05 12:43:30 +00:00
|
|
|
|
1995-02-09 09:47:31 +00:00
|
|
|
/*
|
|
|
|
* set modem change option register 1
|
|
|
|
* generate modem interrupts on which 1 -> 0 input transitions
|
|
|
|
* also controls auto-DTR output flow-control, which we don't use
|
|
|
|
*/
|
1996-12-05 12:43:30 +00:00
|
|
|
opt = CD1400_MCOR1_CDzd;
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifdef SOFT_CTS_OFLOW
|
|
|
|
if (cflag & CCTS_OFLOW)
|
|
|
|
opt |= CD1400_MCOR1_CTSzd;
|
|
|
|
#endif
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_MCOR1, opt);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* set modem change option register 2
|
|
|
|
* generate modem interrupts on specific 0 -> 1 input transitions
|
|
|
|
*/
|
1996-12-05 12:43:30 +00:00
|
|
|
opt = CD1400_MCOR2_CDod;
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifdef SOFT_CTS_OFLOW
|
|
|
|
if (cflag & CCTS_OFLOW)
|
|
|
|
opt |= CD1400_MCOR2_CTSod;
|
|
|
|
#endif
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_MCOR2, opt);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
/*
|
|
|
|
* XXX should have done this long ago, but there is too much state
|
|
|
|
* to change all atomically.
|
|
|
|
*/
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
com->state &= ~CS_TTGO;
|
|
|
|
if (!(tp->t_state & TS_TTSTOP))
|
|
|
|
com->state |= CS_TTGO;
|
1996-11-13 18:31:57 +00:00
|
|
|
if (cflag & CRTS_IFLOW) {
|
|
|
|
com->state |= CS_RTS_IFLOW;
|
|
|
|
/*
|
|
|
|
* If CS_RTS_IFLOW just changed from off to on, the change
|
2004-10-05 07:42:19 +00:00
|
|
|
* needs to be propagated to CD1400_MSVR1_RTS. This isn't urgent,
|
|
|
|
* so do it later by calling cystart() instead of repeating
|
|
|
|
* a lot of code from cystart() here.
|
1996-11-13 18:31:57 +00:00
|
|
|
*/
|
|
|
|
} else if (com->state & CS_RTS_IFLOW) {
|
1995-07-05 12:15:52 +00:00
|
|
|
com->state &= ~CS_RTS_IFLOW;
|
1996-11-13 18:31:57 +00:00
|
|
|
/*
|
2004-10-05 07:42:19 +00:00
|
|
|
* CS_RTS_IFLOW just changed from on to off. Force CD1400_MSVR1_RTS
|
|
|
|
* on here, since cystart() won't do it later.
|
1996-11-13 18:31:57 +00:00
|
|
|
*/
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, com->mcr_rts_reg,
|
|
|
|
com->mcr_image |= com->mcr_rts);
|
1996-11-13 18:31:57 +00:00
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
/*
|
|
|
|
* Set up state to handle output flow control.
|
|
|
|
* XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
|
|
|
|
* Now has 10+ msec latency, while CTS flow has 50- usec latency.
|
|
|
|
*/
|
|
|
|
com->state |= CS_ODEVREADY;
|
|
|
|
#ifdef SOFT_CTS_OFLOW
|
|
|
|
com->state &= ~CS_CTS_OFLOW;
|
|
|
|
if (cflag & CCTS_OFLOW) {
|
|
|
|
com->state |= CS_CTS_OFLOW;
|
2004-10-05 07:42:19 +00:00
|
|
|
if (!(com->last_modem_status & CD1400_MSVR2_CTS))
|
1995-07-05 12:15:52 +00:00
|
|
|
com->state &= ~CS_ODEVREADY;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
/* XXX shouldn't call functions while intrs are disabled. */
|
|
|
|
disc_optim(tp, t, com);
|
|
|
|
#if 0
|
|
|
|
/*
|
2004-10-05 07:42:19 +00:00
|
|
|
* Recover from fiddling with CS_TTGO. We used to call cyintr1()
|
1995-07-05 12:15:52 +00:00
|
|
|
* unconditionally, but that defeated the careful discarding of
|
2004-10-05 07:42:19 +00:00
|
|
|
* stale input in cyopen().
|
1995-07-05 12:15:52 +00:00
|
|
|
*/
|
|
|
|
if (com->state >= (CS_BUSY | CS_TTGO))
|
2004-10-05 07:42:19 +00:00
|
|
|
cyintr1(com);
|
1995-07-05 12:15:52 +00:00
|
|
|
#endif
|
|
|
|
if (com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
|
|
|
|
if (!(com->intr_enable & CD1400_SRER_TXRDY))
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_SRER,
|
1998-11-28 15:48:09 +00:00
|
|
|
com->intr_enable
|
1999-01-28 01:59:53 +00:00
|
|
|
= (com->intr_enable & ~CD1400_SRER_TXMPTY)
|
1998-11-28 15:48:09 +00:00
|
|
|
| CD1400_SRER_TXRDY);
|
1995-07-05 12:15:52 +00:00
|
|
|
} else {
|
|
|
|
if (com->intr_enable & CD1400_SRER_TXRDY)
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_SRER,
|
1998-11-28 15:48:09 +00:00
|
|
|
com->intr_enable
|
1999-01-28 01:59:53 +00:00
|
|
|
= (com->intr_enable & ~CD1400_SRER_TXRDY)
|
1998-11-28 15:48:09 +00:00
|
|
|
| CD1400_SRER_TXMPTY);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1995-07-05 12:15:52 +00:00
|
|
|
splx(s);
|
2004-10-05 07:42:19 +00:00
|
|
|
cystart(tp);
|
1999-02-04 15:54:02 +00:00
|
|
|
if (com->ibufold != NULL) {
|
|
|
|
free(com->ibufold, M_DEVBUF);
|
|
|
|
com->ibufold = NULL;
|
|
|
|
}
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
2004-10-05 07:42:19 +00:00
|
|
|
cysetwater(struct com_s *com, speed_t speed)
|
1999-02-04 15:54:02 +00:00
|
|
|
{
|
|
|
|
int cp4ticks;
|
|
|
|
u_char *ibuf;
|
|
|
|
int ibufsize;
|
|
|
|
struct tty *tp;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Make the buffer size large enough to handle a softtty interrupt
|
|
|
|
* latency of about 2 ticks without loss of throughput or data
|
|
|
|
* (about 3 ticks if input flow control is not used or not honoured,
|
|
|
|
* but a bit less for CS5-CS7 modes).
|
|
|
|
*/
|
|
|
|
cp4ticks = speed / 10 / hz * 4;
|
|
|
|
for (ibufsize = 128; ibufsize < cp4ticks;)
|
|
|
|
ibufsize <<= 1;
|
|
|
|
if (ibufsize == com->ibufsize) {
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Allocate input buffer. The extra factor of 2 in the size is
|
|
|
|
* to allow for an error byte for each input byte.
|
|
|
|
*/
|
|
|
|
ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT);
|
|
|
|
if (ibuf == NULL) {
|
|
|
|
return (ENOMEM);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Initialize non-critical variables. */
|
|
|
|
com->ibufold = com->ibuf;
|
|
|
|
com->ibufsize = ibufsize;
|
|
|
|
tp = com->tp;
|
|
|
|
if (tp != NULL) {
|
|
|
|
tp->t_ififosize = 2 * ibufsize;
|
|
|
|
tp->t_ispeedwat = (speed_t)-1;
|
|
|
|
tp->t_ospeedwat = (speed_t)-1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Read current input buffer, if any. Continue with interrupts
|
|
|
|
* disabled.
|
|
|
|
*/
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
1999-02-04 15:54:02 +00:00
|
|
|
if (com->iptr != com->ibuf)
|
2004-10-05 07:42:19 +00:00
|
|
|
cyinput(com);
|
1999-02-04 15:54:02 +00:00
|
|
|
|
|
|
|
/*-
|
|
|
|
* Initialize critical variables, including input buffer watermarks.
|
|
|
|
* The external device is asked to stop sending when the buffer
|
|
|
|
* exactly reaches high water, or when the high level requests it.
|
|
|
|
* The high level is notified immediately (rather than at a later
|
|
|
|
* clock tick) when this watermark is reached.
|
|
|
|
* The buffer size is chosen so the watermark should almost never
|
|
|
|
* be reached.
|
|
|
|
* The low watermark is invisibly 0 since the buffer is always
|
|
|
|
* emptied all at once.
|
|
|
|
*/
|
|
|
|
com->iptr = com->ibuf = ibuf;
|
|
|
|
com->ibufend = ibuf + ibufsize;
|
|
|
|
com->ierroff = ibufsize;
|
|
|
|
com->ihighwater = ibuf + 3 * ibufsize / 4;
|
2000-09-07 01:33:02 +00:00
|
|
|
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1995-07-05 12:15:52 +00:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2004-10-05 07:42:19 +00:00
|
|
|
cystart(struct tty *tp)
|
1995-02-09 09:47:31 +00:00
|
|
|
{
|
1995-07-05 12:15:52 +00:00
|
|
|
struct com_s *com;
|
1995-02-09 09:47:31 +00:00
|
|
|
int s;
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifdef CyDebug
|
|
|
|
bool_t started;
|
|
|
|
#endif
|
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
com = tp->t_sc;
|
1995-07-05 12:15:52 +00:00
|
|
|
s = spltty();
|
1995-02-09 09:47:31 +00:00
|
|
|
|
|
|
|
#ifdef CyDebug
|
1995-07-05 12:15:52 +00:00
|
|
|
++com->start_count;
|
|
|
|
started = FALSE;
|
1995-02-09 09:47:31 +00:00
|
|
|
#endif
|
|
|
|
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
1995-07-05 12:15:52 +00:00
|
|
|
if (tp->t_state & TS_TTSTOP) {
|
|
|
|
com->state &= ~CS_TTGO;
|
|
|
|
if (com->intr_enable & CD1400_SRER_TXRDY)
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_SRER,
|
1998-11-28 15:48:09 +00:00
|
|
|
com->intr_enable
|
1999-01-28 01:59:53 +00:00
|
|
|
= (com->intr_enable & ~CD1400_SRER_TXRDY)
|
1998-11-28 15:48:09 +00:00
|
|
|
| CD1400_SRER_TXMPTY);
|
1995-07-05 12:15:52 +00:00
|
|
|
} else {
|
|
|
|
com->state |= CS_TTGO;
|
|
|
|
if (com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)
|
|
|
|
&& !(com->intr_enable & CD1400_SRER_TXRDY))
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_SRER,
|
1998-11-28 15:48:09 +00:00
|
|
|
com->intr_enable
|
1999-01-28 01:59:53 +00:00
|
|
|
= (com->intr_enable & ~CD1400_SRER_TXMPTY)
|
1998-11-28 15:48:09 +00:00
|
|
|
| CD1400_SRER_TXRDY);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
if (tp->t_state & TS_TBLOCK) {
|
1998-08-13 19:03:22 +00:00
|
|
|
if (com->mcr_image & com->mcr_rts && com->state & CS_RTS_IFLOW)
|
1995-07-05 12:15:52 +00:00
|
|
|
#if 0
|
2004-10-05 07:42:19 +00:00
|
|
|
outb(com->modem_ctl_port, com->mcr_image &= ~CD1400_MSVR1_RTS);
|
1995-07-05 12:15:52 +00:00
|
|
|
#else
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, com->mcr_rts_reg,
|
|
|
|
com->mcr_image &= ~com->mcr_rts);
|
1995-07-05 12:15:52 +00:00
|
|
|
#endif
|
|
|
|
} else {
|
1998-08-13 19:03:22 +00:00
|
|
|
if (!(com->mcr_image & com->mcr_rts)
|
1998-08-13 13:54:10 +00:00
|
|
|
&& com->iptr < com->ihighwater
|
1996-11-13 18:31:57 +00:00
|
|
|
&& com->state & CS_RTS_IFLOW)
|
1995-07-05 12:15:52 +00:00
|
|
|
#if 0
|
2004-10-05 07:42:19 +00:00
|
|
|
outb(com->modem_ctl_port, com->mcr_image |= CD1400_MSVR1_RTS);
|
1995-07-05 12:15:52 +00:00
|
|
|
#else
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, com->mcr_rts_reg,
|
|
|
|
com->mcr_image |= com->mcr_rts);
|
1995-07-05 12:15:52 +00:00
|
|
|
#endif
|
|
|
|
}
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1995-07-05 12:15:52 +00:00
|
|
|
if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
|
1997-12-28 06:23:03 +00:00
|
|
|
ttwwakeup(tp);
|
1995-07-05 12:15:52 +00:00
|
|
|
splx(s);
|
1995-02-09 09:47:31 +00:00
|
|
|
return;
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
if (tp->t_outq.c_cc != 0) {
|
|
|
|
struct lbq *qp;
|
|
|
|
struct lbq *next;
|
|
|
|
|
|
|
|
if (!com->obufs[0].l_queued) {
|
|
|
|
#ifdef CyDebug
|
|
|
|
started = TRUE;
|
|
|
|
#endif
|
|
|
|
com->obufs[0].l_tail
|
|
|
|
= com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
|
|
|
|
sizeof com->obuf1);
|
|
|
|
com->obufs[0].l_next = NULL;
|
|
|
|
com->obufs[0].l_queued = TRUE;
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
1995-07-05 12:15:52 +00:00
|
|
|
if (com->state & CS_BUSY) {
|
|
|
|
qp = com->obufq.l_next;
|
|
|
|
while ((next = qp->l_next) != NULL)
|
|
|
|
qp = next;
|
|
|
|
qp->l_next = &com->obufs[0];
|
|
|
|
} else {
|
|
|
|
com->obufq.l_head = com->obufs[0].l_head;
|
|
|
|
com->obufq.l_tail = com->obufs[0].l_tail;
|
|
|
|
com->obufq.l_next = &com->obufs[0];
|
|
|
|
com->state |= CS_BUSY;
|
|
|
|
if (com->state >= (CS_BUSY | CS_TTGO
|
|
|
|
| CS_ODEVREADY))
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_SRER,
|
|
|
|
com->intr_enable
|
1999-01-28 01:59:53 +00:00
|
|
|
= (com->intr_enable
|
|
|
|
& ~CD1400_SRER_TXMPTY)
|
1998-11-28 15:48:09 +00:00
|
|
|
| CD1400_SRER_TXRDY);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
|
|
|
|
#ifdef CyDebug
|
|
|
|
started = TRUE;
|
|
|
|
#endif
|
|
|
|
com->obufs[1].l_tail
|
|
|
|
= com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
|
|
|
|
sizeof com->obuf2);
|
|
|
|
com->obufs[1].l_next = NULL;
|
|
|
|
com->obufs[1].l_queued = TRUE;
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
1995-07-05 12:15:52 +00:00
|
|
|
if (com->state & CS_BUSY) {
|
|
|
|
qp = com->obufq.l_next;
|
|
|
|
while ((next = qp->l_next) != NULL)
|
|
|
|
qp = next;
|
|
|
|
qp->l_next = &com->obufs[1];
|
|
|
|
} else {
|
|
|
|
com->obufq.l_head = com->obufs[1].l_head;
|
|
|
|
com->obufq.l_tail = com->obufs[1].l_tail;
|
|
|
|
com->obufq.l_next = &com->obufs[1];
|
|
|
|
com->state |= CS_BUSY;
|
|
|
|
if (com->state >= (CS_BUSY | CS_TTGO
|
|
|
|
| CS_ODEVREADY))
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_SRER,
|
|
|
|
com->intr_enable
|
1999-01-28 01:59:53 +00:00
|
|
|
= (com->intr_enable
|
|
|
|
& ~CD1400_SRER_TXMPTY)
|
1998-11-28 15:48:09 +00:00
|
|
|
| CD1400_SRER_TXRDY);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
tp->t_state |= TS_BUSY;
|
|
|
|
}
|
|
|
|
#ifdef CyDebug
|
|
|
|
if (started)
|
|
|
|
++com->start_real;
|
|
|
|
#endif
|
|
|
|
#if 0
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
1995-12-22 15:02:22 +00:00
|
|
|
if (com->state >= (CS_BUSY | CS_TTGO))
|
2004-10-05 07:42:19 +00:00
|
|
|
cyintr1(com); /* fake interrupt to start output */
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1995-07-05 12:15:52 +00:00
|
|
|
#endif
|
1995-07-22 01:30:45 +00:00
|
|
|
ttwwakeup(tp);
|
1995-07-05 12:15:52 +00:00
|
|
|
splx(s);
|
|
|
|
}
|
|
|
|
|
1995-12-08 11:19:42 +00:00
|
|
|
static void
|
2004-10-05 07:42:19 +00:00
|
|
|
comstop(struct tty *tp, int rw)
|
1995-07-05 12:15:52 +00:00
|
|
|
{
|
|
|
|
struct com_s *com;
|
1998-12-17 17:40:13 +00:00
|
|
|
bool_t wakeup_etc;
|
1995-07-05 12:15:52 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
com = tp->t_sc;
|
1998-12-17 17:40:13 +00:00
|
|
|
wakeup_etc = FALSE;
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
1995-07-05 12:15:52 +00:00
|
|
|
if (rw & FWRITE) {
|
|
|
|
com->obufs[0].l_queued = FALSE;
|
|
|
|
com->obufs[1].l_queued = FALSE;
|
1998-11-28 15:48:09 +00:00
|
|
|
if (com->extra_state & CSE_ODONE) {
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events -= LOTS_OF_EVENTS;
|
1998-11-28 15:48:09 +00:00
|
|
|
com->extra_state &= ~CSE_ODONE;
|
1998-12-17 17:40:13 +00:00
|
|
|
if (com->etc != ETC_NONE) {
|
|
|
|
if (com->etc == ETC_BREAK_ENDED)
|
|
|
|
com->etc = ETC_NONE;
|
|
|
|
wakeup_etc = TRUE;
|
|
|
|
}
|
1998-11-28 15:48:09 +00:00
|
|
|
}
|
1995-07-05 12:15:52 +00:00
|
|
|
com->tp->t_state &= ~TS_BUSY;
|
1998-12-17 17:40:13 +00:00
|
|
|
if (com->state & CS_ODONE)
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events -= LOTS_OF_EVENTS;
|
1998-12-17 17:40:13 +00:00
|
|
|
com->state &= ~(CS_ODONE | CS_BUSY);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
if (rw & FREAD) {
|
1998-12-17 19:23:09 +00:00
|
|
|
/* XXX no way to reset only input fifo. */
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_events -= (com->iptr - com->ibuf);
|
1995-07-05 12:15:52 +00:00
|
|
|
com->iptr = com->ibuf;
|
|
|
|
}
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1998-12-17 17:40:13 +00:00
|
|
|
if (wakeup_etc)
|
|
|
|
wakeup(&com->etc);
|
1998-12-17 19:23:09 +00:00
|
|
|
if (rw & FWRITE && com->etc == ETC_NONE)
|
|
|
|
cd1400_channel_cmd(com, CD1400_CCR_CMDRESET | CD1400_CCR_FTF);
|
2004-10-05 07:42:19 +00:00
|
|
|
cystart(tp);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
static int
|
2004-10-05 07:42:19 +00:00
|
|
|
cymodem(struct tty *tp, int sigon, int sigoff)
|
1995-07-05 12:15:52 +00:00
|
|
|
{
|
2004-10-05 07:42:19 +00:00
|
|
|
struct com_s *com;
|
1995-07-05 12:15:52 +00:00
|
|
|
int mcr;
|
|
|
|
int msr;
|
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
com = tp->t_sc;
|
|
|
|
if (sigon == 0 && sigoff == 0) {
|
|
|
|
sigon = 0;
|
1995-07-05 12:15:52 +00:00
|
|
|
mcr = com->mcr_image;
|
1998-08-13 19:03:22 +00:00
|
|
|
if (mcr & com->mcr_dtr)
|
2004-10-05 07:42:19 +00:00
|
|
|
sigon |= SER_DTR;
|
1998-08-13 19:03:22 +00:00
|
|
|
if (mcr & com->mcr_rts)
|
1995-07-05 12:15:52 +00:00
|
|
|
/* XXX wired on for Cyclom-8Ys */
|
2004-10-05 07:42:19 +00:00
|
|
|
sigon |= SER_RTS;
|
1996-12-05 12:43:30 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* We must read the modem status from the hardware because
|
|
|
|
* we don't generate modem status change interrupts for all
|
|
|
|
* changes, so com->prev_modem_status is not guaranteed to
|
|
|
|
* be up to date. This is safe, unlike for sio, because
|
|
|
|
* reading the status register doesn't clear pending modem
|
|
|
|
* status change interrupts.
|
|
|
|
*/
|
1998-11-22 17:40:32 +00:00
|
|
|
msr = cd_getreg(com, CD1400_MSVR2);
|
1996-12-05 12:43:30 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
if (msr & CD1400_MSVR2_CTS)
|
|
|
|
sigon |= SER_CTS;
|
|
|
|
if (msr & CD1400_MSVR2_CD)
|
|
|
|
sigon |= SER_DCD;
|
|
|
|
if (msr & CD1400_MSVR2_DSR)
|
|
|
|
sigon |= SER_DSR;
|
|
|
|
if (msr & CD1400_MSVR2_RI)
|
1995-07-05 12:15:52 +00:00
|
|
|
/* XXX not connected except for Cyclom-16Y? */
|
2004-10-05 07:42:19 +00:00
|
|
|
sigon |= SER_RI;
|
|
|
|
return (sigon);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
2004-10-05 07:42:19 +00:00
|
|
|
mcr = com->mcr_image;
|
|
|
|
if (sigon & SER_DTR)
|
1998-08-13 19:03:22 +00:00
|
|
|
mcr |= com->mcr_dtr;
|
2004-10-05 07:42:19 +00:00
|
|
|
if (sigoff & SER_DTR)
|
|
|
|
mcr &= ~com->mcr_dtr;
|
|
|
|
if (sigon & SER_RTS)
|
1998-08-13 19:03:22 +00:00
|
|
|
mcr |= com->mcr_rts;
|
2004-10-05 07:42:19 +00:00
|
|
|
if (sigoff & SER_RTS)
|
|
|
|
mcr &= ~com->mcr_rts;
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
2004-10-05 07:42:19 +00:00
|
|
|
com->mcr_image = mcr;
|
|
|
|
cd_setreg(com, CD1400_MSVR1, mcr);
|
|
|
|
cd_setreg(com, CD1400_MSVR2, mcr);
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1995-07-05 12:15:52 +00:00
|
|
|
return (0);
|
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
static void
|
2004-10-05 07:42:19 +00:00
|
|
|
cysettimeout()
|
1995-07-05 12:15:52 +00:00
|
|
|
{
|
|
|
|
struct com_s *com;
|
|
|
|
bool_t someopen;
|
|
|
|
int unit;
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
/*
|
|
|
|
* Set our timeout period to 1 second if no polled devices are open.
|
|
|
|
* Otherwise set it to max(1/200, 1/hz).
|
|
|
|
* Enable timeouts iff some device is open.
|
|
|
|
*/
|
2004-10-05 07:42:19 +00:00
|
|
|
untimeout(cywakeup, (void *)NULL, cy_timeout_handle);
|
|
|
|
cy_timeout = hz;
|
1995-07-05 12:15:52 +00:00
|
|
|
someopen = FALSE;
|
2004-10-05 07:42:19 +00:00
|
|
|
for (unit = 0; unit < NPORTS; ++unit) {
|
|
|
|
com = cy_addr(unit);
|
1995-07-05 12:15:52 +00:00
|
|
|
if (com != NULL && com->tp != NULL
|
|
|
|
&& com->tp->t_state & TS_ISOPEN) {
|
|
|
|
someopen = TRUE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (someopen) {
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_timeouts_until_log = hz / cy_timeout;
|
|
|
|
cy_timeout_handle = timeout(cywakeup, (void *)NULL,
|
|
|
|
cy_timeout);
|
1995-07-05 12:15:52 +00:00
|
|
|
} else {
|
|
|
|
/* Flush error messages, if any. */
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_timeouts_until_log = 1;
|
|
|
|
cywakeup((void *)NULL);
|
|
|
|
untimeout(cywakeup, (void *)NULL, cy_timeout_handle);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
static void
|
2004-10-05 07:42:19 +00:00
|
|
|
cywakeup(void *chan)
|
1995-02-09 09:47:31 +00:00
|
|
|
{
|
1995-07-05 12:15:52 +00:00
|
|
|
struct com_s *com;
|
|
|
|
int unit;
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_timeout_handle = timeout(cywakeup, (void *)NULL, cy_timeout);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
/*
|
|
|
|
* Check for and log errors, but not too often.
|
|
|
|
*/
|
2004-10-05 07:42:19 +00:00
|
|
|
if (--cy_timeouts_until_log > 0)
|
1995-07-05 12:15:52 +00:00
|
|
|
return;
|
2004-10-05 07:42:19 +00:00
|
|
|
cy_timeouts_until_log = hz / cy_timeout;
|
|
|
|
for (unit = 0; unit < NPORTS; ++unit) {
|
1995-07-05 12:15:52 +00:00
|
|
|
int errnum;
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
com = cy_addr(unit);
|
1995-07-05 12:15:52 +00:00
|
|
|
if (com == NULL)
|
|
|
|
continue;
|
|
|
|
for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
|
|
|
|
u_int delta;
|
|
|
|
u_long total;
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
1995-07-05 12:15:52 +00:00
|
|
|
delta = com->delta_error_counts[errnum];
|
|
|
|
com->delta_error_counts[errnum] = 0;
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1995-07-05 12:15:52 +00:00
|
|
|
if (delta == 0)
|
|
|
|
continue;
|
|
|
|
total = com->error_counts[errnum] += delta;
|
|
|
|
log(LOG_ERR, "cy%d: %u more %s%s (total %lu)\n",
|
|
|
|
unit, delta, error_desc[errnum],
|
|
|
|
delta == 1 ? "" : "s", total);
|
|
|
|
}
|
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
}
|
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
static void
|
2004-10-05 07:42:19 +00:00
|
|
|
disc_optim(struct tty *tp, struct termios *t, struct com_s *com)
|
1995-02-25 20:09:44 +00:00
|
|
|
{
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifndef SOFT_HOTCHAR
|
|
|
|
u_char opt;
|
|
|
|
#endif
|
1995-02-25 20:09:44 +00:00
|
|
|
|
2004-06-26 09:20:07 +00:00
|
|
|
ttyldoptim(tp);
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifndef SOFT_HOTCHAR
|
|
|
|
opt = com->cor[2] & ~CD1400_COR3_SCD34;
|
2004-06-26 09:20:07 +00:00
|
|
|
if (com->tp->t_hotchar != 0) {
|
|
|
|
cd_setreg(com, CD1400_SCHR3, com->tp->t_hotchar);
|
|
|
|
cd_setreg(com, CD1400_SCHR4, com->tp->t_hotchar);
|
1995-07-05 12:15:52 +00:00
|
|
|
opt |= CD1400_COR3_SCD34;
|
|
|
|
}
|
|
|
|
if (opt != com->cor[2]) {
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_setreg(com, CD1400_COR3, com->cor[2] = opt);
|
|
|
|
cd1400_channel_cmd(com, CD1400_CCR_CMDCORCHG | CD1400_CCR_COR3);
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
#endif
|
1995-02-25 20:09:44 +00:00
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifdef Smarts
|
|
|
|
/* standard line discipline input routine */
|
1995-02-09 09:47:31 +00:00
|
|
|
int
|
2004-10-05 07:42:19 +00:00
|
|
|
cyinput(int c, struct tty *tp)
|
1995-07-05 12:15:52 +00:00
|
|
|
{
|
|
|
|
/* XXX duplicate ttyinput(), but without the IXOFF/IXON/ISTRIP/IPARMRK
|
|
|
|
* bits, as they are done by the CD1400. Hardly worth the effort,
|
2004-10-05 07:42:19 +00:00
|
|
|
* given that high-throughput session are raw anyhow.
|
1995-07-05 12:15:52 +00:00
|
|
|
*/
|
|
|
|
}
|
|
|
|
#endif /* Smarts */
|
|
|
|
|
|
|
|
static int
|
2004-10-05 07:42:19 +00:00
|
|
|
cyspeed(speed_t speed, u_long cy_clock, int *prescaler_io)
|
1995-02-09 09:47:31 +00:00
|
|
|
{
|
1995-07-05 12:15:52 +00:00
|
|
|
int actual;
|
|
|
|
int error;
|
|
|
|
int divider;
|
|
|
|
int prescaler;
|
|
|
|
int prescaler_unit;
|
|
|
|
|
|
|
|
if (speed == 0)
|
|
|
|
return (0);
|
|
|
|
if (speed < 0 || speed > 150000)
|
|
|
|
return (-1);
|
|
|
|
|
|
|
|
/* determine which prescaler to use */
|
|
|
|
for (prescaler_unit = 4, prescaler = 2048; prescaler_unit;
|
|
|
|
prescaler_unit--, prescaler >>= 2) {
|
1998-08-13 19:03:22 +00:00
|
|
|
if (cy_clock / prescaler / speed > 63)
|
1995-07-05 12:15:52 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
1998-08-13 19:03:22 +00:00
|
|
|
divider = (cy_clock / prescaler * 2 / speed + 1) / 2; /* round off */
|
1995-07-05 12:15:52 +00:00
|
|
|
if (divider > 255)
|
|
|
|
divider = 255;
|
1998-08-13 19:03:22 +00:00
|
|
|
actual = cy_clock/prescaler/divider;
|
1998-07-29 18:48:20 +00:00
|
|
|
|
|
|
|
/* 10 times error in percent: */
|
|
|
|
error = ((actual - (long)speed) * 2000 / (long)speed + 1) / 2;
|
1995-07-05 12:15:52 +00:00
|
|
|
|
|
|
|
/* 3.0% max error tolerance */
|
|
|
|
if (error < -30 || error > 30)
|
|
|
|
return (-1);
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
*prescaler_io = prescaler_unit;
|
|
|
|
return (divider);
|
|
|
|
}
|
1995-02-09 09:47:31 +00:00
|
|
|
|
|
|
|
static void
|
2004-10-05 07:42:19 +00:00
|
|
|
cd1400_channel_cmd(struct com_s *com, int cmd)
|
1995-02-09 09:47:31 +00:00
|
|
|
{
|
1998-12-19 16:28:57 +00:00
|
|
|
cd1400_channel_cmd_wait(com);
|
|
|
|
cd_setreg(com, CD1400_CCR, cmd);
|
|
|
|
cd1400_channel_cmd_wait(com);
|
|
|
|
}
|
1995-05-30 08:16:23 +00:00
|
|
|
|
1998-12-19 16:28:57 +00:00
|
|
|
static void
|
2004-10-05 07:42:19 +00:00
|
|
|
cd1400_channel_cmd_wait(struct com_s *com)
|
1998-12-19 16:28:57 +00:00
|
|
|
{
|
|
|
|
struct timeval start;
|
|
|
|
struct timeval tv;
|
|
|
|
long usec;
|
1995-02-09 09:47:31 +00:00
|
|
|
|
1998-12-19 16:28:57 +00:00
|
|
|
if (cd_getreg(com, CD1400_CCR) == 0)
|
|
|
|
return;
|
|
|
|
microtime(&start);
|
|
|
|
for (;;) {
|
|
|
|
if (cd_getreg(com, CD1400_CCR) == 0)
|
|
|
|
return;
|
|
|
|
microtime(&tv);
|
|
|
|
usec = 1000000 * (tv.tv_sec - start.tv_sec) +
|
|
|
|
tv.tv_usec - start.tv_usec;
|
|
|
|
if (usec >= 5000) {
|
|
|
|
log(LOG_ERR,
|
|
|
|
"cy%d: channel command timeout (%ld usec)\n",
|
|
|
|
com->unit, usec);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
1998-11-22 17:40:32 +00:00
|
|
|
}
|
|
|
|
|
1998-12-17 17:40:13 +00:00
|
|
|
static void
|
2004-10-05 07:42:19 +00:00
|
|
|
cd_etc(struct com_s *com, int etc)
|
1998-12-17 17:40:13 +00:00
|
|
|
{
|
2000-09-07 01:33:02 +00:00
|
|
|
|
1998-12-17 17:40:13 +00:00
|
|
|
/*
|
|
|
|
* We can't change the hardware's ETC state while there are any
|
|
|
|
* characters in the tx fifo, since those characters would be
|
|
|
|
* interpreted as commands! Unputting characters from the fifo
|
|
|
|
* is difficult, so we wait up to 12 character times for the fifo
|
|
|
|
* to drain. The command will be delayed for up to 2 character
|
|
|
|
* times for the tx to become empty. Unputting characters from
|
|
|
|
* the tx holding and shift registers is impossible, so we wait
|
|
|
|
* for the tx to become empty so that the command is sure to be
|
|
|
|
* executed soon after we issue it.
|
|
|
|
*/
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
2000-09-07 01:33:02 +00:00
|
|
|
if (com->etc == etc)
|
1998-12-17 17:40:13 +00:00
|
|
|
goto wait;
|
1999-01-28 01:59:53 +00:00
|
|
|
if ((etc == CD1400_ETC_SENDBREAK
|
1998-12-17 17:40:13 +00:00
|
|
|
&& (com->etc == ETC_BREAK_STARTING
|
1999-01-28 01:59:53 +00:00
|
|
|
|| com->etc == ETC_BREAK_STARTED))
|
|
|
|
|| (etc == CD1400_ETC_STOPBREAK
|
1998-12-17 17:40:13 +00:00
|
|
|
&& (com->etc == ETC_BREAK_ENDING || com->etc == ETC_BREAK_ENDED
|
1999-01-28 01:59:53 +00:00
|
|
|
|| com->etc == ETC_NONE))) {
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1998-12-17 17:40:13 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
com->etc = etc;
|
|
|
|
cd_setreg(com, CD1400_SRER,
|
|
|
|
com->intr_enable
|
1999-01-28 01:59:53 +00:00
|
|
|
= (com->intr_enable & ~CD1400_SRER_TXRDY) | CD1400_SRER_TXMPTY);
|
1998-12-17 17:40:13 +00:00
|
|
|
wait:
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1998-12-17 17:40:13 +00:00
|
|
|
while (com->etc == etc
|
|
|
|
&& tsleep(&com->etc, TTIPRI | PCATCH, "cyetc", 0) == 0)
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
1998-11-22 17:40:32 +00:00
|
|
|
static int
|
2004-10-05 07:42:19 +00:00
|
|
|
cd_getreg(struct com_s *com, int reg)
|
1998-11-22 17:40:32 +00:00
|
|
|
{
|
|
|
|
struct com_s *basecom;
|
|
|
|
u_char car;
|
|
|
|
int cy_align;
|
|
|
|
cy_addr iobase;
|
2003-09-27 10:30:03 +00:00
|
|
|
#ifdef SMP
|
|
|
|
int need_unlock;
|
|
|
|
#endif
|
1998-11-22 17:40:32 +00:00
|
|
|
int val;
|
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
basecom = cy_addr(com->unit & ~(CD1400_NO_OF_CHANNELS - 1));
|
1998-11-22 17:40:32 +00:00
|
|
|
car = com->unit & CD1400_CAR_CHAN;
|
|
|
|
cy_align = com->cy_align;
|
|
|
|
iobase = com->iobase;
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2003-09-27 10:30:03 +00:00
|
|
|
#ifdef SMP
|
|
|
|
need_unlock = 0;
|
2004-10-05 07:42:19 +00:00
|
|
|
if (!mtx_owned(&cy_lock)) {
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
2003-09-27 10:30:03 +00:00
|
|
|
need_unlock = 1;
|
|
|
|
}
|
|
|
|
#endif
|
1998-11-22 17:40:32 +00:00
|
|
|
if (basecom->car != car)
|
|
|
|
cd_outb(iobase, CD1400_CAR, cy_align, basecom->car = car);
|
|
|
|
val = cd_inb(iobase, reg, cy_align);
|
2003-09-27 10:30:03 +00:00
|
|
|
#ifdef SMP
|
|
|
|
if (need_unlock)
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2003-09-27 10:30:03 +00:00
|
|
|
#endif
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1998-11-22 17:40:32 +00:00
|
|
|
return (val);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2004-10-05 07:42:19 +00:00
|
|
|
cd_setreg(struct com_s *com, int reg, int val)
|
1998-11-22 17:40:32 +00:00
|
|
|
{
|
|
|
|
struct com_s *basecom;
|
|
|
|
u_char car;
|
|
|
|
int cy_align;
|
|
|
|
cy_addr iobase;
|
2003-09-27 10:30:03 +00:00
|
|
|
#ifdef SMP
|
|
|
|
int need_unlock;
|
|
|
|
#endif
|
1998-11-22 17:40:32 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
basecom = cy_addr(com->unit & ~(CD1400_NO_OF_CHANNELS - 1));
|
1998-11-22 17:40:32 +00:00
|
|
|
car = com->unit & CD1400_CAR_CHAN;
|
|
|
|
cy_align = com->cy_align;
|
|
|
|
iobase = com->iobase;
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_enter();
|
2003-09-27 10:30:03 +00:00
|
|
|
#ifdef SMP
|
|
|
|
need_unlock = 0;
|
2004-10-05 07:42:19 +00:00
|
|
|
if (!mtx_owned(&cy_lock)) {
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_LOCK();
|
2003-09-27 10:30:03 +00:00
|
|
|
need_unlock = 1;
|
|
|
|
}
|
|
|
|
#endif
|
1998-11-22 17:40:32 +00:00
|
|
|
if (basecom->car != car)
|
|
|
|
cd_outb(iobase, CD1400_CAR, cy_align, basecom->car = car);
|
|
|
|
cd_outb(iobase, reg, cy_align, val);
|
2003-09-27 10:30:03 +00:00
|
|
|
#ifdef SMP
|
|
|
|
if (need_unlock)
|
2001-02-09 22:37:24 +00:00
|
|
|
COM_UNLOCK();
|
2003-09-27 10:30:03 +00:00
|
|
|
#endif
|
2001-12-18 00:27:18 +00:00
|
|
|
critical_exit();
|
1995-02-09 09:47:31 +00:00
|
|
|
}
|
|
|
|
|
1995-07-05 12:15:52 +00:00
|
|
|
#ifdef CyDebug
|
1995-02-09 09:47:31 +00:00
|
|
|
/* useful in ddb */
|
|
|
|
void
|
2004-10-05 07:42:19 +00:00
|
|
|
cystatus(int unit)
|
1995-02-09 09:47:31 +00:00
|
|
|
{
|
1995-07-05 12:15:52 +00:00
|
|
|
struct com_s *com;
|
|
|
|
cy_addr iobase;
|
|
|
|
u_int ocount;
|
|
|
|
struct tty *tp;
|
1995-02-09 09:47:31 +00:00
|
|
|
|
2004-10-05 07:42:19 +00:00
|
|
|
com = cy_addr(unit);
|
1995-02-09 09:47:31 +00:00
|
|
|
printf("info for channel %d\n", unit);
|
|
|
|
printf("------------------\n");
|
1995-07-05 12:15:52 +00:00
|
|
|
printf("total cyclom service probes:\t%d\n", cy_svrr_probes);
|
|
|
|
printf("calls to upper layer:\t\t%d\n", cy_timeouts);
|
|
|
|
if (com == NULL)
|
|
|
|
return;
|
|
|
|
iobase = com->iobase;
|
1995-02-09 09:47:31 +00:00
|
|
|
printf("\n");
|
1995-07-05 12:15:52 +00:00
|
|
|
printf("cd1400 base address:\\tt%p\n", iobase);
|
|
|
|
printf("saved channel_control:\t\t0x%02x\n", com->channel_control);
|
|
|
|
printf("saved cor1-3:\t\t\t0x%02x 0x%02x 0x%02x\n",
|
|
|
|
com->cor[0], com->cor[1], com->cor[2]);
|
|
|
|
printf("service request enable reg:\t0x%02x (0x%02x cached)\n",
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_getreg(com, CD1400_SRER), com->intr_enable);
|
1995-07-05 12:15:52 +00:00
|
|
|
printf("service request register:\t0x%02x\n",
|
1996-10-14 16:10:00 +00:00
|
|
|
cd_inb(iobase, CD1400_SVRR, com->cy_align));
|
1995-07-05 12:15:52 +00:00
|
|
|
printf("modem status:\t\t\t0x%02x (0x%02x cached)\n",
|
1998-11-22 17:40:32 +00:00
|
|
|
cd_getreg(com, CD1400_MSVR2), com->prev_modem_status);
|
1995-07-05 12:15:52 +00:00
|
|
|
printf("rx/tx/mdm interrupt registers:\t0x%02x 0x%02x 0x%02x\n",
|
1996-10-14 16:10:00 +00:00
|
|
|
cd_inb(iobase, CD1400_RIR, com->cy_align),
|
|
|
|
cd_inb(iobase, CD1400_TIR, com->cy_align),
|
|
|
|
cd_inb(iobase, CD1400_MIR, com->cy_align));
|
1995-02-09 09:47:31 +00:00
|
|
|
printf("\n");
|
1995-07-05 12:15:52 +00:00
|
|
|
printf("com state:\t\t\t0x%02x\n", com->state);
|
2004-10-05 07:42:19 +00:00
|
|
|
printf("calls to cystart():\t\t%d (%d useful)\n",
|
1995-07-05 12:15:52 +00:00
|
|
|
com->start_count, com->start_real);
|
|
|
|
printf("rx buffer chars free:\t\t%d\n", com->iptr - com->ibuf);
|
|
|
|
ocount = 0;
|
|
|
|
if (com->obufs[0].l_queued)
|
|
|
|
ocount += com->obufs[0].l_tail - com->obufs[0].l_head;
|
|
|
|
if (com->obufs[1].l_queued)
|
|
|
|
ocount += com->obufs[1].l_tail - com->obufs[1].l_head;
|
|
|
|
printf("tx buffer chars:\t\t%u\n", ocount);
|
|
|
|
printf("received chars:\t\t\t%d\n", com->bytes_in);
|
|
|
|
printf("received exceptions:\t\t%d\n", com->recv_exception);
|
|
|
|
printf("modem signal deltas:\t\t%d\n", com->mdm);
|
|
|
|
printf("transmitted chars:\t\t%d\n", com->bytes_out);
|
|
|
|
printf("\n");
|
|
|
|
tp = com->tp;
|
|
|
|
if (tp != NULL) {
|
|
|
|
printf("tty state:\t\t\t0x%08x\n", tp->t_state);
|
1997-09-03 01:50:24 +00:00
|
|
|
printf(
|
|
|
|
"upper layer queue lengths:\t%d raw, %d canon, %d output\n",
|
1995-07-05 12:15:52 +00:00
|
|
|
tp->t_rawq.c_cc, tp->t_canq.c_cc, tp->t_outq.c_cc);
|
|
|
|
} else
|
1995-02-09 09:47:31 +00:00
|
|
|
printf("tty state:\t\t\tclosed\n");
|
1995-07-05 12:15:52 +00:00
|
|
|
}
|
|
|
|
#endif /* CyDebug */
|