2008-05-16 18:46:30 +00:00
|
|
|
/******************************************************************************
|
2007-07-11 23:03:16 +00:00
|
|
|
|
2008-05-16 18:46:30 +00:00
|
|
|
Copyright (c) 2001-2008, Intel Corporation
|
2007-07-11 23:03:16 +00:00
|
|
|
All rights reserved.
|
|
|
|
|
|
|
|
Redistribution and use in source and binary forms, with or without
|
|
|
|
modification, are permitted provided that the following conditions are met:
|
|
|
|
|
|
|
|
1. Redistributions of source code must retain the above copyright notice,
|
|
|
|
this list of conditions and the following disclaimer.
|
|
|
|
|
|
|
|
2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
notice, this list of conditions and the following disclaimer in the
|
|
|
|
documentation and/or other materials provided with the distribution.
|
|
|
|
|
|
|
|
3. Neither the name of the Intel Corporation nor the names of its
|
|
|
|
contributors may be used to endorse or promote products derived from
|
|
|
|
this software without specific prior written permission.
|
|
|
|
|
|
|
|
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
|
|
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
|
|
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
|
|
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
|
|
|
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
|
|
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
|
|
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
|
|
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
|
|
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
|
|
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
|
|
POSSIBILITY OF SUCH DAMAGE.
|
|
|
|
|
2008-05-16 18:46:30 +00:00
|
|
|
******************************************************************************/
|
|
|
|
/*$FreeBSD$*/
|
2007-07-11 23:03:16 +00:00
|
|
|
|
|
|
|
#ifndef _IXGBE_COMMON_H_
|
|
|
|
#define _IXGBE_COMMON_H_
|
|
|
|
|
|
|
|
#include "ixgbe_type.h"
|
|
|
|
|
2008-05-16 18:46:30 +00:00
|
|
|
s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
|
2007-07-11 23:03:16 +00:00
|
|
|
s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
|
|
|
|
s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
|
|
|
|
s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
|
2008-05-16 18:46:30 +00:00
|
|
|
s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num);
|
2007-07-11 23:03:16 +00:00
|
|
|
s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
|
|
|
|
s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
|
2008-11-26 23:41:18 +00:00
|
|
|
void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
|
2007-07-11 23:03:16 +00:00
|
|
|
s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
|
|
|
|
|
|
|
|
s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
|
|
|
|
s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
|
|
|
|
|
|
|
|
s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
|
|
|
|
s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
|
|
|
|
s32 ixgbe_read_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);
|
|
|
|
s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
|
2008-05-16 18:46:30 +00:00
|
|
|
u16 *data);
|
2007-07-11 23:03:16 +00:00
|
|
|
s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
|
2008-05-16 18:46:30 +00:00
|
|
|
u16 *checksum_val);
|
2007-07-11 23:03:16 +00:00
|
|
|
s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
|
|
|
|
|
2008-05-16 18:46:30 +00:00
|
|
|
s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
|
|
|
|
u32 enable_addr);
|
2008-07-30 18:15:18 +00:00
|
|
|
s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
|
2007-07-11 23:03:16 +00:00
|
|
|
s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
|
|
|
|
s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list,
|
2008-05-16 18:46:30 +00:00
|
|
|
u32 mc_addr_count,
|
|
|
|
ixgbe_mc_addr_itr func);
|
|
|
|
s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list,
|
|
|
|
u32 addr_count, ixgbe_mc_addr_itr func);
|
2007-07-11 23:03:16 +00:00
|
|
|
s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
|
|
|
|
s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
|
|
|
|
|
2008-11-26 23:41:18 +00:00
|
|
|
s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw, s32 packetbuf_num);
|
|
|
|
s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packtetbuf_num);
|
|
|
|
s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw);
|
|
|
|
|
2007-07-11 23:03:16 +00:00
|
|
|
s32 ixgbe_validate_mac_addr(u8 *mac_addr);
|
|
|
|
s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask);
|
|
|
|
void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask);
|
|
|
|
s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw);
|
|
|
|
|
2008-05-16 18:46:30 +00:00
|
|
|
s32 ixgbe_read_analog_reg8_generic(struct ixgbe_hw *hw, u32 reg, u8 *val);
|
|
|
|
s32 ixgbe_write_analog_reg8_generic(struct ixgbe_hw *hw, u32 reg, u8 val);
|
2007-07-11 23:03:16 +00:00
|
|
|
#endif /* IXGBE_COMMON */
|