2005-01-05 22:16:58 +00:00
|
|
|
/*-
|
2001-10-15 14:35:39 +00:00
|
|
|
* Initial implementation:
|
|
|
|
* Copyright (c) 2001 Robert Drehmel
|
|
|
|
* All rights reserved.
|
|
|
|
*
|
|
|
|
* As long as the above copyright statement and this notice remain
|
2008-08-07 22:46:25 +00:00
|
|
|
* unchanged, you can do what ever you want with this file.
|
2001-10-15 14:35:39 +00:00
|
|
|
*/
|
2008-09-10 20:07:08 +00:00
|
|
|
/*-
|
|
|
|
* Copyright (c) 2008 Marius Strobl <marius@FreeBSD.org>
|
|
|
|
* All rights reserved.
|
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
* are met:
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer.
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
|
|
* documentation and/or other materials provided with the distribution.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
|
|
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
|
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
|
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
|
|
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
|
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
|
|
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
|
|
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
|
|
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
|
|
|
* SUCH DAMAGE.
|
|
|
|
*/
|
2004-01-04 23:21:18 +00:00
|
|
|
|
|
|
|
#include <sys/cdefs.h>
|
|
|
|
__FBSDID("$FreeBSD$");
|
2008-08-22 20:28:19 +00:00
|
|
|
|
2001-10-15 14:35:39 +00:00
|
|
|
/*
|
|
|
|
* FreeBSD/sparc64 kernel loader - machine dependent part
|
|
|
|
*
|
|
|
|
* - implements copyin and readin functions that map kernel
|
|
|
|
* pages on demand. The machine independent code does not
|
|
|
|
* know the size of the kernel early enough to pre-enter
|
|
|
|
* TTEs and install just one 4MB mapping seemed to limiting
|
|
|
|
* to me.
|
|
|
|
*/
|
2002-02-23 11:06:37 +00:00
|
|
|
|
2001-10-15 14:35:39 +00:00
|
|
|
#include <stand.h>
|
|
|
|
#include <sys/exec.h>
|
|
|
|
#include <sys/param.h>
|
2002-08-21 12:45:36 +00:00
|
|
|
#include <sys/queue.h>
|
2001-10-15 14:35:39 +00:00
|
|
|
#include <sys/linker.h>
|
2006-10-09 04:43:07 +00:00
|
|
|
#include <sys/types.h>
|
2001-10-15 14:35:39 +00:00
|
|
|
|
2006-10-09 04:43:07 +00:00
|
|
|
#include <vm/vm.h>
|
2001-10-15 14:35:39 +00:00
|
|
|
#include <machine/asi.h>
|
2002-02-23 11:06:37 +00:00
|
|
|
#include <machine/cpufunc.h>
|
2001-10-15 14:35:39 +00:00
|
|
|
#include <machine/elf.h>
|
2002-02-23 04:04:30 +00:00
|
|
|
#include <machine/lsu.h>
|
|
|
|
#include <machine/metadata.h>
|
2001-10-15 14:35:39 +00:00
|
|
|
#include <machine/tte.h>
|
2008-08-07 22:46:25 +00:00
|
|
|
#include <machine/tlb.h>
|
2002-02-23 11:06:37 +00:00
|
|
|
#include <machine/upa.h>
|
2008-08-30 16:03:22 +00:00
|
|
|
#include <machine/ver.h>
|
2008-09-08 20:38:48 +00:00
|
|
|
#include <machine/vmparam.h>
|
2001-10-15 14:35:39 +00:00
|
|
|
|
|
|
|
#include "bootstrap.h"
|
|
|
|
#include "libofw.h"
|
2001-10-30 06:31:45 +00:00
|
|
|
#include "dev_net.h"
|
2001-10-15 14:35:39 +00:00
|
|
|
|
2007-06-16 21:46:15 +00:00
|
|
|
extern char bootprog_name[], bootprog_rev[], bootprog_date[], bootprog_maker[];
|
|
|
|
|
2001-10-15 14:35:39 +00:00
|
|
|
enum {
|
|
|
|
HEAPVA = 0x800000,
|
|
|
|
HEAPSZ = 0x1000000,
|
|
|
|
LOADSZ = 0x1000000 /* for kernel and modules */
|
|
|
|
};
|
|
|
|
|
2007-06-16 21:46:15 +00:00
|
|
|
static struct mmu_ops {
|
2006-10-09 04:43:07 +00:00
|
|
|
void (*tlb_init)(void);
|
|
|
|
int (*mmu_mapin)(vm_offset_t va, vm_size_t len);
|
|
|
|
} *mmu_ops;
|
|
|
|
|
2001-10-30 06:31:45 +00:00
|
|
|
typedef void kernel_entry_t(vm_offset_t mdp, u_long o1, u_long o2, u_long o3,
|
2007-06-16 21:46:15 +00:00
|
|
|
void *openfirmware);
|
2001-10-30 06:31:45 +00:00
|
|
|
|
2008-08-30 16:03:22 +00:00
|
|
|
static inline u_long dtlb_get_data_sun4u(int slot);
|
2008-08-07 22:46:25 +00:00
|
|
|
static void dtlb_enter_sun4u(u_long vpn, u_long data);
|
|
|
|
static vm_offset_t dtlb_va_to_pa_sun4u(vm_offset_t);
|
2008-08-30 16:03:22 +00:00
|
|
|
static inline u_long itlb_get_data_sun4u(int slot);
|
2008-08-07 22:46:25 +00:00
|
|
|
static void itlb_enter_sun4u(u_long vpn, u_long data);
|
|
|
|
static vm_offset_t itlb_va_to_pa_sun4u(vm_offset_t);
|
2008-09-10 20:07:08 +00:00
|
|
|
static void itlb_relocate_locked0_sun4u(void);
|
2001-10-30 06:31:45 +00:00
|
|
|
extern vm_offset_t md_load(char *, vm_offset_t *);
|
2001-10-15 14:35:39 +00:00
|
|
|
static int sparc64_autoload(void);
|
2007-06-16 21:46:15 +00:00
|
|
|
static ssize_t sparc64_readin(const int, vm_offset_t, const size_t);
|
|
|
|
static ssize_t sparc64_copyin(const void *, vm_offset_t, size_t);
|
|
|
|
static void sparc64_maphint(vm_offset_t, size_t);
|
2007-06-17 00:17:15 +00:00
|
|
|
static vm_offset_t claim_virt(vm_offset_t, size_t, int);
|
|
|
|
static vm_offset_t alloc_phys(size_t, int);
|
|
|
|
static int map_phys(int, size_t, vm_offset_t, vm_offset_t);
|
|
|
|
static void release_phys(vm_offset_t, u_int);
|
2007-06-16 21:46:15 +00:00
|
|
|
static int __elfN(exec)(struct preloaded_file *);
|
2006-10-09 04:43:07 +00:00
|
|
|
static int mmu_mapin_sun4u(vm_offset_t, vm_size_t);
|
|
|
|
static int mmu_mapin_sun4v(vm_offset_t, vm_size_t);
|
2007-06-16 21:46:15 +00:00
|
|
|
static vm_offset_t init_heap(void);
|
2006-10-09 04:43:07 +00:00
|
|
|
static void tlb_init_sun4u(void);
|
|
|
|
static void tlb_init_sun4v(void);
|
|
|
|
|
2008-08-07 22:46:25 +00:00
|
|
|
#ifdef LOADER_DEBUG
|
|
|
|
typedef u_int64_t tte_t;
|
|
|
|
|
|
|
|
static void pmap_print_tlb_sun4u(void);
|
|
|
|
static void pmap_print_tte_sun4u(tte_t, tte_t);
|
|
|
|
#endif
|
|
|
|
|
2007-06-16 21:46:15 +00:00
|
|
|
static struct mmu_ops mmu_ops_sun4u = { tlb_init_sun4u, mmu_mapin_sun4u };
|
|
|
|
static struct mmu_ops mmu_ops_sun4v = { tlb_init_sun4v, mmu_mapin_sun4v };
|
2006-10-09 04:43:07 +00:00
|
|
|
|
|
|
|
/* sun4u */
|
|
|
|
struct tlb_entry *dtlb_store;
|
|
|
|
struct tlb_entry *itlb_store;
|
|
|
|
int dtlb_slot;
|
|
|
|
int itlb_slot;
|
2008-08-30 16:03:22 +00:00
|
|
|
int cpu_impl;
|
2007-06-16 21:46:15 +00:00
|
|
|
static int dtlb_slot_max;
|
|
|
|
static int itlb_slot_max;
|
2006-10-09 04:43:07 +00:00
|
|
|
|
|
|
|
/* sun4v */
|
2007-06-16 21:46:15 +00:00
|
|
|
static struct tlb_entry *tlb_store;
|
|
|
|
static int is_sun4v = 0;
|
|
|
|
/*
|
2006-10-09 04:43:07 +00:00
|
|
|
* no direct TLB access on sun4v
|
2007-06-16 21:46:15 +00:00
|
|
|
* we somewhat arbitrarily declare enough
|
2006-10-09 04:43:07 +00:00
|
|
|
* slots to cover a 4GB AS with 4MB pages
|
|
|
|
*/
|
2007-06-16 21:46:15 +00:00
|
|
|
#define SUN4V_TLB_SLOT_MAX (1 << 10)
|
2001-10-15 14:35:39 +00:00
|
|
|
|
2007-06-16 21:46:15 +00:00
|
|
|
static vm_offset_t curkva = 0;
|
|
|
|
static vm_offset_t heapva;
|
2002-02-23 11:06:37 +00:00
|
|
|
|
2007-06-17 00:17:15 +00:00
|
|
|
static phandle_t root;
|
2001-10-15 14:35:39 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Machine dependent structures that the machine independent
|
|
|
|
* loader part uses.
|
|
|
|
*/
|
|
|
|
struct devsw *devsw[] = {
|
2001-10-30 06:31:45 +00:00
|
|
|
#ifdef LOADER_DISK_SUPPORT
|
2001-10-15 14:35:39 +00:00
|
|
|
&ofwdisk,
|
2001-10-30 06:31:45 +00:00
|
|
|
#endif
|
|
|
|
#ifdef LOADER_NET_SUPPORT
|
|
|
|
&netdev,
|
|
|
|
#endif
|
2001-10-15 14:35:39 +00:00
|
|
|
0
|
|
|
|
};
|
|
|
|
struct arch_switch archsw;
|
|
|
|
|
2007-06-16 21:46:15 +00:00
|
|
|
static struct file_format sparc64_elf = {
|
2003-05-01 04:39:22 +00:00
|
|
|
__elfN(loadfile),
|
|
|
|
__elfN(exec)
|
2001-10-15 14:35:39 +00:00
|
|
|
};
|
|
|
|
struct file_format *file_formats[] = {
|
|
|
|
&sparc64_elf,
|
|
|
|
0
|
|
|
|
};
|
|
|
|
struct fs_ops *file_system[] = {
|
2002-02-23 04:04:30 +00:00
|
|
|
#ifdef LOADER_UFS_SUPPORT
|
2001-10-15 14:35:39 +00:00
|
|
|
&ufs_fsops,
|
2001-10-30 06:31:45 +00:00
|
|
|
#endif
|
2002-04-01 23:28:35 +00:00
|
|
|
#ifdef LOADER_CD9660_SUPPORT
|
|
|
|
&cd9660_fsops,
|
|
|
|
#endif
|
2002-12-19 19:34:59 +00:00
|
|
|
#ifdef LOADER_ZIP_SUPPORT
|
2002-10-13 18:52:46 +00:00
|
|
|
&zipfs_fsops,
|
|
|
|
#endif
|
2002-12-19 19:34:59 +00:00
|
|
|
#ifdef LOADER_GZIP_SUPPORT
|
|
|
|
&gzipfs_fsops,
|
|
|
|
#endif
|
2002-10-13 18:52:46 +00:00
|
|
|
#ifdef LOADER_BZIP2_SUPPORT
|
|
|
|
&bzipfs_fsops,
|
|
|
|
#endif
|
2003-07-11 16:12:50 +00:00
|
|
|
#ifdef LOADER_NFS_SUPPORT
|
2001-10-30 06:31:45 +00:00
|
|
|
&nfs_fsops,
|
2002-02-23 04:04:30 +00:00
|
|
|
#endif
|
|
|
|
#ifdef LOADER_TFTP_SUPPORT
|
|
|
|
&tftp_fsops,
|
2001-10-30 06:31:45 +00:00
|
|
|
#endif
|
|
|
|
0
|
|
|
|
};
|
|
|
|
struct netif_driver *netif_drivers[] = {
|
|
|
|
#ifdef LOADER_NET_SUPPORT
|
|
|
|
&ofwnet,
|
|
|
|
#endif
|
2001-10-15 14:35:39 +00:00
|
|
|
0
|
|
|
|
};
|
|
|
|
|
|
|
|
extern struct console ofwconsole;
|
|
|
|
struct console *consoles[] = {
|
|
|
|
&ofwconsole,
|
|
|
|
0
|
|
|
|
};
|
|
|
|
|
2002-02-23 04:04:30 +00:00
|
|
|
#ifdef LOADER_DEBUG
|
|
|
|
static int
|
|
|
|
watch_phys_set_mask(vm_offset_t pa, u_long mask)
|
|
|
|
{
|
|
|
|
u_long lsucr;
|
|
|
|
|
|
|
|
stxa(AA_DMMU_PWPR, ASI_DMMU, pa & (((2UL << 38) - 1) << 3));
|
|
|
|
lsucr = ldxa(0, ASI_LSU_CTL_REG);
|
|
|
|
lsucr = ((lsucr | LSU_PW) & ~LSU_PM_MASK) |
|
|
|
|
(mask << LSU_PM_SHIFT);
|
|
|
|
stxa(0, ASI_LSU_CTL_REG, lsucr);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
watch_phys_set(vm_offset_t pa, int sz)
|
|
|
|
{
|
|
|
|
u_long off;
|
|
|
|
|
|
|
|
off = (u_long)pa & 7;
|
|
|
|
/* Test for misaligned watch points. */
|
|
|
|
if (off + sz > 8)
|
|
|
|
return (-1);
|
|
|
|
return (watch_phys_set_mask(pa, ((1 << sz) - 1) << off));
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
watch_virt_set_mask(vm_offset_t va, u_long mask)
|
|
|
|
{
|
|
|
|
u_long lsucr;
|
|
|
|
|
|
|
|
stxa(AA_DMMU_VWPR, ASI_DMMU, va & (((2UL << 41) - 1) << 3));
|
|
|
|
lsucr = ldxa(0, ASI_LSU_CTL_REG);
|
|
|
|
lsucr = ((lsucr | LSU_VW) & ~LSU_VM_MASK) |
|
|
|
|
(mask << LSU_VM_SHIFT);
|
|
|
|
stxa(0, ASI_LSU_CTL_REG, lsucr);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
watch_virt_set(vm_offset_t va, int sz)
|
|
|
|
{
|
|
|
|
u_long off;
|
|
|
|
|
|
|
|
off = (u_long)va & 7;
|
|
|
|
/* Test for misaligned watch points. */
|
|
|
|
if (off + sz > 8)
|
|
|
|
return (-1);
|
|
|
|
return (watch_virt_set_mask(va, ((1 << sz) - 1) << off));
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2001-10-15 14:35:39 +00:00
|
|
|
/*
|
|
|
|
* archsw functions
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
sparc64_autoload(void)
|
|
|
|
{
|
2007-06-16 21:46:15 +00:00
|
|
|
|
2008-10-05 14:00:44 +00:00
|
|
|
setenv("hw.ata.atapi_dma", "0", 0);
|
2007-06-16 21:46:15 +00:00
|
|
|
return (0);
|
2001-10-15 14:35:39 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t
|
|
|
|
sparc64_readin(const int fd, vm_offset_t va, const size_t len)
|
|
|
|
{
|
2007-06-16 21:46:15 +00:00
|
|
|
|
2006-10-09 04:43:07 +00:00
|
|
|
mmu_ops->mmu_mapin(va, len);
|
2007-06-16 21:46:15 +00:00
|
|
|
return (read(fd, (void *)va, len));
|
2001-10-15 14:35:39 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t
|
|
|
|
sparc64_copyin(const void *src, vm_offset_t dest, size_t len)
|
|
|
|
{
|
2007-06-16 21:46:15 +00:00
|
|
|
|
2006-10-09 04:43:07 +00:00
|
|
|
mmu_ops->mmu_mapin(dest, len);
|
2001-10-15 14:35:39 +00:00
|
|
|
memcpy((void *)dest, src, len);
|
2007-06-16 21:46:15 +00:00
|
|
|
return (len);
|
2001-10-15 14:35:39 +00:00
|
|
|
}
|
|
|
|
|
2006-12-18 07:35:14 +00:00
|
|
|
static void
|
|
|
|
sparc64_maphint(vm_offset_t va, size_t len)
|
|
|
|
{
|
|
|
|
vm_paddr_t pa;
|
|
|
|
vm_offset_t mva;
|
|
|
|
size_t size;
|
2007-06-17 00:17:15 +00:00
|
|
|
int i, free_excess = 0;
|
2006-12-18 07:35:14 +00:00
|
|
|
|
|
|
|
if (!is_sun4v)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (tlb_store[va >> 22].te_pa != -1)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* round up to nearest 4MB page */
|
|
|
|
size = (len + PAGE_MASK_4M) & ~PAGE_MASK_4M;
|
2007-06-16 21:46:15 +00:00
|
|
|
#if 0
|
2007-06-17 00:17:15 +00:00
|
|
|
pa = alloc_phys(PAGE_SIZE_256M, PAGE_SIZE_256M);
|
2006-12-18 07:35:14 +00:00
|
|
|
|
|
|
|
if (pa != -1)
|
|
|
|
free_excess = 1;
|
|
|
|
else
|
|
|
|
#endif
|
2007-06-17 00:17:15 +00:00
|
|
|
pa = alloc_phys(size, PAGE_SIZE_256M);
|
2006-12-18 07:35:14 +00:00
|
|
|
if (pa == -1)
|
2007-06-17 00:17:15 +00:00
|
|
|
pa = alloc_phys(size, PAGE_SIZE_4M);
|
2006-12-18 07:35:14 +00:00
|
|
|
if (pa == -1)
|
2007-06-17 00:17:15 +00:00
|
|
|
panic("%s: out of memory", __func__);
|
2006-12-18 07:35:14 +00:00
|
|
|
|
|
|
|
for (i = 0; i < size; i += PAGE_SIZE_4M) {
|
2007-06-17 00:17:15 +00:00
|
|
|
mva = claim_virt(va + i, PAGE_SIZE_4M, 0);
|
2007-06-16 21:46:15 +00:00
|
|
|
if (mva != (va + i))
|
2007-06-17 00:17:15 +00:00
|
|
|
panic("%s: can't claim virtual page "
|
2007-06-16 21:46:15 +00:00
|
|
|
"(wanted %#lx, got %#lx)",
|
2007-06-17 00:17:15 +00:00
|
|
|
__func__, va, mva);
|
2006-12-18 07:35:14 +00:00
|
|
|
|
|
|
|
tlb_store[mva >> 22].te_pa = pa + i;
|
2007-06-17 00:17:15 +00:00
|
|
|
if (map_phys(-1, PAGE_SIZE_4M, mva, pa + i) != 0)
|
|
|
|
printf("%s: can't map physical page\n", __func__);
|
2006-12-18 07:35:14 +00:00
|
|
|
}
|
|
|
|
if (free_excess)
|
2007-06-17 00:17:15 +00:00
|
|
|
release_phys(pa, PAGE_SIZE_256M);
|
2006-12-18 07:35:14 +00:00
|
|
|
}
|
|
|
|
|
2001-10-15 14:35:39 +00:00
|
|
|
/*
|
|
|
|
* other MD functions
|
|
|
|
*/
|
2007-06-17 00:17:15 +00:00
|
|
|
static vm_offset_t
|
|
|
|
claim_virt(vm_offset_t virt, size_t size, int align)
|
|
|
|
{
|
|
|
|
vm_offset_t mva;
|
|
|
|
|
|
|
|
if (OF_call_method("claim", mmu, 3, 1, virt, size, align, &mva) == -1)
|
|
|
|
return ((vm_offset_t)-1);
|
|
|
|
return (mva);
|
|
|
|
}
|
|
|
|
|
|
|
|
static vm_offset_t
|
|
|
|
alloc_phys(size_t size, int align)
|
|
|
|
{
|
|
|
|
cell_t phys_hi, phys_low;
|
|
|
|
|
|
|
|
if (OF_call_method("claim", memory, 2, 2, size, align, &phys_low,
|
|
|
|
&phys_hi) == -1)
|
|
|
|
return ((vm_offset_t)-1);
|
|
|
|
return ((vm_offset_t)phys_hi << 32 | phys_low);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
map_phys(int mode, size_t size, vm_offset_t virt, vm_offset_t phys)
|
|
|
|
{
|
|
|
|
|
|
|
|
return (OF_call_method("map", mmu, 5, 0, (uint32_t)phys,
|
|
|
|
(uint32_t)(phys >> 32), virt, size, mode));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
release_phys(vm_offset_t phys, u_int size)
|
|
|
|
{
|
|
|
|
|
|
|
|
(void)OF_call_method("release", memory, 3, 0, (uint32_t)phys,
|
|
|
|
(uint32_t)(phys >> 32), size);
|
|
|
|
}
|
|
|
|
|
2001-10-15 14:35:39 +00:00
|
|
|
static int
|
2003-05-01 04:39:22 +00:00
|
|
|
__elfN(exec)(struct preloaded_file *fp)
|
2001-10-15 14:35:39 +00:00
|
|
|
{
|
|
|
|
struct file_metadata *fmp;
|
2001-10-30 06:31:45 +00:00
|
|
|
vm_offset_t mdp;
|
2003-06-15 19:16:43 +00:00
|
|
|
Elf_Addr entry;
|
2002-02-23 11:06:37 +00:00
|
|
|
Elf_Ehdr *e;
|
2001-10-30 06:31:45 +00:00
|
|
|
int error;
|
2001-10-15 14:35:39 +00:00
|
|
|
|
2007-06-16 21:46:15 +00:00
|
|
|
if ((fmp = file_findmetadata(fp, MODINFOMD_ELFHDR)) == 0)
|
|
|
|
return (EFTYPE);
|
2002-02-23 11:06:37 +00:00
|
|
|
e = (Elf_Ehdr *)&fmp->md_data;
|
2001-10-15 14:35:39 +00:00
|
|
|
|
2001-10-30 06:31:45 +00:00
|
|
|
if ((error = md_load(fp->f_args, &mdp)) != 0)
|
2007-06-16 21:46:15 +00:00
|
|
|
return (error);
|
2001-10-15 14:35:39 +00:00
|
|
|
|
2002-02-23 11:06:37 +00:00
|
|
|
printf("jumping to kernel entry at %#lx.\n", e->e_entry);
|
2009-02-10 21:48:42 +00:00
|
|
|
#ifdef LOADER_DEBUG
|
2008-08-07 22:46:25 +00:00
|
|
|
pmap_print_tlb_sun4u();
|
2001-10-15 14:35:39 +00:00
|
|
|
#endif
|
2003-06-15 19:16:43 +00:00
|
|
|
|
|
|
|
entry = e->e_entry;
|
|
|
|
|
2006-12-18 07:35:14 +00:00
|
|
|
OF_release((void *)heapva, HEAPSZ);
|
2003-06-15 19:16:43 +00:00
|
|
|
|
|
|
|
((kernel_entry_t *)entry)(mdp, 0, 0, 0, openfirmware);
|
2001-10-30 06:31:45 +00:00
|
|
|
|
2007-06-17 00:17:15 +00:00
|
|
|
panic("%s: exec returned", __func__);
|
2001-10-15 14:35:39 +00:00
|
|
|
}
|
|
|
|
|
2008-08-30 16:03:22 +00:00
|
|
|
static inline u_long
|
|
|
|
dtlb_get_data_sun4u(int slot)
|
|
|
|
{
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We read ASI_DTLB_DATA_ACCESS_REG twice in order to work
|
|
|
|
* around errata of USIII and beyond.
|
|
|
|
*/
|
|
|
|
(void)ldxa(TLB_DAR_SLOT(slot), ASI_DTLB_DATA_ACCESS_REG);
|
|
|
|
return (ldxa(TLB_DAR_SLOT(slot), ASI_DTLB_DATA_ACCESS_REG));
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline u_long
|
|
|
|
itlb_get_data_sun4u(int slot)
|
|
|
|
{
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We read ASI_ITLB_DATA_ACCESS_REG twice in order to work
|
|
|
|
* around errata of USIII and beyond.
|
|
|
|
*/
|
|
|
|
(void)ldxa(TLB_DAR_SLOT(slot), ASI_ITLB_DATA_ACCESS_REG);
|
|
|
|
return (ldxa(TLB_DAR_SLOT(slot), ASI_ITLB_DATA_ACCESS_REG));
|
|
|
|
}
|
|
|
|
|
2008-08-07 22:46:25 +00:00
|
|
|
static vm_offset_t
|
|
|
|
dtlb_va_to_pa_sun4u(vm_offset_t va)
|
|
|
|
{
|
2008-09-04 19:41:54 +00:00
|
|
|
u_long pstate, reg;
|
2008-08-07 22:46:25 +00:00
|
|
|
int i;
|
|
|
|
|
2008-09-04 19:41:54 +00:00
|
|
|
pstate = rdpr(pstate);
|
|
|
|
wrpr(pstate, pstate & ~PSTATE_IE, 0);
|
2008-08-07 22:46:25 +00:00
|
|
|
for (i = 0; i < dtlb_slot_max; i++) {
|
|
|
|
reg = ldxa(TLB_DAR_SLOT(i), ASI_DTLB_TAG_READ_REG);
|
|
|
|
if (TLB_TAR_VA(reg) != va)
|
|
|
|
continue;
|
2008-08-30 16:03:22 +00:00
|
|
|
reg = dtlb_get_data_sun4u(i);
|
2008-09-04 19:41:54 +00:00
|
|
|
wrpr(pstate, pstate, 0);
|
2009-04-14 19:02:34 +00:00
|
|
|
reg >>= TD_PA_SHIFT;
|
2008-08-30 16:03:22 +00:00
|
|
|
if (cpu_impl >= CPU_IMPL_ULTRASPARCIII)
|
2009-04-14 19:02:34 +00:00
|
|
|
return (reg & TD_PA_CH_MASK);
|
|
|
|
return (reg & TD_PA_SF_MASK);
|
2008-08-07 22:46:25 +00:00
|
|
|
}
|
2008-09-04 19:41:54 +00:00
|
|
|
wrpr(pstate, pstate, 0);
|
2008-08-07 22:46:25 +00:00
|
|
|
return (-1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static vm_offset_t
|
|
|
|
itlb_va_to_pa_sun4u(vm_offset_t va)
|
|
|
|
{
|
2008-09-04 19:41:54 +00:00
|
|
|
u_long pstate, reg;
|
2008-08-07 22:46:25 +00:00
|
|
|
int i;
|
|
|
|
|
2008-09-04 19:41:54 +00:00
|
|
|
pstate = rdpr(pstate);
|
|
|
|
wrpr(pstate, pstate & ~PSTATE_IE, 0);
|
2008-08-07 22:46:25 +00:00
|
|
|
for (i = 0; i < itlb_slot_max; i++) {
|
|
|
|
reg = ldxa(TLB_DAR_SLOT(i), ASI_ITLB_TAG_READ_REG);
|
|
|
|
if (TLB_TAR_VA(reg) != va)
|
|
|
|
continue;
|
2008-08-30 16:03:22 +00:00
|
|
|
reg = itlb_get_data_sun4u(i);
|
2008-09-04 19:41:54 +00:00
|
|
|
wrpr(pstate, pstate, 0);
|
2009-04-14 19:02:34 +00:00
|
|
|
reg >>= TD_PA_SHIFT;
|
2008-08-30 16:03:22 +00:00
|
|
|
if (cpu_impl >= CPU_IMPL_ULTRASPARCIII)
|
2009-04-14 19:02:34 +00:00
|
|
|
return (reg & TD_PA_CH_MASK);
|
|
|
|
return (reg & TD_PA_SF_MASK);
|
2008-08-07 22:46:25 +00:00
|
|
|
}
|
2008-09-04 19:41:54 +00:00
|
|
|
wrpr(pstate, pstate, 0);
|
2008-08-07 22:46:25 +00:00
|
|
|
return (-1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2008-08-30 16:03:22 +00:00
|
|
|
dtlb_enter_sun4u(u_long vpn, u_long data)
|
2008-08-07 22:46:25 +00:00
|
|
|
{
|
|
|
|
u_long reg;
|
|
|
|
|
|
|
|
reg = rdpr(pstate);
|
|
|
|
wrpr(pstate, reg & ~PSTATE_IE, 0);
|
2008-08-30 16:03:22 +00:00
|
|
|
stxa(AA_DMMU_TAR, ASI_DMMU,
|
2009-04-13 19:43:37 +00:00
|
|
|
TLB_TAR_VA(vpn) | TLB_TAR_CTX(TLB_CTX_KERNEL));
|
2008-08-30 16:03:22 +00:00
|
|
|
stxa(0, ASI_DTLB_DATA_IN_REG, data);
|
2008-08-07 22:46:25 +00:00
|
|
|
membar(Sync);
|
|
|
|
wrpr(pstate, reg, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2008-08-30 16:03:22 +00:00
|
|
|
itlb_enter_sun4u(u_long vpn, u_long data)
|
2008-08-07 22:46:25 +00:00
|
|
|
{
|
|
|
|
u_long reg;
|
2008-09-10 20:07:08 +00:00
|
|
|
int i;
|
2008-08-07 22:46:25 +00:00
|
|
|
|
|
|
|
reg = rdpr(pstate);
|
|
|
|
wrpr(pstate, reg & ~PSTATE_IE, 0);
|
2008-09-10 20:07:08 +00:00
|
|
|
|
|
|
|
if (cpu_impl == CPU_IMPL_ULTRASPARCIIIp) {
|
|
|
|
/*
|
|
|
|
* Search an unused slot != 0 and explicitly enter the data
|
|
|
|
* and tag there in order to avoid Cheetah+ erratum 34.
|
|
|
|
*/
|
|
|
|
for (i = 1; i < itlb_slot_max; i++) {
|
|
|
|
if ((itlb_get_data_sun4u(i) & TD_V) != 0)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
stxa(AA_IMMU_TAR, ASI_IMMU,
|
2009-04-13 19:43:37 +00:00
|
|
|
TLB_TAR_VA(vpn) | TLB_TAR_CTX(TLB_CTX_KERNEL));
|
2008-09-10 20:07:08 +00:00
|
|
|
stxa(TLB_DAR_SLOT(i), ASI_ITLB_DATA_ACCESS_REG, data);
|
2009-02-10 21:48:42 +00:00
|
|
|
flush(PROMBASE);
|
2008-09-10 20:07:08 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
wrpr(pstate, reg, 0);
|
|
|
|
if (i == itlb_slot_max)
|
|
|
|
panic("%s: could not find an unused slot", __func__);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2008-08-30 16:03:22 +00:00
|
|
|
stxa(AA_IMMU_TAR, ASI_IMMU,
|
2009-04-13 19:43:37 +00:00
|
|
|
TLB_TAR_VA(vpn) | TLB_TAR_CTX(TLB_CTX_KERNEL));
|
2008-08-30 16:03:22 +00:00
|
|
|
stxa(0, ASI_ITLB_DATA_IN_REG, data);
|
2009-02-10 21:48:42 +00:00
|
|
|
flush(PROMBASE);
|
2008-08-07 22:46:25 +00:00
|
|
|
wrpr(pstate, reg, 0);
|
|
|
|
}
|
|
|
|
|
2008-09-10 20:07:08 +00:00
|
|
|
static void
|
|
|
|
itlb_relocate_locked0_sun4u(void)
|
|
|
|
{
|
|
|
|
u_long data, pstate, tag;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (cpu_impl != CPU_IMPL_ULTRASPARCIIIp)
|
|
|
|
return;
|
|
|
|
|
|
|
|
pstate = rdpr(pstate);
|
|
|
|
wrpr(pstate, pstate & ~PSTATE_IE, 0);
|
|
|
|
|
|
|
|
data = itlb_get_data_sun4u(0);
|
|
|
|
if ((data & (TD_V | TD_L)) != (TD_V | TD_L)) {
|
|
|
|
wrpr(pstate, pstate, 0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Flush the mapping of slot 0. */
|
|
|
|
tag = ldxa(TLB_DAR_SLOT(0), ASI_ITLB_TAG_READ_REG);
|
|
|
|
stxa(TLB_DEMAP_VA(TLB_TAR_VA(tag)) | TLB_DEMAP_PRIMARY |
|
|
|
|
TLB_DEMAP_PAGE, ASI_IMMU_DEMAP, 0);
|
|
|
|
flush(0); /* The USIII-family ignores the address. */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Search a replacement slot != 0 and enter the data and tag
|
|
|
|
* that formerly were in slot 0.
|
|
|
|
*/
|
|
|
|
for (i = 1; i < itlb_slot_max; i++) {
|
|
|
|
if ((itlb_get_data_sun4u(i) & TD_V) != 0)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
stxa(AA_IMMU_TAR, ASI_IMMU, tag);
|
|
|
|
stxa(TLB_DAR_SLOT(i), ASI_ITLB_DATA_ACCESS_REG, data);
|
|
|
|
flush(0); /* The USIII-family ignores the address. */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
wrpr(pstate, pstate, 0);
|
|
|
|
if (i == itlb_slot_max)
|
|
|
|
panic("%s: could not find a replacement slot", __func__);
|
|
|
|
}
|
|
|
|
|
2001-10-15 14:35:39 +00:00
|
|
|
static int
|
2006-10-09 04:43:07 +00:00
|
|
|
mmu_mapin_sun4u(vm_offset_t va, vm_size_t len)
|
2001-10-15 14:35:39 +00:00
|
|
|
{
|
2002-02-23 04:04:30 +00:00
|
|
|
vm_offset_t pa, mva;
|
2002-05-29 05:49:59 +00:00
|
|
|
u_long data;
|
2001-10-15 14:35:39 +00:00
|
|
|
|
|
|
|
if (va + len > curkva)
|
|
|
|
curkva = va + len;
|
|
|
|
|
2002-02-23 04:04:30 +00:00
|
|
|
pa = (vm_offset_t)-1;
|
2001-10-30 06:31:45 +00:00
|
|
|
len += va & PAGE_MASK_4M;
|
|
|
|
va &= ~PAGE_MASK_4M;
|
2001-10-15 14:35:39 +00:00
|
|
|
while (len) {
|
2008-08-07 22:46:25 +00:00
|
|
|
if (dtlb_va_to_pa_sun4u(va) == (vm_offset_t)-1 ||
|
|
|
|
itlb_va_to_pa_sun4u(va) == (vm_offset_t)-1) {
|
2008-08-22 20:28:19 +00:00
|
|
|
/* Allocate a physical page, claim the virtual area. */
|
2002-02-23 04:04:30 +00:00
|
|
|
if (pa == (vm_offset_t)-1) {
|
2007-06-17 00:17:15 +00:00
|
|
|
pa = alloc_phys(PAGE_SIZE_4M, PAGE_SIZE_4M);
|
2002-02-23 04:04:30 +00:00
|
|
|
if (pa == (vm_offset_t)-1)
|
2007-06-17 00:17:15 +00:00
|
|
|
panic("%s: out of memory", __func__);
|
|
|
|
mva = claim_virt(va, PAGE_SIZE_4M, 0);
|
2007-06-16 21:46:15 +00:00
|
|
|
if (mva != va)
|
2007-06-17 00:17:15 +00:00
|
|
|
panic("%s: can't claim virtual page "
|
2002-02-23 04:04:30 +00:00
|
|
|
"(wanted %#lx, got %#lx)",
|
2007-06-17 00:17:15 +00:00
|
|
|
__func__, va, mva);
|
2008-08-22 20:28:19 +00:00
|
|
|
/*
|
|
|
|
* The mappings may have changed, be paranoid.
|
|
|
|
*/
|
2002-02-23 04:04:30 +00:00
|
|
|
continue;
|
|
|
|
}
|
2002-04-02 17:10:15 +00:00
|
|
|
/*
|
|
|
|
* Actually, we can only allocate two pages less at
|
|
|
|
* most (depending on the kernel TSB size).
|
|
|
|
*/
|
|
|
|
if (dtlb_slot >= dtlb_slot_max)
|
2007-06-16 21:46:15 +00:00
|
|
|
panic("%s: out of dtlb_slots", __func__);
|
2002-04-02 17:10:15 +00:00
|
|
|
if (itlb_slot >= itlb_slot_max)
|
2007-06-16 21:46:15 +00:00
|
|
|
panic("%s: out of itlb_slots", __func__);
|
2002-05-29 05:49:59 +00:00
|
|
|
data = TD_V | TD_4M | TD_PA(pa) | TD_L | TD_CP |
|
2002-02-23 11:06:37 +00:00
|
|
|
TD_CV | TD_P | TD_W;
|
2002-05-29 05:49:59 +00:00
|
|
|
dtlb_store[dtlb_slot].te_pa = pa;
|
|
|
|
dtlb_store[dtlb_slot].te_va = va;
|
|
|
|
itlb_store[itlb_slot].te_pa = pa;
|
|
|
|
itlb_store[itlb_slot].te_va = va;
|
|
|
|
dtlb_slot++;
|
|
|
|
itlb_slot++;
|
2008-08-07 22:46:25 +00:00
|
|
|
dtlb_enter_sun4u(va, data);
|
|
|
|
itlb_enter_sun4u(va, data);
|
2002-02-23 04:04:30 +00:00
|
|
|
pa = (vm_offset_t)-1;
|
2001-10-15 14:35:39 +00:00
|
|
|
}
|
2001-10-30 06:31:45 +00:00
|
|
|
len -= len > PAGE_SIZE_4M ? PAGE_SIZE_4M : len;
|
|
|
|
va += PAGE_SIZE_4M;
|
2001-10-15 14:35:39 +00:00
|
|
|
}
|
2006-10-09 04:43:07 +00:00
|
|
|
if (pa != (vm_offset_t)-1)
|
2007-06-17 00:17:15 +00:00
|
|
|
release_phys(pa, PAGE_SIZE_4M);
|
2007-06-16 21:46:15 +00:00
|
|
|
return (0);
|
2006-10-09 04:43:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
mmu_mapin_sun4v(vm_offset_t va, vm_size_t len)
|
|
|
|
{
|
|
|
|
vm_offset_t pa, mva;
|
|
|
|
|
|
|
|
if (va + len > curkva)
|
|
|
|
curkva = va + len;
|
|
|
|
|
|
|
|
pa = (vm_offset_t)-1;
|
|
|
|
len += va & PAGE_MASK_4M;
|
|
|
|
va &= ~PAGE_MASK_4M;
|
|
|
|
while (len) {
|
|
|
|
if ((va >> 22) > SUN4V_TLB_SLOT_MAX)
|
2007-06-17 00:17:15 +00:00
|
|
|
panic("%s: trying to map more than 4GB", __func__);
|
2006-10-09 04:43:07 +00:00
|
|
|
if (tlb_store[va >> 22].te_pa == -1) {
|
|
|
|
/* Allocate a physical page, claim the virtual area */
|
|
|
|
if (pa == (vm_offset_t)-1) {
|
2007-06-17 00:17:15 +00:00
|
|
|
pa = alloc_phys(PAGE_SIZE_4M, PAGE_SIZE_4M);
|
2006-10-09 04:43:07 +00:00
|
|
|
if (pa == (vm_offset_t)-1)
|
2007-06-17 00:17:15 +00:00
|
|
|
panic("%s: out of memory", __func__);
|
|
|
|
mva = claim_virt(va, PAGE_SIZE_4M, 0);
|
2007-06-16 21:46:15 +00:00
|
|
|
if (mva != va)
|
2007-06-17 00:17:15 +00:00
|
|
|
panic("%s: can't claim virtual page "
|
2006-10-09 04:43:07 +00:00
|
|
|
"(wanted %#lx, got %#lx)",
|
2007-06-17 00:17:15 +00:00
|
|
|
__func__, va, mva);
|
2006-10-09 04:43:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
tlb_store[va >> 22].te_pa = pa;
|
2007-06-17 00:17:15 +00:00
|
|
|
if (map_phys(-1, PAGE_SIZE_4M, va, pa) == -1)
|
|
|
|
printf("%s: can't map physical page\n",
|
|
|
|
__func__);
|
2006-10-09 04:43:07 +00:00
|
|
|
pa = (vm_offset_t)-1;
|
|
|
|
}
|
|
|
|
len -= len > PAGE_SIZE_4M ? PAGE_SIZE_4M : len;
|
|
|
|
va += PAGE_SIZE_4M;
|
|
|
|
}
|
2002-02-23 04:04:30 +00:00
|
|
|
if (pa != (vm_offset_t)-1)
|
2007-06-17 00:17:15 +00:00
|
|
|
release_phys(pa, PAGE_SIZE_4M);
|
2007-06-16 21:46:15 +00:00
|
|
|
return (0);
|
2001-10-15 14:35:39 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static vm_offset_t
|
|
|
|
init_heap(void)
|
|
|
|
{
|
|
|
|
|
|
|
|
/* There is no need for continuous physical heap memory. */
|
|
|
|
heapva = (vm_offset_t)OF_claim((void *)HEAPVA, HEAPSZ, 32);
|
2007-06-16 21:46:15 +00:00
|
|
|
return (heapva);
|
2001-10-15 14:35:39 +00:00
|
|
|
}
|
|
|
|
|
2002-02-23 11:06:37 +00:00
|
|
|
static void
|
2006-10-09 04:43:07 +00:00
|
|
|
tlb_init_sun4u(void)
|
2002-02-23 11:06:37 +00:00
|
|
|
{
|
|
|
|
phandle_t child;
|
|
|
|
char buf[128];
|
|
|
|
u_int bootcpu;
|
|
|
|
u_int cpu;
|
|
|
|
|
2008-08-30 16:03:22 +00:00
|
|
|
cpu_impl = VER_IMPL(rdpr(ver));
|
2002-02-23 11:06:37 +00:00
|
|
|
bootcpu = UPA_CR_GET_MID(ldxa(0, ASI_UPA_CONFIG_REG));
|
|
|
|
for (child = OF_child(root); child != 0; child = OF_peer(child)) {
|
2008-08-30 16:03:22 +00:00
|
|
|
if (OF_getprop(child, "device_type", buf, sizeof(buf)) <= 0)
|
|
|
|
continue;
|
|
|
|
if (strcmp(buf, "cpu") != 0)
|
|
|
|
continue;
|
|
|
|
if (OF_getprop(child, cpu_impl < CPU_IMPL_ULTRASPARCIII ?
|
|
|
|
"upa-portid" : "portid", &cpu, sizeof(cpu)) <= 0)
|
|
|
|
continue;
|
|
|
|
if (cpu == bootcpu)
|
|
|
|
break;
|
2002-02-23 11:06:37 +00:00
|
|
|
}
|
|
|
|
if (cpu != bootcpu)
|
2007-06-16 21:46:15 +00:00
|
|
|
panic("%s: no node for bootcpu?!?!", __func__);
|
2008-08-22 20:28:19 +00:00
|
|
|
|
2002-02-23 11:06:37 +00:00
|
|
|
if (OF_getprop(child, "#dtlb-entries", &dtlb_slot_max,
|
|
|
|
sizeof(dtlb_slot_max)) == -1 ||
|
|
|
|
OF_getprop(child, "#itlb-entries", &itlb_slot_max,
|
|
|
|
sizeof(itlb_slot_max)) == -1)
|
2007-06-17 00:17:15 +00:00
|
|
|
panic("%s: can't get TLB slot max.", __func__);
|
2008-09-10 20:07:08 +00:00
|
|
|
|
|
|
|
if (cpu_impl == CPU_IMPL_ULTRASPARCIIIp) {
|
|
|
|
#ifdef LOADER_DEBUG
|
|
|
|
printf("pre fixup:\n");
|
|
|
|
pmap_print_tlb_sun4u();
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Relocate the locked entry in it16 slot 0 (if existent)
|
|
|
|
* as part of working around Cheetah+ erratum 34.
|
|
|
|
*/
|
|
|
|
itlb_relocate_locked0_sun4u();
|
|
|
|
|
|
|
|
#ifdef LOADER_DEBUG
|
|
|
|
printf("post fixup:\n");
|
|
|
|
pmap_print_tlb_sun4u();
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2002-02-23 11:06:37 +00:00
|
|
|
dtlb_store = malloc(dtlb_slot_max * sizeof(*dtlb_store));
|
|
|
|
itlb_store = malloc(itlb_slot_max * sizeof(*itlb_store));
|
|
|
|
if (dtlb_store == NULL || itlb_store == NULL)
|
2007-06-17 00:17:15 +00:00
|
|
|
panic("%s: can't allocate TLB store", __func__);
|
2002-02-23 11:06:37 +00:00
|
|
|
}
|
|
|
|
|
2006-10-09 04:43:07 +00:00
|
|
|
static void
|
|
|
|
tlb_init_sun4v(void)
|
|
|
|
{
|
2007-06-16 21:46:15 +00:00
|
|
|
|
2006-10-09 04:43:07 +00:00
|
|
|
tlb_store = malloc(SUN4V_TLB_SLOT_MAX * sizeof(*tlb_store));
|
|
|
|
memset(tlb_store, 0xFF, SUN4V_TLB_SLOT_MAX * sizeof(*tlb_store));
|
|
|
|
}
|
|
|
|
|
2001-10-30 06:31:45 +00:00
|
|
|
int
|
|
|
|
main(int (*openfirm)(void *))
|
2001-10-15 14:35:39 +00:00
|
|
|
{
|
|
|
|
char bootpath[64];
|
2006-10-09 04:43:07 +00:00
|
|
|
char compatible[32];
|
2001-10-15 14:35:39 +00:00
|
|
|
struct devsw **dp;
|
|
|
|
|
|
|
|
/*
|
2008-08-22 20:28:19 +00:00
|
|
|
* Tell the Open Firmware functions where they find the OFW gate.
|
2001-10-15 14:35:39 +00:00
|
|
|
*/
|
2001-10-30 06:31:45 +00:00
|
|
|
OF_init(openfirm);
|
2001-10-15 14:35:39 +00:00
|
|
|
|
|
|
|
archsw.arch_getdev = ofw_getdev;
|
|
|
|
archsw.arch_copyin = sparc64_copyin;
|
|
|
|
archsw.arch_copyout = ofw_copyout;
|
|
|
|
archsw.arch_readin = sparc64_readin;
|
|
|
|
archsw.arch_autoload = sparc64_autoload;
|
2006-12-18 07:35:14 +00:00
|
|
|
archsw.arch_maphint = sparc64_maphint;
|
2001-10-15 14:35:39 +00:00
|
|
|
|
|
|
|
init_heap();
|
|
|
|
setheap((void *)heapva, (void *)(heapva + HEAPSZ));
|
2007-06-16 21:46:15 +00:00
|
|
|
|
2001-10-15 14:35:39 +00:00
|
|
|
/*
|
|
|
|
* Probe for a console.
|
|
|
|
*/
|
|
|
|
cons_probe();
|
|
|
|
|
2007-06-17 00:17:15 +00:00
|
|
|
if ((root = OF_peer(0)) == -1)
|
|
|
|
panic("%s: can't get root phandle", __func__);
|
|
|
|
OF_getprop(root, "compatible", compatible, sizeof(compatible));
|
2006-10-09 04:43:07 +00:00
|
|
|
if (!strcmp(compatible, "sun4v")) {
|
|
|
|
printf("\nBooting with sun4v support.\n");
|
|
|
|
mmu_ops = &mmu_ops_sun4v;
|
2006-12-18 07:35:14 +00:00
|
|
|
is_sun4v = 1;
|
2006-10-09 04:43:07 +00:00
|
|
|
} else {
|
|
|
|
printf("\nBooting with sun4u support.\n");
|
|
|
|
mmu_ops = &mmu_ops_sun4u;
|
|
|
|
}
|
|
|
|
|
|
|
|
mmu_ops->tlb_init();
|
2002-02-23 11:06:37 +00:00
|
|
|
|
2001-10-15 14:35:39 +00:00
|
|
|
/*
|
|
|
|
* Initialize devices.
|
|
|
|
*/
|
|
|
|
for (dp = devsw; *dp != 0; dp++) {
|
|
|
|
if ((*dp)->dv_init != 0)
|
|
|
|
(*dp)->dv_init();
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set up the current device.
|
|
|
|
*/
|
2007-06-17 00:17:15 +00:00
|
|
|
OF_getprop(chosen, "bootpath", bootpath, sizeof(bootpath));
|
2001-10-15 14:35:39 +00:00
|
|
|
|
2002-11-10 19:17:36 +00:00
|
|
|
/*
|
|
|
|
* Sun compatible bootable CD-ROMs have a disk label placed
|
|
|
|
* before the cd9660 data, with the actual filesystem being
|
|
|
|
* in the first partition, while the other partitions contain
|
|
|
|
* pseudo disk labels with embedded boot blocks for different
|
|
|
|
* architectures, which may be followed by UFS filesystems.
|
|
|
|
* The firmware will set the boot path to the partition it
|
|
|
|
* boots from ('f' in the sun4u case), but we want the kernel
|
|
|
|
* to be loaded from the cd9660 fs ('a'), so the boot path
|
|
|
|
* needs to be altered.
|
|
|
|
*/
|
|
|
|
if (bootpath[strlen(bootpath) - 2] == ':' &&
|
|
|
|
bootpath[strlen(bootpath) - 1] == 'f') {
|
|
|
|
bootpath[strlen(bootpath) - 1] = 'a';
|
|
|
|
printf("Boot path set to %s\n", bootpath);
|
2001-10-15 14:35:39 +00:00
|
|
|
}
|
|
|
|
|
2002-11-10 19:17:36 +00:00
|
|
|
env_setenv("currdev", EV_VOLATILE, bootpath,
|
2001-10-15 14:35:39 +00:00
|
|
|
ofw_setcurrdev, env_nounset);
|
2002-11-10 19:17:36 +00:00
|
|
|
env_setenv("loaddev", EV_VOLATILE, bootpath,
|
2001-10-15 14:35:39 +00:00
|
|
|
env_noset, env_nounset);
|
|
|
|
|
2002-08-04 01:30:26 +00:00
|
|
|
printf("\n");
|
|
|
|
printf("%s, Revision %s\n", bootprog_name, bootprog_rev);
|
|
|
|
printf("(%s, %s)\n", bootprog_maker, bootprog_date);
|
2001-10-15 14:35:39 +00:00
|
|
|
printf("bootpath=\"%s\"\n", bootpath);
|
|
|
|
|
|
|
|
/* Give control to the machine independent loader code. */
|
|
|
|
interact();
|
2007-06-16 21:46:15 +00:00
|
|
|
return (1);
|
2001-10-15 14:35:39 +00:00
|
|
|
}
|
|
|
|
|
2002-02-23 04:04:30 +00:00
|
|
|
COMMAND_SET(reboot, "reboot", "reboot the system", command_reboot);
|
|
|
|
|
|
|
|
static int
|
|
|
|
command_reboot(int argc, char *argv[])
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; devsw[i] != NULL; ++i)
|
|
|
|
if (devsw[i]->dv_cleanup != NULL)
|
|
|
|
(devsw[i]->dv_cleanup)();
|
|
|
|
|
|
|
|
printf("Rebooting...\n");
|
|
|
|
OF_exit();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* provide this for panic, as it's not in the startup code */
|
|
|
|
void
|
|
|
|
exit(int code)
|
|
|
|
{
|
2007-06-16 21:46:15 +00:00
|
|
|
|
2002-02-23 04:04:30 +00:00
|
|
|
OF_exit();
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef LOADER_DEBUG
|
2009-02-10 21:48:42 +00:00
|
|
|
static const char *const page_sizes[] = {
|
2001-10-15 14:35:39 +00:00
|
|
|
" 8k", " 64k", "512k", " 4m"
|
|
|
|
};
|
|
|
|
|
|
|
|
static void
|
2008-08-07 22:46:25 +00:00
|
|
|
pmap_print_tte_sun4u(tte_t tag, tte_t tte)
|
2001-10-15 14:35:39 +00:00
|
|
|
{
|
2007-06-16 21:46:15 +00:00
|
|
|
|
2001-10-15 14:35:39 +00:00
|
|
|
printf("%s %s ",
|
2009-04-14 19:02:34 +00:00
|
|
|
page_sizes[(tte >> TD_SIZE_SHIFT) & TD_SIZE_MASK],
|
2001-10-15 14:35:39 +00:00
|
|
|
tag & TD_G ? "G" : " ");
|
|
|
|
printf(tte & TD_W ? "W " : " ");
|
|
|
|
printf(tte & TD_P ? "\e[33mP\e[0m " : " ");
|
|
|
|
printf(tte & TD_E ? "E " : " ");
|
|
|
|
printf(tte & TD_CV ? "CV " : " ");
|
|
|
|
printf(tte & TD_CP ? "CP " : " ");
|
|
|
|
printf(tte & TD_L ? "\e[32mL\e[0m " : " ");
|
|
|
|
printf(tte & TD_IE ? "IE " : " ");
|
|
|
|
printf(tte & TD_NFO ? "NFO " : " ");
|
2008-08-07 22:46:25 +00:00
|
|
|
printf("pa=0x%lx va=0x%lx ctx=%ld\n",
|
|
|
|
TD_PA(tte), TLB_TAR_VA(tag), TLB_TAR_CTX(tag));
|
2001-10-15 14:35:39 +00:00
|
|
|
}
|
2008-08-07 22:46:25 +00:00
|
|
|
|
|
|
|
static void
|
|
|
|
pmap_print_tlb_sun4u(void)
|
2001-10-15 14:35:39 +00:00
|
|
|
{
|
2008-08-07 22:46:25 +00:00
|
|
|
tte_t tag, tte;
|
2008-08-30 16:03:22 +00:00
|
|
|
u_long pstate;
|
2001-10-15 14:35:39 +00:00
|
|
|
int i;
|
2008-08-07 22:46:25 +00:00
|
|
|
|
2008-08-30 16:03:22 +00:00
|
|
|
pstate = rdpr(pstate);
|
2008-08-07 22:46:25 +00:00
|
|
|
for (i = 0; i < itlb_slot_max; i++) {
|
2008-08-30 16:03:22 +00:00
|
|
|
wrpr(pstate, pstate & ~PSTATE_IE, 0);
|
|
|
|
tte = itlb_get_data_sun4u(i);
|
|
|
|
wrpr(pstate, pstate, 0);
|
2008-08-07 22:46:25 +00:00
|
|
|
if (!(tte & TD_V))
|
|
|
|
continue;
|
|
|
|
tag = ldxa(TLB_DAR_SLOT(i), ASI_ITLB_TAG_READ_REG);
|
|
|
|
printf("iTLB-%2u: ", i);
|
|
|
|
pmap_print_tte_sun4u(tag, tte);
|
|
|
|
}
|
|
|
|
for (i = 0; i < dtlb_slot_max; i++) {
|
2008-08-30 16:03:22 +00:00
|
|
|
wrpr(pstate, pstate & ~PSTATE_IE, 0);
|
|
|
|
tte = dtlb_get_data_sun4u(i);
|
|
|
|
wrpr(pstate, pstate, 0);
|
2001-10-15 14:35:39 +00:00
|
|
|
if (!(tte & TD_V))
|
|
|
|
continue;
|
2008-08-07 22:46:25 +00:00
|
|
|
tag = ldxa(TLB_DAR_SLOT(i), ASI_DTLB_TAG_READ_REG);
|
|
|
|
printf("dTLB-%2u: ", i);
|
|
|
|
pmap_print_tte_sun4u(tag, tte);
|
2001-10-15 14:35:39 +00:00
|
|
|
}
|
|
|
|
}
|
2002-02-23 04:04:30 +00:00
|
|
|
#endif
|