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On an icache sync by address/len, round the length up if the operation spans

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a cacheline boundary.

PR:		199740
Submitted by:	Juergen Weiss <weiss@uni-mainz.de>
This commit is contained in:
ian 2015-05-04 14:55:21 +00:00
parent c8296a2c95
commit 010365f81b
1 changed files with 3 additions and 0 deletions
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3
sys/arm/arm/cpufunc_asm_armv7.S
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@ -266,6 +266,9 @@ END(armv7_icache_sync_all)
ENTRY_NP(armv7_icache_sync_range)
ldr ip, .Larmv7_icache_line_size
ldr ip, [ip]
sub r3, ip, #1 /* Address need not be aligned, but */
and r2, r0, r3 /* round length up if op spans line */
add r1, r1, r2 /* boundary: len += addr & linemask; */
.Larmv7_sync_next:
mcr CP15_DCCMVAC(r0)
mcr CP15_ICIMVAU(r0)