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For MSI capable hardwares, enable MSI enable bit in RL_CFG2

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register.  If MSI was disabled by hw.re.msi_disable tunable
expliclty clear the MSI enable bit.
This commit is contained in:
Pyun YongHyeon 2008-03-23 05:31:35 +00:00
parent ce6283934e
commit 03ca7ae8a9
2 changed files with 14 additions and 0 deletions
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13
sys/dev/re/if_re.c
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@ -1146,6 +1146,7 @@ re_attach(dev)
u_int16_t re_did = 0;
int error = 0, rid, i;
int msic, reg;
uint8_t cfg;
sc = device_get_softc(dev);
sc->rl_dev = dev;
@ -1189,6 +1190,18 @@ re_attach(dev)
}
}
/* For MSI capable hardwares, explicitily set/clear MSI enable bit. */
if (msic != 0) {
CSR_WRITE_1(sc, RL_EECMD, RL_EE_MODE);
cfg = CSR_READ_1(sc, RL_CFG2);
if (sc->rl_msi != 0)
cfg |= RL_CFG2_MSI;
else
cfg &= ~RL_CFG2_MSI;
CSR_WRITE_1(sc, RL_CFG2, cfg);
CSR_WRITE_1(sc, RL_EECMD, 0);
}
/* Allocate interrupt */
if (sc->rl_msi == 0) {
rid = 0;

1
sys/pci/if_rlreg.h
View File

@ -382,6 +382,7 @@
#define RL_CFG2_PCI66MHZ 0x01
#define RL_CFG2_PCI64BIT 0x08
#define RL_CFG2_AUXPWR 0x10
#define RL_CFG2_MSI 0x20
/*
* Config 3 register