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Fix the value of ID_AA64ISAR1_DPB_SHIFT, the field is bits 3:0.

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Sponsored by:	DARPA, AFRL
This commit is contained in:
Andrew Turner 2017-09-07 16:12:56 +00:00
parent 84ed53b2c0
commit 1a2e5c004d
1 changed files with 1 additions and 1 deletions
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2
sys/arm64/include/armreg.h
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@ -240,7 +240,7 @@
/* ID_AA64ISAR1_EL1 */
#define ID_AA64ISAR1_MASK 0x0000000f
#define ID_AA64ISAR1_DPB_SHIFT 4
#define ID_AA64ISAR1_DPB_SHIFT 0
#define ID_AA64ISAR1_DPB_MASK (0xf << ID_AA64ISAR1_DPB_SHIFT)
#define ID_AA64ISAR1_DPB(x) ((x) & ID_AA64ISAR1_DPB_MASK)
#define ID_AA64ISAR1_DPB_NONE (0x0 << ID_AA64ISAR1_DPB_SHIFT)