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Add Ingenic XBurst coprocessor 0 extra bits.

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Submitted by:	kan
Sponsored by:	DARPA, AFRL
This commit is contained in:
br 2016-11-19 15:38:13 +00:00
parent 4a353c5f90
commit 4141a1b905
2 changed files with 14 additions and 1 deletions
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7
sys/mips/include/cpufunc.h
View File

@ -279,6 +279,13 @@ MIPS_RW32_COP0(entrylo1, MIPS_COP_0_TLB_LO1);
MIPS_RW32_COP0(prid, MIPS_COP_0_PRID);
/* XXX 64-bit? */
MIPS_RW32_COP0_SEL(ebase, MIPS_COP_0_PRID, 1);
#ifdef CPU_XBURST
MIPS_RW32_COP0_SEL(xburst_mbox0, MIPS_COP_0_XBURST_MBOX, 0);
MIPS_RW32_COP0_SEL(xburst_mbox1, MIPS_COP_0_XBURST_MBOX, 1);
MIPS_RW32_COP0_SEL(xburst_core_ctl, MIPS_COP_0_XBURST_C12, 2);
MIPS_RW32_COP0_SEL(xburst_core_sts, MIPS_COP_0_XBURST_C12, 3);
MIPS_RW32_COP0_SEL(xburst_reim, MIPS_COP_0_XBURST_C12, 4);
#endif
MIPS_RW32_COP0(watchlo, MIPS_COP_0_WATCH_LO);
MIPS_RW32_COP0_SEL(watchlo1, MIPS_COP_0_WATCH_LO, 1);
MIPS_RW32_COP0_SEL(watchlo2, MIPS_COP_0_WATCH_LO, 2);

8
sys/mips/include/cpuregs.h
View File

@ -522,12 +522,18 @@
#define MIPS_COP_0_COUNT _(9)
#define MIPS_COP_0_COMPARE _(11)
#ifdef CPU_XBURST
#define MIPS_COP_0_XBURST_C12 _(12)
#endif
#define MIPS_COP_0_CONFIG _(16)
#define MIPS_COP_0_LLADDR _(17)
#define MIPS_COP_0_WATCH_LO _(18)
#define MIPS_COP_0_WATCH_HI _(19)
#define MIPS_COP_0_TLB_XCONTEXT _(20)
#ifdef CPU_XBURST
#define MIPS_COP_0_XBURST_MBOX _(20)
#endif
#define MIPS_COP_0_ECC _(26)
#define MIPS_COP_0_CACHE_ERR _(27)
#define MIPS_COP_0_TAG_LO _(28)