Add event name aliases for Pentium PMCs.
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@ -1291,7 +1291,14 @@ p4_allocate_pmc(enum pmc_event pe, char *ctrspec,
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*/
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static struct pmc_event_alias p5_aliases[] = {
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EV_ALIAS("branches", "p5-taken-branches"),
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EV_ALIAS("cycles", "tsc"),
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EV_ALIAS("dc-misses", "p5-data-read-miss-or-write-miss"),
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EV_ALIAS("ic-misses", "p5-code-cache-miss"),
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EV_ALIAS("instructions", "p5-instructions-executed"),
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EV_ALIAS("interrupts", "p5-hardware-interrupts"),
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EV_ALIAS("unhalted-cycles",
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"p5-number-of-cycles-not-in-halt-state"),
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EV_ALIAS(NULL, NULL)
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};
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@ -380,6 +380,21 @@ The number of writes to non-cacheable memory, including write cycles
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caused by TLB misses and I/O writes.
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This event is only allocated on counter 1.
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.El
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.Ss Event Name Aliases
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The following table shows the mapping between the PMC-independent
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aliases supported by
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.Lb libpmc
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and the underlying hardware events used.
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.Bl -column "branch-mispredicts" "Description"
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.It Em Alias Ta Em Event
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.It Li branches Ta Li p5-taken-branches
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.It Li branch-mispredicts Ta Li (unsupported)
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.It Li dc-misses Ta Li p5-data-read-miss-or-write-miss
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.It Li ic-misses Ta Li p5-code-cache-miss
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.It Li instructions Ta Li p5-instructions-executed
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.It Li interrupts Ta Li p5-hardware-interrupts
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.It Li unhalted-cycles Ta Li p5-number-of-cycles-not-in-halt-state
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.El
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.Sh SEE ALSO
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.Xr pmc 3 ,
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.Xr pmc.k7 3 ,
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