arge: use 1-byte TX and RX alignment for AR9330/AR9331.

This part seems to work bug-free with single byte TX/RX buffer alignment.

This drops the CPU requirement to bridge 100mbit iperf from 100% CPU
to ~ 50% CPU.

Tested:

* AP121 (AR9330) SoC, highly magic netbooted kernel + USB rootfs
  due to 4mb flash, 16mb RAM; doing bridging between arge0 and arge1.

Notes:

* Yes, I likely can also turn this on for the AR934x SoC family now.

  But since hardware design apparently follows similar branching
  strategies to software design, I'll go and make sure all the AR934x's
  that made it out into shipping products work before I flip it on.
This commit is contained in:
Adrian Chadd 2015-10-22 08:02:27 +00:00
parent 66845bf5c5
commit 73f96038d2

View File

@ -653,6 +653,8 @@ arge_attach(device_t dev)
* Hardware workarounds.
*/
switch (ar71xx_soc) {
case AR71XX_SOC_AR9330:
case AR71XX_SOC_AR9331:
case AR71XX_SOC_QCA9556:
case AR71XX_SOC_QCA9558:
/* Arbitrary alignment */