Apply patch to the dc driver to handle Macronix MX98715AEC-C/D/E chips,
which differ slightly from the Macronix MX98715AEC chip on the sample adapter that I have in that the multicast hash table is only 128 bits wide instead of 512. New adapters are popping up with this chip, and due to improper handling of the smaller hash table, broadcast packets were not being received correctly.
This commit is contained in:
Bill Paul
parent
38d3d2d67c
commit
79d11e0960
@ -183,6 +183,8 @@ static struct dc_type dc_devs[] = {
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"Compex RL100-TX 10/100BaseTX" },
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{ DC_VENDORID_MX, DC_DEVICEID_987x5,
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"Macronix 98715/98715A 10/100BaseTX" },
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{ DC_VENDORID_MX, DC_DEVICEID_987x5,
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"Macronix 98715AEC-C 10/100BaseTX" },
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{ DC_VENDORID_MX, DC_DEVICEID_987x5,
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"Macronix 98725 10/100BaseTX" },
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{ DC_VENDORID_LO, DC_DEVICEID_82C115,
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@ -899,8 +901,9 @@ static void dc_miibus_mediainit(dev)
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}
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#define DC_POLY 0xEDB88320
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#define DC_BITS 9
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#define DC_BITS_PNIC_II 7
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#define DC_BITS_512 9
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#define DC_BITS_128 7
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#define DC_BITS_64 6
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static u_int32_t dc_crc_le(sc, addr)
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struct dc_softc *sc;
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@ -916,11 +919,18 @@ static u_int32_t dc_crc_le(sc, addr)
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crc = (crc >> 1) ^ (((crc ^ data) & 1) ? DC_POLY : 0);
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}
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/* The hash table on the PNIC II is only 128 bits wide. */
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if (DC_IS_PNICII(sc))
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return (crc & ((1 << DC_BITS_PNIC_II) - 1));
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/*
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* The hash table on the PNIC II and the MX98715AEC-C/D/E
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* chips is only 128 bits wide.
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*/
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if (sc->dc_flags & DC_128BIT_HASH)
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return (crc & ((1 << DC_BITS_128) - 1));
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return (crc & ((1 << DC_BITS) - 1));
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/* The hash table on the MX98715BEC is only 64 bits wide. */
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if (sc->dc_flags & DC_64BIT_HASH)
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return (crc & ((1 << DC_BITS_64) - 1));
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return (crc & ((1 << DC_BITS_512) - 1));
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}
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/*
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@ -1344,6 +1354,9 @@ static struct dc_type *dc_devtype(dev)
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if (t->dc_did == DC_DEVICEID_98713_CP &&
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rev >= DC_REVISION_98713A)
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t++;
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if (t->dc_did == DC_DEVICEID_987x5 &&
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rev >= DC_REVISION_98715AEC_C)
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t++;
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if (t->dc_did == DC_DEVICEID_987x5 &&
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rev >= DC_REVISION_98725)
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t++;
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@ -1552,13 +1565,23 @@ static int dc_attach(dev)
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break;
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case DC_DEVICEID_987x5:
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case DC_DEVICEID_EN1217:
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/*
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* Macronix MX98715AEC-C/D/E parts have only a
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* 128-bit hash table. We need to deal with these
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* in the same manner as the PNIC II so that we
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* get the right number of bits out of the
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* CRC routine.
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*/
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if (revision >= DC_REVISION_98715AEC_C &&
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revision < DC_REVISION_98725)
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sc->dc_flags |= DC_128BIT_HASH;
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sc->dc_type = DC_TYPE_987x5;
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sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
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sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
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break;
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case DC_DEVICEID_82C115:
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sc->dc_type = DC_TYPE_PNICII;
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sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
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sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR|DC_128BIT_HASH;
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sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
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break;
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case DC_DEVICEID_82C168:
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@ -672,6 +672,8 @@ struct dc_softc {
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#define DC_REDUCED_MII_POLL 0x00000200
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#define DC_TX_INTR_ALWAYS 0x00000400
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#define DC_21143_NWAY 0x00000800
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#define DC_128BIT_HASH 0x00001000
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#define DC_64BIT_HASH 0x00002000
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/*
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* register space access macros
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@ -714,6 +716,7 @@ struct dc_softc {
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#define DC_REVISION_98713 0x00
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#define DC_REVISION_98713A 0x10
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#define DC_REVISION_98715 0x20
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#define DC_REVISION_98715AEC_C 0x25
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#define DC_REVISION_98725 0x30
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/*
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@ -183,6 +183,8 @@ static struct dc_type dc_devs[] = {
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"Compex RL100-TX 10/100BaseTX" },
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{ DC_VENDORID_MX, DC_DEVICEID_987x5,
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"Macronix 98715/98715A 10/100BaseTX" },
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{ DC_VENDORID_MX, DC_DEVICEID_987x5,
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"Macronix 98715AEC-C 10/100BaseTX" },
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{ DC_VENDORID_MX, DC_DEVICEID_987x5,
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"Macronix 98725 10/100BaseTX" },
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{ DC_VENDORID_LO, DC_DEVICEID_82C115,
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@ -899,8 +901,9 @@ static void dc_miibus_mediainit(dev)
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}
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#define DC_POLY 0xEDB88320
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#define DC_BITS 9
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#define DC_BITS_PNIC_II 7
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#define DC_BITS_512 9
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#define DC_BITS_128 7
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#define DC_BITS_64 6
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static u_int32_t dc_crc_le(sc, addr)
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struct dc_softc *sc;
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@ -916,11 +919,18 @@ static u_int32_t dc_crc_le(sc, addr)
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crc = (crc >> 1) ^ (((crc ^ data) & 1) ? DC_POLY : 0);
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}
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/* The hash table on the PNIC II is only 128 bits wide. */
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if (DC_IS_PNICII(sc))
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return (crc & ((1 << DC_BITS_PNIC_II) - 1));
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/*
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* The hash table on the PNIC II and the MX98715AEC-C/D/E
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* chips is only 128 bits wide.
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*/
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if (sc->dc_flags & DC_128BIT_HASH)
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return (crc & ((1 << DC_BITS_128) - 1));
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return (crc & ((1 << DC_BITS) - 1));
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/* The hash table on the MX98715BEC is only 64 bits wide. */
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if (sc->dc_flags & DC_64BIT_HASH)
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return (crc & ((1 << DC_BITS_64) - 1));
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return (crc & ((1 << DC_BITS_512) - 1));
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}
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/*
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@ -1344,6 +1354,9 @@ static struct dc_type *dc_devtype(dev)
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if (t->dc_did == DC_DEVICEID_98713_CP &&
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rev >= DC_REVISION_98713A)
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t++;
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if (t->dc_did == DC_DEVICEID_987x5 &&
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rev >= DC_REVISION_98715AEC_C)
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t++;
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if (t->dc_did == DC_DEVICEID_987x5 &&
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rev >= DC_REVISION_98725)
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t++;
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@ -1552,13 +1565,23 @@ static int dc_attach(dev)
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break;
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case DC_DEVICEID_987x5:
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case DC_DEVICEID_EN1217:
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/*
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* Macronix MX98715AEC-C/D/E parts have only a
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* 128-bit hash table. We need to deal with these
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* in the same manner as the PNIC II so that we
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* get the right number of bits out of the
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* CRC routine.
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*/
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if (revision >= DC_REVISION_98715AEC_C &&
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revision < DC_REVISION_98725)
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sc->dc_flags |= DC_128BIT_HASH;
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sc->dc_type = DC_TYPE_987x5;
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sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
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sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
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break;
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case DC_DEVICEID_82C115:
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sc->dc_type = DC_TYPE_PNICII;
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sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
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sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR|DC_128BIT_HASH;
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sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
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break;
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case DC_DEVICEID_82C168:
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@ -672,6 +672,8 @@ struct dc_softc {
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#define DC_REDUCED_MII_POLL 0x00000200
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#define DC_TX_INTR_ALWAYS 0x00000400
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#define DC_21143_NWAY 0x00000800
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#define DC_128BIT_HASH 0x00001000
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#define DC_64BIT_HASH 0x00002000
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/*
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* register space access macros
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@ -714,6 +716,7 @@ struct dc_softc {
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#define DC_REVISION_98713 0x00
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#define DC_REVISION_98713A 0x10
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#define DC_REVISION_98715 0x20
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#define DC_REVISION_98715AEC_C 0x25
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#define DC_REVISION_98725 0x30
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/*
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