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Trim some noise from bootverbose:

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- Drop the printf in intr_machdep.c when we assign an interrupt souce to
  a CPU.  Each source already has a more detailed printf.
- Don't output a line for each ioapic pin showing its initial state, this
  has outlived its usefulness.
- When an APIC enumerator sets the bus, polarity, or trigger mode of an
  ioapic pin, just return success without printing anything if the new
  value matches the current one.

MFC after:	2 weeks
This commit is contained in:
jhb 2006-11-17 16:41:03 +00:00
parent 375950dbc5
commit 84450a55fb
4 changed files with 27 additions and 29 deletions
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6
sys/amd64/amd64/intr_machdep.c
View File

@ -446,10 +446,6 @@ intr_assign_next_cpu(struct intsrc *isrc)
current_cpu++;
if (current_cpu >= num_cpus)
current_cpu = 0;
if (bootverbose) {
printf("INTR: Assigning IRQ %d", pic->pic_vector(isrc));
printf(" to local APIC %u\n", apic_id);
}
pic->pic_assign_cpu(isrc, apic_id);
}
@ -483,7 +479,7 @@ intr_shuffle_irqs(void *arg __unused)
if (num_cpus <= 1)
return;
/* Round-robin assign each enabled source a CPU. */
/* Round-robin assign a CPU to each enabled source. */
mtx_lock_spin(&intr_table_lock);
assign_cpu = 1;
for (i = 0; i < NUM_IO_INTS; i++) {

23
sys/amd64/amd64/io_apic.c
View File

@ -512,13 +512,6 @@ ioapic_create(uintptr_t addr, int32_t apic_id, int intbase)
* be routed to other CPUs later after they are enabled.
*/
intpin->io_cpu = PCPU_GET(apic_id);
if (bootverbose && intpin->io_irq != IRQ_DISABLED) {
printf("ioapic%u: intpin %d -> ", io->io_id, i);
ioapic_print_irq(intpin);
printf(" (%s, %s)\n", intpin->io_edgetrigger ?
"edge" : "level", intpin->io_activehi ? "high" :
"low");
}
value = ioapic_read(apic, IOAPIC_REDTBL_LO(i));
ioapic_write(apic, IOAPIC_REDTBL_LO(i), value | IOART_INTMSET);
}
@ -583,6 +576,8 @@ ioapic_set_bus(void *cookie, u_int pin, int bus_type)
return (EINVAL);
if (io->io_pins[pin].io_irq >= NUM_IO_INTS)
return (EINVAL);
if (io->io_pins[pin].io_bus == bus_type)
return (0);
io->io_pins[pin].io_bus = bus_type;
if (bootverbose)
printf("ioapic%u: intpin %d bus %s\n", io->io_id, pin,
@ -666,13 +661,17 @@ int
ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol)
{
struct ioapic *io;
int activehi;
io = (struct ioapic *)cookie;
if (pin >= io->io_numintr || pol == INTR_POLARITY_CONFORM)
return (EINVAL);
if (io->io_pins[pin].io_irq >= NUM_IO_INTS)
return (EINVAL);
io->io_pins[pin].io_activehi = (pol == INTR_POLARITY_HIGH);
activehi = (pol == INTR_POLARITY_HIGH);
if (io->io_pins[pin].io_activehi == activehi)
return (0);
io->io_pins[pin].io_activehi = activehi;
if (bootverbose)
printf("ioapic%u: intpin %d polarity: %s\n", io->io_id, pin,
pol == INTR_POLARITY_HIGH ? "high" : "low");
@ -683,13 +682,17 @@ int
ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger)
{
struct ioapic *io;
int edgetrigger;
io = (struct ioapic *)cookie;
if (pin >= io->io_numintr || trigger == INTR_TRIGGER_CONFORM)
return (EINVAL);
if (io->io_pins[pin].io_irq >= NUM_IO_INTS)
return (EINVAL);
io->io_pins[pin].io_edgetrigger = (trigger == INTR_TRIGGER_EDGE);
return (EINVAL);
edgetrigger = (trigger == INTR_TRIGGER_EDGE);
if (io->io_pins[pin].io_edgetrigger == edgetrigger)
return (0);
io->io_pins[pin].io_edgetrigger = edgetrigger;
if (bootverbose)
printf("ioapic%u: intpin %d trigger: %s\n", io->io_id, pin,
trigger == INTR_TRIGGER_EDGE ? "edge" : "level");

6
sys/i386/i386/intr_machdep.c
View File

@ -412,10 +412,6 @@ intr_assign_next_cpu(struct intsrc *isrc)
current_cpu++;
if (current_cpu >= num_cpus)
current_cpu = 0;
if (bootverbose) {
printf("INTR: Assigning IRQ %d", pic->pic_vector(isrc));
printf(" to local APIC %u\n", apic_id);
}
pic->pic_assign_cpu(isrc, apic_id);
}
@ -449,7 +445,7 @@ intr_shuffle_irqs(void *arg __unused)
if (num_cpus <= 1)
return;
/* Round-robin assign each enabled source a CPU. */
/* Round-robin assign a CPU to each enabled source. */
mtx_lock_spin(&intr_table_lock);
assign_cpu = 1;
for (i = 0; i < NUM_IO_INTS; i++) {

21
sys/i386/i386/io_apic.c
View File

@ -512,13 +512,6 @@ ioapic_create(uintptr_t addr, int32_t apic_id, int intbase)
* be routed to other CPUs later after they are enabled.
*/
intpin->io_cpu = PCPU_GET(apic_id);
if (bootverbose && intpin->io_irq != IRQ_DISABLED) {
printf("ioapic%u: intpin %d -> ", io->io_id, i);
ioapic_print_irq(intpin);
printf(" (%s, %s)\n", intpin->io_edgetrigger ?
"edge" : "level", intpin->io_activehi ? "high" :
"low");
}
value = ioapic_read(apic, IOAPIC_REDTBL_LO(i));
ioapic_write(apic, IOAPIC_REDTBL_LO(i), value | IOART_INTMSET);
}
@ -583,6 +576,8 @@ ioapic_set_bus(void *cookie, u_int pin, int bus_type)
return (EINVAL);
if (io->io_pins[pin].io_irq >= NUM_IO_INTS)
return (EINVAL);
if (io->io_pins[pin].io_bus == bus_type)
return (0);
io->io_pins[pin].io_bus = bus_type;
if (bootverbose)
printf("ioapic%u: intpin %d bus %s\n", io->io_id, pin,
@ -666,13 +661,17 @@ int
ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol)
{
struct ioapic *io;
int activehi;
io = (struct ioapic *)cookie;
if (pin >= io->io_numintr || pol == INTR_POLARITY_CONFORM)
return (EINVAL);
if (io->io_pins[pin].io_irq >= NUM_IO_INTS)
return (EINVAL);
io->io_pins[pin].io_activehi = (pol == INTR_POLARITY_HIGH);
activehi = (pol == INTR_POLARITY_HIGH);
if (io->io_pins[pin].io_activehi == activehi)
return (0);
io->io_pins[pin].io_activehi = activehi;
if (bootverbose)
printf("ioapic%u: intpin %d polarity: %s\n", io->io_id, pin,
pol == INTR_POLARITY_HIGH ? "high" : "low");
@ -683,13 +682,17 @@ int
ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger)
{
struct ioapic *io;
int edgetrigger;
io = (struct ioapic *)cookie;
if (pin >= io->io_numintr || trigger == INTR_TRIGGER_CONFORM)
return (EINVAL);
if (io->io_pins[pin].io_irq >= NUM_IO_INTS)
return (EINVAL);
io->io_pins[pin].io_edgetrigger = (trigger == INTR_TRIGGER_EDGE);
edgetrigger = (trigger == INTR_TRIGGER_EDGE);
if (io->io_pins[pin].io_edgetrigger == edgetrigger)
return (0);
io->io_pins[pin].io_edgetrigger = edgetrigger;
if (bootverbose)
printf("ioapic%u: intpin %d trigger: %s\n", io->io_id, pin,
trigger == INTR_TRIGGER_EDGE ? "edge" : "level");