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Merge commit 41449c58c from llvm git (by Roger Ferrer Ibanez):

Browse Source 
[RISCV] Fix evaluation of %pcrel_lo

  The following testcase

    function:
    .Lpcrel_label1:
          auipc   a0, %pcrel_hi(other_function)
          addi    a1, a0, %pcrel_lo(.Lpcrel_label1)
          .p2align        2          # Causes a new fragment to be emitted

          .type   other_function,@function
    other_function:
          ret

  exposes an odd behaviour in which only the %pcrel_hi relocation is
  evaluated but not the %pcrel_lo.

    $ llvm-mc -triple riscv64 -filetype obj t.s | llvm-objdump  -d -r -

    <stdin>:      file format ELF64-riscv

    Disassembly of section .text:
    0000000000000000 function:
           0:     17 05 00 00     auipc   a0, 0
           4:     93 05 05 00     mv      a1, a0
                  0000000000000004:  R_RISCV_PCREL_LO12_I other_function+4

    0000000000000008 other_function:
           8:     67 80 00 00     ret

  The reason seems to be that in RISCVAsmBackend::shouldForceRelocation
  we only consider the fragment but in RISCVMCExpr::evaluatePCRelLo we
  consider the section. This usually works but there are cases where
  the section may still be the same but the fragment may be another
  one. In that case we end forcing a %pcrel_lo relocation without any
  %pcrel_hi.

  This patch makes RISCVAsmBackend::shouldForceRelocation use the
  section, if any, to determine if the relocation must be forced or
  not.

  Differential Revision: https://reviews.llvm.org/D60657

This is a prerequisite for building and linking hard- and soft-float
riscv worlds with clang and lld.

Requested by:	jhb
MFC after:	1 week
X-MFC-With:	r353358
This commit is contained in:
Dimitry Andric 2020-01-03 20:09:38 +00:00
parent f65136d23a
commit 8f6d9a8e68
1 changed files with 7 additions and 3 deletions
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10
contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
View File

@ -64,11 +64,15 @@ bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
case RISCV::fixup_riscv_tls_gd_hi20:
ShouldForce = true;
break;
case RISCV::fixup_riscv_pcrel_hi20:
ShouldForce = T->getValue()->findAssociatedFragment() !=
Fixup.getValue()->findAssociatedFragment();
case RISCV::fixup_riscv_pcrel_hi20: {
MCFragment *TFragment = T->getValue()->findAssociatedFragment();
MCFragment *FixupFragment = Fixup.getValue()->findAssociatedFragment();
assert(FixupFragment && "We should have a fragment for this fixup");
ShouldForce =
!TFragment || TFragment->getParent() != FixupFragment->getParent();
break;
}
}
break;
}