Use atomic_load/store_64() in the arm implementation of counter(9), and
remove the XXX comments about non-atomic access to the counters.
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@ -30,6 +30,7 @@
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#define __MACHINE_COUNTER_H__
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#include <sys/pcpu.h>
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#include <machine/atomic.h>
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#ifdef INVARIANTS
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#include <sys/proc.h>
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#endif
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@ -38,12 +39,13 @@
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#define counter_exit() critical_exit()
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#ifdef IN_SUBR_COUNTER_C
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/* XXXKIB non-atomic 64bit read */
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static inline uint64_t
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counter_u64_read_one(uint64_t *p, int cpu)
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{
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return (*(uint64_t *)((char *)p + sizeof(struct pcpu) * cpu));
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return (atomic_load_64((uint64_t *)((char *)p + sizeof(struct pcpu) *
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cpu)));
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}
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static inline uint64_t
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@ -59,13 +61,12 @@ counter_u64_fetch_inline(uint64_t *p)
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return (r);
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}
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/* XXXKIB non-atomic 64bit store, might interrupt increment */
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static void
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counter_u64_zero_one_cpu(void *arg)
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{
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*((uint64_t *)((char *)arg + sizeof(struct pcpu) *
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PCPU_GET(cpuid))) = 0;
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atomic_store_64((uint64_t *)((char *)arg + sizeof(struct pcpu) *
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PCPU_GET(cpuid)), 0);
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}
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static inline void
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@ -79,7 +80,7 @@ counter_u64_zero_inline(counter_u64_t c)
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#define counter_u64_add_protected(c, inc) do { \
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CRITICAL_ASSERT(curthread); \
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*(uint64_t *)zpcpu_get(c) += (inc); \
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atomic_add_64((uint64_t *)zpcpu_get(c), (inc)); \
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} while (0)
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static inline void
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