Resolve conflicts between macros in fenv.h and ieeefp.h
This is a follow-up to r321483, which disabled -Wmacro-redefined for some lib/msun tests. If an application included both fenv.h and ieeefp.h, several macros such as __fldcw(), __fldenv() were defined in both headers, with slightly different arguments, leading to conflicts. Fix this by putting all the common macros in the machine-specific versions of ieeefp.h. Where needed, update the arguments in places where the macros are invoked. This also slightly reduces the differences between the amd64 and i386 versions of ieeefp.h. Reviewed by: kib MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D15633
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f93497fe64
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@ -60,12 +60,12 @@ fesetexceptflag(const fexcept_t *flagp, int excepts)
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__fnstenv(&env.__x87);
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__fnstenv(&env.__x87);
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env.__x87.__status &= ~excepts;
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env.__x87.__status &= ~excepts;
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env.__x87.__status |= *flagp & excepts;
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env.__x87.__status |= *flagp & excepts;
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__fldenv(env.__x87);
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__fldenv(&env.__x87);
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__stmxcsr(&env.__mxcsr);
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__stmxcsr(&env.__mxcsr);
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env.__mxcsr &= ~excepts;
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env.__mxcsr &= ~excepts;
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env.__mxcsr |= *flagp & excepts;
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env.__mxcsr |= *flagp & excepts;
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__ldmxcsr(env.__mxcsr);
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__ldmxcsr(&env.__mxcsr);
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return (0);
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return (0);
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}
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}
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@ -94,7 +94,7 @@ fegetenv(fenv_t *envp)
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* fnstenv masks all exceptions, so we need to restore the
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* fnstenv masks all exceptions, so we need to restore the
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* control word to avoid this side effect.
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* control word to avoid this side effect.
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*/
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*/
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__fldcw(envp->__x87.__control);
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__fldcw(&envp->__x87.__control);
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return (0);
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return (0);
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}
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}
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@ -109,7 +109,7 @@ feholdexcept(fenv_t *envp)
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envp->__mxcsr = mxcsr;
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envp->__mxcsr = mxcsr;
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mxcsr &= ~FE_ALL_EXCEPT;
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mxcsr &= ~FE_ALL_EXCEPT;
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mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT;
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mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT;
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__ldmxcsr(mxcsr);
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__ldmxcsr(&mxcsr);
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return (0);
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return (0);
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}
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}
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@ -139,9 +139,9 @@ __feenableexcept(int mask)
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__stmxcsr(&mxcsr);
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__stmxcsr(&mxcsr);
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omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
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omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
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control &= ~mask;
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control &= ~mask;
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__fldcw(control);
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__fldcw(&control);
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mxcsr &= ~(mask << _SSE_EMASK_SHIFT);
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mxcsr &= ~(mask << _SSE_EMASK_SHIFT);
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__ldmxcsr(mxcsr);
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__ldmxcsr(&mxcsr);
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return (omask);
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return (omask);
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}
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}
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@ -156,9 +156,9 @@ __fedisableexcept(int mask)
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__stmxcsr(&mxcsr);
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__stmxcsr(&mxcsr);
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omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
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omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
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control |= mask;
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control |= mask;
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__fldcw(control);
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__fldcw(&control);
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mxcsr |= mask << _SSE_EMASK_SHIFT;
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mxcsr |= mask << _SSE_EMASK_SHIFT;
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__ldmxcsr(mxcsr);
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__ldmxcsr(&mxcsr);
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return (omask);
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return (omask);
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}
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}
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@ -103,13 +103,13 @@ fesetexceptflag(const fexcept_t *flagp, int excepts)
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__fnstenv(&env);
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__fnstenv(&env);
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env.__status &= ~excepts;
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env.__status &= ~excepts;
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env.__status |= *flagp & excepts;
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env.__status |= *flagp & excepts;
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__fldenv(env);
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__fldenv(&env);
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if (__HAS_SSE()) {
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if (__HAS_SSE()) {
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__stmxcsr(&mxcsr);
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__stmxcsr(&mxcsr);
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mxcsr &= ~excepts;
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mxcsr &= ~excepts;
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mxcsr |= *flagp & excepts;
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mxcsr |= *flagp & excepts;
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__ldmxcsr(mxcsr);
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__ldmxcsr(&mxcsr);
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}
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}
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return (0);
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return (0);
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@ -139,7 +139,7 @@ fegetenv(fenv_t *envp)
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* fnstenv masks all exceptions, so we need to restore
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* fnstenv masks all exceptions, so we need to restore
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* the old control word to avoid this side effect.
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* the old control word to avoid this side effect.
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*/
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*/
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__fldcw(envp->__control);
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__fldcw(&envp->__control);
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if (__HAS_SSE()) {
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if (__HAS_SSE()) {
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__stmxcsr(&mxcsr);
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__stmxcsr(&mxcsr);
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__set_mxcsr(*envp, mxcsr);
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__set_mxcsr(*envp, mxcsr);
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@ -159,7 +159,7 @@ feholdexcept(fenv_t *envp)
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__set_mxcsr(*envp, mxcsr);
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__set_mxcsr(*envp, mxcsr);
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mxcsr &= ~FE_ALL_EXCEPT;
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mxcsr &= ~FE_ALL_EXCEPT;
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mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT;
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mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT;
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__ldmxcsr(mxcsr);
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__ldmxcsr(&mxcsr);
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}
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}
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return (0);
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return (0);
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}
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}
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@ -196,10 +196,10 @@ __feenableexcept(int mask)
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mxcsr = 0;
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mxcsr = 0;
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omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
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omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
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control &= ~mask;
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control &= ~mask;
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__fldcw(control);
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__fldcw(&control);
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if (__HAS_SSE()) {
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if (__HAS_SSE()) {
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mxcsr &= ~(mask << _SSE_EMASK_SHIFT);
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mxcsr &= ~(mask << _SSE_EMASK_SHIFT);
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__ldmxcsr(mxcsr);
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__ldmxcsr(&mxcsr);
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}
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}
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return (omask);
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return (omask);
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}
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}
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@ -218,10 +218,10 @@ __fedisableexcept(int mask)
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mxcsr = 0;
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mxcsr = 0;
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omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
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omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
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control |= mask;
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control |= mask;
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__fldcw(control);
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__fldcw(&control);
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if (__HAS_SSE()) {
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if (__HAS_SSE()) {
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mxcsr |= mask << _SSE_EMASK_SHIFT;
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mxcsr |= mask << _SSE_EMASK_SHIFT;
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__ldmxcsr(mxcsr);
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__ldmxcsr(&mxcsr);
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}
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}
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return (omask);
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return (omask);
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}
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}
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@ -84,10 +84,6 @@ SRCS.ilogb2_test= ilogb_test.c
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LIBADD+= m
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LIBADD+= m
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.if ${MACHINE_CPUARCH} == "i386"
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# XXX: __fldcw macro mismatch between fenv.h and ieeefp.h .
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CWARNFLAGS.clang+= -Wno-error=macro-redefined
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.endif
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WARNS?= 1
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WARNS?= 1
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# Copied from lib/msun/Makefile
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# Copied from lib/msun/Makefile
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@ -33,6 +33,7 @@
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#include <sys/cdefs.h>
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#include <sys/cdefs.h>
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#include <sys/_types.h>
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#include <sys/_types.h>
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#include <ieeefp.h>
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#ifndef __fenv_static
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#ifndef __fenv_static
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#define __fenv_static static
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#define __fenv_static static
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@ -97,18 +98,10 @@ __BEGIN_DECLS
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extern const fenv_t __fe_dfl_env;
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extern const fenv_t __fe_dfl_env;
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#define FE_DFL_ENV (&__fe_dfl_env)
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#define FE_DFL_ENV (&__fe_dfl_env)
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#define __fldcw(__cw) __asm __volatile("fldcw %0" : : "m" (__cw))
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#define __fldenv(__env) __asm __volatile("fldenv %0" : : "m" (__env))
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#define __fldenvx(__env) __asm __volatile("fldenv %0" : : "m" (__env) \
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#define __fldenvx(__env) __asm __volatile("fldenv %0" : : "m" (__env) \
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: "st", "st(1)", "st(2)", "st(3)", "st(4)", \
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: "st", "st(1)", "st(2)", "st(3)", "st(4)", \
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"st(5)", "st(6)", "st(7)")
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"st(5)", "st(6)", "st(7)")
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#define __fnclex() __asm __volatile("fnclex")
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#define __fnstenv(__env) __asm __volatile("fnstenv %0" : "=m" (*(__env)))
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#define __fnstcw(__cw) __asm __volatile("fnstcw %0" : "=m" (*(__cw)))
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#define __fnstsw(__sw) __asm __volatile("fnstsw %0" : "=am" (*(__sw)))
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#define __fwait() __asm __volatile("fwait")
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#define __fwait() __asm __volatile("fwait")
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#define __ldmxcsr(__csr) __asm __volatile("ldmxcsr %0" : : "m" (__csr))
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#define __stmxcsr(__csr) __asm __volatile("stmxcsr %0" : "=m" (*(__csr)))
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int fegetenv(fenv_t *__envp);
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int fegetenv(fenv_t *__envp);
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int feholdexcept(fenv_t *__envp);
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int feholdexcept(fenv_t *__envp);
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@ -183,12 +176,12 @@ feclearexcept(int __excepts)
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} else {
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} else {
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__fnstenv(&__env);
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__fnstenv(&__env);
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__env.__status &= ~__excepts;
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__env.__status &= ~__excepts;
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__fldenv(__env);
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__fldenv(&__env);
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}
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}
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if (__HAS_SSE()) {
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if (__HAS_SSE()) {
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__stmxcsr(&__mxcsr);
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__stmxcsr(&__mxcsr);
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__mxcsr &= ~__excepts;
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__mxcsr &= ~__excepts;
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__ldmxcsr(__mxcsr);
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__ldmxcsr(&__mxcsr);
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}
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}
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return (0);
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return (0);
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}
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}
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@ -234,13 +227,13 @@ fesetround(int __round)
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__fnstcw(&__control);
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__fnstcw(&__control);
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__control &= ~_ROUND_MASK;
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__control &= ~_ROUND_MASK;
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__control |= __round;
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__control |= __round;
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__fldcw(__control);
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__fldcw(&__control);
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if (__HAS_SSE()) {
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if (__HAS_SSE()) {
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__stmxcsr(&__mxcsr);
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__stmxcsr(&__mxcsr);
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__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
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__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
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__mxcsr |= __round << _SSE_ROUND_SHIFT;
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__mxcsr |= __round << _SSE_ROUND_SHIFT;
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__ldmxcsr(__mxcsr);
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__ldmxcsr(&__mxcsr);
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}
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}
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return (0);
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return (0);
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@ -264,7 +257,7 @@ fesetenv(const fenv_t *__envp)
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*/
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*/
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__fldenvx(__env);
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__fldenvx(__env);
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if (__HAS_SSE())
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if (__HAS_SSE())
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__ldmxcsr(__mxcsr);
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__ldmxcsr(&__mxcsr);
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return (0);
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return (0);
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}
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}
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@ -280,11 +273,11 @@ feclearexcept(int __excepts)
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} else {
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} else {
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__fnstenv(&__env.__x87);
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__fnstenv(&__env.__x87);
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__env.__x87.__status &= ~__excepts;
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__env.__x87.__status &= ~__excepts;
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__fldenv(__env.__x87);
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__fldenv(&__env.__x87);
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}
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}
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__stmxcsr(&__env.__mxcsr);
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__stmxcsr(&__env.__mxcsr);
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__env.__mxcsr &= ~__excepts;
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__env.__mxcsr &= ~__excepts;
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__ldmxcsr(__env.__mxcsr);
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__ldmxcsr(&__env.__mxcsr);
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return (0);
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return (0);
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}
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}
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@ -323,12 +316,12 @@ fesetround(int __round)
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__fnstcw(&__control);
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__fnstcw(&__control);
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__control &= ~_ROUND_MASK;
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__control &= ~_ROUND_MASK;
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__control |= __round;
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__control |= __round;
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__fldcw(__control);
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__fldcw(&__control);
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__stmxcsr(&__mxcsr);
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__stmxcsr(&__mxcsr);
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__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
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__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
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__mxcsr |= __round << _SSE_ROUND_SHIFT;
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__mxcsr |= __round << _SSE_ROUND_SHIFT;
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__ldmxcsr(__mxcsr);
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__ldmxcsr(&__mxcsr);
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return (0);
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return (0);
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}
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}
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@ -346,7 +339,7 @@ fesetenv(const fenv_t *__envp)
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* inlined, so we need to be more careful.
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* inlined, so we need to be more careful.
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*/
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*/
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__fldenvx(__envp->__x87);
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__fldenvx(__envp->__x87);
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__ldmxcsr(__envp->__mxcsr);
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__ldmxcsr(&__envp->__mxcsr);
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return (0);
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return (0);
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}
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}
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@ -130,6 +130,7 @@ typedef enum {
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#define __fldcw(addr) __asm __volatile("fldcw %0" : : "m" (*(addr)))
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#define __fldcw(addr) __asm __volatile("fldcw %0" : : "m" (*(addr)))
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#define __fldenv(addr) __asm __volatile("fldenv %0" : : "m" (*(addr)))
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#define __fldenv(addr) __asm __volatile("fldenv %0" : : "m" (*(addr)))
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#define __fnclex() __asm __volatile("fnclex")
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#define __fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr)))
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#define __fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr)))
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#define __fnstenv(addr) __asm __volatile("fnstenv %0" : "=m" (*(addr)))
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#define __fnstenv(addr) __asm __volatile("fnstenv %0" : "=m" (*(addr)))
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#define __fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr)))
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#define __fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr)))
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@ -116,6 +116,8 @@ typedef enum {
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#define __fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr)))
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#define __fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr)))
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#define __fnstenv(addr) __asm __volatile("fnstenv %0" : "=m" (*(addr)))
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#define __fnstenv(addr) __asm __volatile("fnstenv %0" : "=m" (*(addr)))
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#define __fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr)))
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#define __fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr)))
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#define __ldmxcsr(addr) __asm __volatile("ldmxcsr %0" : : "m" (*(addr)))
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#define __stmxcsr(addr) __asm __volatile("stmxcsr %0" : "=m" (*(addr)))
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/*
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/*
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* Load the control word. Be careful not to trap if there is a currently
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* Load the control word. Be careful not to trap if there is a currently
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