MFp4: bwct memory size and PLL parameters

This commit is contained in:
imp 2006-12-20 18:18:24 +00:00
parent a75cd7f9db
commit d08a8bf72b

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@ -39,6 +39,14 @@ typedef unsigned short sdram_size_t;
#define OSC_MAIN_MULT 90
#endif
#ifdef BOOT_BWCT
/* The following divisor sets PLLA frequency: e.g. 16/4 * 45 = 180MHz */
#define OSC_MAIN_FREQ_DIV 4 /* for 16MHz osc */
#define SDRAM_WIDTH AT91C_SDRC_DBW_32_BITS
typedef unsigned int sdram_size_t;
#define OSC_MAIN_MULT 45
#endif
#ifdef BOOT_TSC
/* The following divisor sets PLLA frequency: e.g. 16/4 * 45 = 180MHz */
#define OSC_MAIN_FREQ_DIV 4 /* for 16MHz osc */