MFp4: bwct memory size and PLL parameters
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@ -39,6 +39,14 @@ typedef unsigned short sdram_size_t;
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#define OSC_MAIN_MULT 90
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#endif
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#ifdef BOOT_BWCT
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/* The following divisor sets PLLA frequency: e.g. 16/4 * 45 = 180MHz */
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#define OSC_MAIN_FREQ_DIV 4 /* for 16MHz osc */
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#define SDRAM_WIDTH AT91C_SDRC_DBW_32_BITS
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typedef unsigned int sdram_size_t;
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#define OSC_MAIN_MULT 45
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#endif
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#ifdef BOOT_TSC
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/* The following divisor sets PLLA frequency: e.g. 16/4 * 45 = 180MHz */
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#define OSC_MAIN_FREQ_DIV 4 /* for 16MHz osc */
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