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o Add PIO and vtblk mmio device info to the tree

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o Add FPGA memory window to static dev mappings
o Fix whitespace
This commit is contained in:
Ruslan Bukin 2014-11-25 16:06:19 +00:00
parent 13e19fb323
commit e8cf387c51
3 changed files with 35 additions and 5 deletions
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3
sys/arm/altera/socfpga/socfpga_machdep.c
View File

@ -95,6 +95,9 @@ platform_devmap_init(void)
/* scu */
arm_devmap_add_entry(0xfff00000, 0x100000);
/* FPGA memory window, 256MB */
arm_devmap_add_entry(0xd0000000, 0x10000000);
return (0);
}

35
sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts
View File

@ -38,8 +38,8 @@
model = "Terasic SoCKit";
compatible = "altr,socfpga-cyclone5", "altr,socfpga";
/* Reserve first page for secondary CPU trampoline code */
memreserve = < 0x00000000 0x1000 >;
memreserve = < 0x00000000 0x1000 >, /* SMP trampoline */
< 0x00001000 0x1000 >; /* virtio block */
memory {
device_type = "memory";
@ -69,6 +69,8 @@
};
mmc: dwmmc@ff704000 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
num-slots = <1>;
supports-highspeed;
@ -81,9 +83,34 @@
};
};
beri_mem: mem@d0000000 {
beri_mem0: mem@d0000000 {
compatible = "sri-cambridge,beri-mem";
reg = <0xd0000000 0x10000000>;
reg = <0xd0000000 0x10000000>; /* 256mb */
status = "okay";
};
pio0: pio@c0020000 {
compatible = "altr,pio";
reg = <0xc0020000 0x1000>; /* recv */
interrupts = < 76 >;
interrupt-parent = <&GIC>;
status = "okay";
};
pio1: pio@c0021000 {
compatible = "altr,pio";
reg = <0xc0021000 0x1000>; /* send */
interrupts = < 82 >; /* not in use on arm side */
interrupt-parent = <&GIC>;
status = "okay";
};
beri_vtblk: vtblk@00001000 {
compatible = "sri-cambridge,beri-vtblk";
reg = <0x00001000 0x1000>;
pio-recv = <&pio0>;
pio-send = <&pio1>;
beri-mem = <&beri_mem0>;
status = "okay";
};

2
sys/dev/beri/virtio/virtio.h
View File

@ -39,7 +39,7 @@
#define WRITE4(_sc, _reg, _val) \
bus_write_4((_sc)->res[0], _reg, _val)
#define PAGE_SHIFT 12
#define PAGE_SHIFT 12
#define VRING_ALIGN 4096
#define NUM_QUEUES 1