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Fix the SVE ID field shift.

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Sponsored by:	DARPA, AFRL
This commit is contained in:
Andrew Turner 2017-09-07 19:52:04 +00:00
parent 130be885e6
commit f9fc9faa3a
1 changed files with 1 additions and 1 deletions
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2
sys/arm64/include/armreg.h
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@ -416,7 +416,7 @@
#define ID_AA64PFR0_RAS(x) ((x) & ID_AA64PFR0_RAS_MASK)
#define ID_AA64PFR0_RAS_NONE (0x0 << ID_AA64PFR0_RAS_SHIFT)
#define ID_AA64PFR0_RAS_V1 (0x1 << ID_AA64PFR0_RAS_SHIFT)
#define ID_AA64PFR0_SVE_SHIFT 28
#define ID_AA64PFR0_SVE_SHIFT 32
#define ID_AA64PFR0_SVE_MASK (0xful << ID_AA64PFR0_SVE_SHIFT)
#define ID_AA64PFR0_SVE(x) ((x) & ID_AA64PFR0_SVE_MASK)
#define ID_AA64PFR0_SVE_NONE (0x0ul << ID_AA64PFR0_SVE_SHIFT)