Commit Graph

59 Commits

Author SHA1 Message Date
gonzo
8a360e9b89 - Call post-boot fixup function in order to get proper static
symbols resolving in DDB
- When zeroing .bss/.sbss do not round end address to page boundary,
    it's not neccessary and might destroy data pased by trampoline or
    boot loader
2010-01-25 00:44:05 +00:00
imp
9a3fba3cb8 Update from old DDB convetion to initialize debugger to new KDB way.
Always call kdb_init().  If we have KDB enabled, then provide a handy
place to break to the debugger.
2010-01-23 00:18:12 +00:00
gonzo
b0ad2d975d - Add driver for PCF2123, SPI real time clock/calendar 2010-01-22 22:14:12 +00:00
gonzo
5a5053f56c - Remove unnecessary register writes in activate_device
and deactivate_device
- Save state before attaching driver and restore it when
    detaching
- Clear CLK bit after last bit of byte has been sent over
    the bus providing falling edge for last byte in transfer
- Fix several places where CS0 was always assumed
- Add $FreeBSD$ to ar71xxreg.h
2010-01-21 00:15:59 +00:00
imp
687f1a7fca Rename mips_pcpu_init to mips_pcpu0_init since it applies only to the
BSP.  Provide a missing prototype.
2010-01-09 03:08:22 +00:00
imp
382bd114d4 Centralize initialization of pcpu, and set curthread early... 2010-01-08 22:48:21 +00:00
gonzo
5f019e757e - Add intr counters for APB interrupts 2009-11-18 22:53:05 +00:00
gonzo
c19cd2885e - Handle multiphy MAC case: create interface with
fixed-state media with parameters set via hints
    and configure MAC accordingly to these parameters.
    All the underlying PHY magic is done by boot manager
    on startup. At the moment there is no proper way
    to make active and control all PHYs simultaneously
    from one MII bus and there is no way to associate
    incoming/outgoing packet with specific PHY.
2009-11-12 21:27:58 +00:00
gonzo
8b6644df46 - include register definitions for respective controllers 2009-11-12 20:48:04 +00:00
gonzo
9dc0dcde66 - Access to all 5 PHYs goes through registers in MAC0 memory
space, rewrite miibus accessors respectively
2009-11-08 07:26:02 +00:00
gonzo
b3356f84e2 - Fix: Wrong register is used for initial value reading 2009-11-06 21:53:38 +00:00
gonzo
5435db6c06 - Fix initialization of PLL registers (different shifts for
arge0/arge1)
- Use base MAC address to generate MACs for arge1 and above
2009-11-06 06:50:45 +00:00
gonzo
5c4552bd44 - Replace dumb cut'n'paste call with not to self (XXX) 2009-11-05 03:54:03 +00:00
gonzo
378aec3de8 - style(9): replace whitespaces with tabs 2009-11-04 23:34:58 +00:00
gonzo
7255f8f448 - Remove noisy "Implement me" stubs
- Handle SIOCSIFFLAGS ioctl
2009-11-04 23:33:36 +00:00
rrs
dd29cc7161 With this commit our friend RMI will now compile. I have
not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
 making it run ;-)
2009-10-30 08:53:11 +00:00
gonzo
6e4d7ad130 - Fix build with DEVICE_POLLING enabled 2009-10-30 01:40:32 +00:00
thompsa
535ad41e67 Parse and save the command line passed in from RedBoot (exec -c "xxx") and also
the board specific environment variables.

This is not ar71xx specific and should be shared better.
2009-10-28 21:27:56 +00:00
rrs
012846ec6c Does 4 things:
1) Adds future RMI directories
2) Places intr_machdep.c in specfic files.arch pointing to the generic
   intr_machdep.c.  This allows us to have an architecture dependant intr_machdep.c
   (which we will need for RMI) in the machine specific directory
3) removes intr_machdep.c from files.mips
4) Adds some TARGET_XLR_XLS ifdef's for the machine specific intra_machdep.h. We
   may need to look at finding a better place to put this. But first I want to
   get this thing compiling.
2009-10-15 21:03:32 +00:00
gonzo
6e602a9d0e - Fix CPU divisor mask
Repored by: Luiz Otavio O Souza
2009-10-11 21:28:56 +00:00
gonzo
f612fb739a - Remove flags accidently brought by dumb cut'n'paste coding 2009-09-03 18:27:55 +00:00
gonzo
c09ec04354 - Fix phy address calculation 2009-09-03 18:23:23 +00:00
gonzo
b92ba62a62 - Make USB part of AR71XX kernel buildable again 2009-07-30 23:54:00 +00:00
gonzo
e02a2ce04c - Add AR71XX watchdog timer driver 2009-07-09 20:16:01 +00:00
gonzo
d3fc9cc82b - Move CPU/AHB frequency calculations to functions to
prevent code duplication
2009-07-09 20:11:26 +00:00
gonzo
d7c0414a7f - Fix PCI routing code 2009-07-08 17:20:53 +00:00
gonzo
840a429fee - Fix off-by-one bug in arge_fixup_rx. If mbuf is located
by the end of the page and even number of bytes long,
    that may cause TLBMiss exception for unallocated address.
- Fix mess with DMA sync opeartions
2009-07-08 02:21:08 +00:00
gonzo
d946dbd448 - Flush PCI register write before delay
Spotted by: Pyun YongHyeon
2009-06-19 05:00:17 +00:00
gonzo
60bcaeedf6 - Take into account only unmasked bits in interrupt status register 2009-06-16 00:02:02 +00:00
gonzo
0ce794ed99 - Fix functions prototypes to make compiler happy 2009-06-12 12:17:32 +00:00
gonzo
077c4fcdfe - Revert fix by dwhite that has been accidentally lost in r192783
commit.
2009-05-28 00:47:50 +00:00
gonzo
14ff8a23b4 - style(9) fixes
- Get rid of obsolete mask_fn
2009-05-26 17:50:50 +00:00
gonzo
3e0e3d9796 - arge_poll should be decalred only if DEVICE_POLLING is enabled
- Revert Rx buffer nsegments from BUS_SPACE_UNRESTRICTED to
	ARGE_MAXFRAGS
2009-05-26 17:43:32 +00:00
gonzo
22d71c495d - Add polling support
- Get rid of arge_fix_chain, use m_defrag like if_vr
- Rework interrupt handling routine to avoid race that lead
    to disabling RX interrupts
- Enable full duplex if requested
- Properly set station MAC address
- Slightly optimize RX loop
- Initialize FILTERMATCH and FILTERMASK registers as linux driver does
2009-05-26 03:45:58 +00:00
gonzo
bf2cbbb9d3 - Calculate clock frequency using PLL registers 2009-05-23 18:18:06 +00:00
gonzo
970089551c - Wrong logical operator was used for flag check 2009-05-23 06:30:03 +00:00
dwhite
2c2bdf3a7e Remove unused variable. 2009-05-22 20:08:13 +00:00
dwhite
0caca6e08d Add some missing bits to arge:
* In arge_attach(), hard reset the MAC blocks before configuring the MAC.
 * In arge_reset_dma(), clear pending packet interrupts based off
   the hardware counter instead of acking every packet in the ring,
   as the hardware counter can exceed the ring size. If the reset
   was successful the counters will be zero anyway.
 * In arge_encap(), remove an unused variable.
 * In arge_tx_locked(), remove redundant setting of the EMPTY flag as
   the TX DMA engine sets it for us.
 * In arge_intr(), remember to clear the interrupt status bits
   relayed from arge_intr_filter().
 * Handle RX overflow and TX underflow.
 * In arge_tx_intr(), remember to unmask the TX interrupt bits
   after processing them.
2009-05-21 22:12:42 +00:00
gonzo
078c2f9939 - ar71xx increases Count value every two cycles 2009-05-19 02:51:30 +00:00
gonzo
a46ea3f54d - Add SPI bus driver for ar71xx SoC 2009-05-18 23:32:04 +00:00
gonzo
3a3558a8c1 - Set MAC Address obtained from RedBoot or generate random one 2009-05-16 02:45:38 +00:00
gonzo
5e17e7a6de - Get memory size and base MAC address from RedBoot (if available) 2009-05-16 02:43:24 +00:00
gonzo
6d0d5a2711 - Add pci bus space that translates byte order to little endian,
may be it will be merged with bus_space_reversed later
- Handle memory resources close to bus in order to control
    bus_space_tag
2009-05-15 21:36:50 +00:00
gonzo
968ed90d79 - Calculate clock frequency using PLL registers
- Remove stale comments
2009-05-15 01:54:32 +00:00
gonzo
c200825e53 - Calculate CPU frequency using dividers from PLL registers 2009-05-15 01:53:09 +00:00
gonzo
b190230f54 - Add definitions for PLL CPU Config register fields 2009-05-15 01:51:47 +00:00
gonzo
98959d7a65 - Add SPI-related registers 2009-05-14 21:27:03 +00:00
gonzo
99297495c7 - Remove garbage debug output 2009-05-14 21:15:27 +00:00
gonzo
388f1b3a74 - Add interrupt handling for AR71XX PCI bridge 2009-05-07 03:39:23 +00:00
gonzo
1c31e1e1f0 - Rollback to the hack with 3-bytes offset in base address.
uart_bus_XXXXX resources are handled in uart(4) code
    and we need more sophysticated way to define which space
    should be used for device based on hints
2009-05-06 02:46:04 +00:00