Commit Graph

2077 Commits

Author SHA1 Message Date
mav
7c2b81b0e9 Remove all legacy ATA code parts, not used since options ATA_CAM enabled in
most kernels before FreeBSD 9.0.  Remove such modules and respective kernel
options: atadisk, ataraid, atapicd, atapifd, atapist, atapicam.  Remove the
atacontrol utility and some man pages.  Remove useless now options ATA_CAM.

No objections:	current@, stable@
MFC after:	never
2013-04-04 07:12:24 +00:00
kib
7c26a038f9 Implement the concept of the unmapped VMIO buffers, i.e. buffers which
do not map the b_pages pages into buffer_map KVA.  The use of the
unmapped buffers eliminate the need to perform TLB shootdown for
mapping on the buffer creation and reuse, greatly reducing the amount
of IPIs for shootdown on big-SMP machines and eliminating up to 25-30%
of the system time on i/o intensive workloads.

The unmapped buffer should be explicitely requested by the GB_UNMAPPED
flag by the consumer.  For unmapped buffer, no KVA reservation is
performed at all. The consumer might request unmapped buffer which
does have a KVA reserve, to manually map it without recursing into
buffer cache and blocking, with the GB_KVAALLOC flag.

When the mapped buffer is requested and unmapped buffer already
exists, the cache performs an upgrade, possibly reusing the KVA
reservation.

Unmapped buffer is translated into unmapped bio in g_vfs_strategy().
Unmapped bio carry a pointer to the vm_page_t array, offset and length
instead of the data pointer.  The provider which processes the bio
should explicitely specify a readiness to accept unmapped bio,
otherwise g_down geom thread performs the transient upgrade of the bio
request by mapping the pages into the new bio_transient_map KVA
submap.

The bio_transient_map submap claims up to 10% of the buffer map, and
the total buffer_map + bio_transient_map KVA usage stays the
same. Still, it could be manually tuned by kern.bio_transient_maxcnt
tunable, in the units of the transient mappings.  Eventually, the
bio_transient_map could be removed after all geom classes and drivers
can accept unmapped i/o requests.

Unmapped support can be turned off by the vfs.unmapped_buf_allowed
tunable, disabling which makes the buffer (or cluster) creation
requests to ignore GB_UNMAPPED and GB_KVAALLOC flags.  Unmapped
buffers are only enabled by default on the architectures where
pmap_copy_page() was implemented and tested.

In the rework, filesystem metadata is not the subject to maxbufspace
limit anymore. Since the metadata buffers are always mapped, the
buffers still have to fit into the buffer map, which provides a
reasonable (but practically unreachable) upper bound on it. The
non-metadata buffer allocations, both mapped and unmapped, is
accounted against maxbufspace, as before. Effectively, this means that
the maxbufspace is forced on mapped and unmapped buffers separately.
The pre-patch bufspace limiting code did not worked, because
buffer_map fragmentation does not allow the limit to be reached.

By Jeff Roberson request, the getnewbuf() function was split into
smaller single-purpose functions.

Sponsored by:	The FreeBSD Foundation
Discussed with:	jeff (previous version)
Tested by:	pho, scottl (previous version), jhb, bf
MFC after:	2 weeks
2013-03-19 14:13:12 +00:00
jhibbits
7b62f31cdf Add FBT for PowerPC DTrace. Also, clean up the DTrace assembly code,
much of which is not necessary for PowerPC.

The FBT module can likely be factored into 3 separate files: common,
intel, and powerpc, rather than duplicating most of the code between
the x86 and PowerPC flavors.

All DTrace modules for PowerPC will be MFC'd together once Fasttrap is
completed.
2013-03-18 05:30:18 +00:00
kib
63efc821c3 Add pmap function pmap_copy_pages(), which copies the content of the
pages around, taking array of vm_page_t both for source and
destination.  Starting offsets and total transfer size are specified.

The function implements optimal algorithm for copying using the
platform-specific optimizations.  For instance, on the architectures
were the direct map is available, no transient mappings are created,
for i386 the per-cpu ephemeral page frame is used.  The code was
typically borrowed from the pmap_copy_page() for the same
architecture.

Only i386/amd64, powerpc aim and arm/arm-v6 implementations were
tested at the time of commit. High-level code, not committed yet to
the tree, ensures that the use of the function is only allowed after
explicit enablement.

For sparc64, the existing code has known issues and a stab is added
instead, to allow the kernel linking.

Sponsored by:	The FreeBSD Foundation
Tested by:	pho (i386, amd64), scottl (amd64), ian (arm and arm-v6)
MFC after:	2 weeks
2013-03-14 20:18:12 +00:00
attilio
e98f58faf6 MFC 2013-03-02 14:48:41 +00:00
mav
6cf7cc6e4d MFcalloutng:
Switch eventtimers(9) from using struct bintime to sbintime_t.
Even before this not a single driver really supported full dynamic range of
struct bintime even in theory, not speaking about practical inexpediency.
This change legitimates the status quo and cleans up the code.
2013-02-28 13:46:03 +00:00
davide
2bf12d0c7c MFcalloutng:
When CPU becomes idle, cpu_idleclock() calculates time to the next timer
event in order to reprogram hw timer. Return that time in sbintime_t to
the caller and pass it to acpi_cpu_idle(), where it can be used as one
more factor (quite precise) to extimate furter sleep time and choose
optimal sleep state. This is a preparatory change for further callout
improvements will be committed in the next days.

The commmit is not targeted for MFC.
2013-02-28 10:46:54 +00:00
attilio
8d28f94790 Merge from vmobj-rwlock:
VM_OBJECT_LOCKED() macro is only used to implement a custom version
of lock assertions right now (which likely spread out thanks to
copy and paste).
Remove it and implement actual assertions.

Sponsored by:	EMC / Isilon storage division
Reviewed by:	alc
Tested by:	pho
2013-02-27 18:12:13 +00:00
attilio
74f58faa15 MFC 2013-02-26 23:52:23 +00:00
attilio
cc89d0bd92 Merge from vmc-playground branch:
Replace the sub-optimal uma_zone_set_obj() primitive with more modern
uma_zone_reserve_kva().  The new primitive reserves before hand
the necessary KVA space to cater the zone allocations and allocates pages
with ALLOC_NOOBJ.  More specifically:
- uma_zone_reserve_kva() does not need an object to cater the backend
  allocator.
- uma_zone_reserve_kva() can cater M_WAITOK requests, in order to
  serve zones which need to do uma_prealloc() too.
- When possible, uma_zone_reserve_kva() uses directly the direct-mapping
  by uma_small_alloc() rather than relying on the KVA / offset
  combination.

The removal of the object attribute allows 2 further changes:
1) _vm_object_allocate() becomes static within vm_object.c
2) VM_OBJECT_LOCK_INIT() is removed.  This function is replaced by
   direct calls to mtx_init() as there is no need to export it anymore
   and the calls aren't either homogeneous anymore: there are now small
   differences between arguments passed to mtx_init().

Sponsored by:	EMC / Isilon storage division
Reviewed by:	alc (which also offered almost all the comments)
Tested by:	pho, jhb, davide
2013-02-26 23:35:27 +00:00
attilio
cb47f0509b Merge from vmobj-rwlock branch:
Remove unused inclusion of vm/vm_pager.h and vm/vnode_pager.h.

Sponsored by:	EMC / Isilon storage division
Tested by:	pho
Reviewed by:	alc
2013-02-26 01:00:11 +00:00
attilio
1073a36001 MFC 2013-02-23 16:01:03 +00:00
alc
288d42ddce Eliminate an unused #define. 2013-02-22 16:59:52 +00:00
attilio
905e648d42 Hide the details for the assertion for VM_OBJECT_LOCK operations.
Rename current VM_OBJECT_LOCK_ASSERT(foo, RA_WLOCKED) into
VM_OBJECT_ASSERT_WLOCKED(foo)

Sponsored by:	EMC / Isilon storage division
Requested by:	alc
2013-02-21 21:54:53 +00:00
attilio
066bbc97b6 Fix other architectures and ZFS.
Sponsored by:	EMC / Isilon storage division
2013-02-21 15:02:36 +00:00
attilio
1f1e13ca03 There is no need to use VM_OBJECT_LOCKED() as the assertion won't
make the check available in any case if INVARIANTS is switched off.
Remove VM_OBJECT_LOCKED().
2013-02-20 10:51:34 +00:00
attilio
658534ed5a Switch vm_object lock to be a rwlock.
* VM_OBJECT_LOCK and VM_OBJECT_UNLOCK are mapped to write operations
* VM_OBJECT_SLEEP() is introduced as a general purpose primitve to
  get a sleep operation using a VM_OBJECT_LOCK() as protection
* The approach must bear with vm_pager.h namespace pollution so many
  files require including directly rwlock.h
2013-02-20 10:38:34 +00:00
rpaulo
5d56fc6ccd Introduce PLATFORMMETHOD_END and use it. 2013-02-13 02:21:45 +00:00
kib
bd7f0fa0bb Reform the busdma API so that new types may be added without modifying
every architecture's busdma_machdep.c.  It is done by unifying the
bus_dmamap_load_buffer() routines so that they may be called from MI
code.  The MD busdma is then given a chance to do any final processing
in the complete() callback.

The cam changes unify the bus_dmamap_load* handling in cam drivers.

The arm and mips implementations are updated to track virtual
addresses for sync().  Previously this was done in a type specific
way.  Now it is done in a generic way by recording the list of
virtuals in the map.

Submitted by:	jeff (sponsored by EMC/Isilon)
Reviewed by:	kan (previous version), scottl,
	mjacob (isp(4), no objections for target mode changes)
Discussed with:	     ian (arm changes)
Tested by:	marius (sparc64), mips (jmallet), isci(4) on x86 (jharris),
	amd64 (Fabian Keil <freebsd-listen@fabiankeil.de>)
2013-02-12 16:57:20 +00:00
rpaulo
49c303e64b Use DEVMETHOD_END. 2013-02-11 08:20:21 +00:00
kib
5a9188f8d3 Enable the UFS quotas for big-iron GENERIC kernels.
Discussed with:	      mckusick
MFC after:	      2 weeks
2013-01-03 19:03:41 +00:00
des
67e77c00a8 As discussed on -current last October, remove the firewire drivers from
GENERIC.
2013-01-03 14:30:24 +00:00
glebius
8e20fa5ae9 Mechanically substitute flags from historic mbuf allocator with
malloc(9) flags within sys.

Exceptions:

- sys/contrib not touched
- sys/mbuf.h edited manually
2012-12-05 08:04:20 +00:00
adrian
4172690a5e Setup BAT0 and BAT1 on the Wii.
This is the missing piece for FreeBSD/Wii, but there's still a lot of
work ahead. We have to reset the MMU in locore before continuing
the boot process because we don't know how the boot loaders might
have setup the BATs. We also disable the PCI BAT because there's no PCI
bus on the Wii.

Thanks to Nathan Whitehorn and Peter Grenhan for their help.

Submitted by:	Margarida Gouveia
2012-11-21 08:04:21 +00:00
kib
e8ae50d444 Flip the semantic of M_NOWAIT to only require the allocation to not
sleep, and perform the page allocations with VM_ALLOC_SYSTEM
class. Previously, the allocation was also allowed to completely drain
the reserve of the free pages, being translated to VM_ALLOC_INTERRUPT
request class for vm_page_alloc() and similar functions.

Allow the caller of malloc* to request the 'deep drain' semantic by
providing M_USE_RESERVE flag, now translated to VM_ALLOC_INTERRUPT
class. Previously, it resulted in less aggressive VM_ALLOC_SYSTEM
allocation class.

Centralize the translation of the M_* malloc(9) flags in the single
inline function malloc2vm_flags().

Discussion started by:	"Sears, Steven" <Steven.Sears@netapp.com>
Reviewed by:	alc, mdf (previous version)
Tested by:	pho (previous version)
MFC after:	2 weeks
2012-11-14 20:01:40 +00:00
rpaulo
833cbe62f8 Allow this file to be used in LOCORE sections of the kernel. 2012-11-12 06:15:54 +00:00
jhibbits
a4906f7240 Add DTrace to 32-bit PowerPC GENERIC now.
MFC after:	1 month
2012-11-08 01:51:23 +00:00
jhibbits
99d6a5644c Implement DTrace for PowerPC. This includes both 32-bit and 64-bit.
There is one known issue:  Some probes will display an error message along the
lines of:  "Invalid address (0)"

I tested this with both a simple dtrace probe and dtruss on a few different
binaries on 32-bit.  I only compiled 64-bit, did not run it, but I don't expect
problems without the modules loaded.  Volunteers are welcome.

MFC after:	1 month
2012-11-07 23:45:09 +00:00
alc
c99a93ed4c Replace all uses of the page queues lock by a R/W lock that is private
to this pmap.

Eliminate two redundant #include's.

Tested by:	marcel
2012-11-03 23:22:49 +00:00
attilio
f3501b109e Rework the known rwlock to benefit about staying on their own
cache line in order to avoid manual frobbing but using
struct rwlock_padalign.

Reviewed by:	alc, jimharris
2012-11-03 23:03:14 +00:00
marcel
35b3593ff2 1. Have the APs initialize the TLB1 entries from what has been
programmed on the BSP during (early) boot. This makes sure
    that the APs get configured the same as the BSP, irrspective
    of how FreeBSD was loaded.
2.  Make sure to flush the dcache after writing the TLB1 entries
    to the boot page. The APs aren't part of the coherency domain
    just yet.
3.  Set pmap_bootstrapped after calling pmap_bootstrap(). The
    FDT code now maps the devices (like OF), and this resulted
    in a panic.
4.  Since we pre-wire the CCSR, make sure not to map chunks of
    it in pmap_mapdev().
2012-11-03 22:02:12 +00:00
nwhitehorn
6169e186fd Work around broken device tree on last-generation PowerPC iMacs
(PowerMac12,1), which have a mac-io MPIC cell that indifies itself
as the root PIC despite the actual root PIC being on the northbridge.
No CPC945 systems have a mac-io PIC that does anything so just don't
attach on CPC945 (U4) systems.

MFC after:	3 days
2012-10-29 14:27:28 +00:00
rpaulo
edfe57b762 Remove compat options.
Submitted by:	netchild
2012-10-23 02:20:11 +00:00
rpaulo
fec307dd7b Fix the memory regions to include the 64MB DDR3 memory slot. 2012-10-22 03:45:37 +00:00
rpaulo
ce402469a1 Increase the I/O memory area to 0xc20000. 2012-10-22 03:44:12 +00:00
rpaulo
b9147a7621 Fix the top comment. 2012-10-21 22:27:21 +00:00
rpaulo
a61e6ea034 Add a config file for the Wii. 2012-10-21 22:24:28 +00:00
rpaulo
8401c87551 Add "options WII". 2012-10-21 04:02:34 +00:00
alc
55f6ff40ed Eliminate a stale comment. It describes another use case for the pmap in
Mach that doesn't exist in FreeBSD.
2012-09-28 05:30:59 +00:00
nwhitehorn
997168187e Move the prototype for savectx from cpu.h to pcb.h, as it is on other
platforms, as well as putting it in an #ifdef KERNEL block.

MFC after:	2 weeks
2012-09-23 17:33:16 +00:00
andreast
237f230d34 Remove leftover from r215163. 2012-09-21 21:27:57 +00:00
gavin
5005c75c5d Align the PCI Express #defines with the style used for the PCI-X
#defines.  This also has the advantage that it makes the names more
compact, iand also allows us to correct the non-uniform naming of
the PCIM_LINK_* defines, making them all consistent amongst themselves.

This is a mostly mechanical rename:
  s/PCIR_EXPRESS_/PCIER_/g
  s/PCIM_EXP_/PCIEM_/g
  s/PCIM_LINK_/PCIEM_LINK_/g

When this is MFC'd, #defines will be added for the old names to assist
out-of-tree drivers.

Discussed with:	jhb
MFC after:	1 week
2012-09-18 22:04:59 +00:00
attilio
8dece93b14 userret() already checks for td_locks when INVARIANTS is enabled, so
there is no need to check if Giant is acquired after it.

Reviewed by:	kib
MFC after:	1 week
2012-09-08 18:27:11 +00:00
rpaulo
7074fc2921 Add IRQ support to the resource list handling functions. 2012-09-08 01:26:52 +00:00
rpaulo
0ee196bf76 Unbreak tinderbox. 2012-08-25 17:15:33 +00:00
rpaulo
abc2ec63d5 Set mdp only under #ifdef WII. 2012-08-25 00:47:55 +00:00
jhibbits
02bfab306e phandle_t is unsigned, and OF_finddevice() returns (phandle_t)(-1) on
failure, so check for that instead of 0.

While here, provide a better description for ATI backlight driver.

Reported by:	jchandra@
MFC after:	3 days
2012-08-21 23:55:29 +00:00
adrian
6224c8cbb9 On Nintendo Wii CPUs, the mdp value will be garbage. Set it to NULL
so as to not confuse things.

Submitted by:	Margarida Gouveia
2012-08-21 06:34:21 +00:00
adrian
45f36f602c Don't probe the openfirmware framebuffer if the system is a Wii or it
will crash.

Submitted by:	Margarida Gouveia
2012-08-21 06:33:10 +00:00
adrian
5cf5b4b58d Initial support for running FreeBSD on the Nintendo Wii. We're able to
reach single user mode using a memory disk device as the file system.

This port includes the framebuffer driver, the PIC driver, a platform
driver and the GPIO driver. The IPC driver (to talk to IOS kernels) is
not yet written but there's a placeholder for it.

There are still some MMU problems and to get a working system you need to
patch locore32.S. Since we haven't found the best way yet to address that
problem, we're not committing those changes yet. The problem is related to
the different BAT layout on the Wii and to the fact that the Homebrew
loader doesn't clean up the special registers (including the 8 BATs)
before passing control to us.

You'll need a Wii with Homebrew loader and a TV that can do NTSC (for now).

Submitted by:	Margarida Gouveia
2012-08-21 06:31:26 +00:00
andreast
6278c060ec Add the ds1631 temperature driver. 2012-08-19 19:44:13 +00:00
jhibbits
dcbbf29bee Add backlight support for nVidia-based PowerBooks/iBooks/iMacs.
Approved by:	nwhitehorn (mentor)
MFC after:	9.1-RELEASE
2012-08-04 03:05:01 +00:00
jhb
f9289f9fa2 Improve the handling of static DMA buffers that use non-default memory
attributes (currently just BUS_DMA_NOCACHE):
- Don't call pmap_change_attr() on the returned address, instead use
  kmem_alloc_contig() to ask the VM system for memory with the requested
  attribute.
- As a result, always use kmem_alloc_contig() for non-default memory
  attributes, even for sub-page allocations.  This requires adjusting
  bus_dmamem_free()'s logic for determining which free routine to use.
- For x86, add a new dummy bus_dmamap that is used for static DMA
  buffers allocated via kmem_alloc_contig().  bus_dmamem_free() can then
  use the map pointer to determine which free routine to use.
- For powerpc, add a new flag to the allocated map (bus_dmamem_alloc()
  always creates a real map on powerpc) to indicate which free routine
  should be used.

Note that the BUS_DMA_NOCACHE handling in powerpc is currently #ifdef'd out.
I have left it disabled but updated it to match x86.

Reviewed by:	scottl
MFC after:	1 month
2012-08-03 13:50:29 +00:00
alc
5b008f8136 Avoid recursion on the pvh global lock in the aim oea pmap.
Correct the return type of the pmap_ts_referenced() implementations.

Reported by:	jhibbits [1]
Tested by:	andreast
2012-07-10 22:10:21 +00:00
alc
b8a35c814a Replace all uses of the vm page queues lock by a r/w lock that is private
to this pmap.

Tested by:	andreast, jhibbits
2012-07-06 02:18:49 +00:00
marcel
307b767363 Support lbc interrupts:
o   Save and clear the LTESR register in the interrupt handler.
o   In lbc_read_reg(), return the saved LTESR register value if applicable
    (i.e. when the saved value is not invalid (read: ~0U)).
o   In lbc_write_reg(), clear the bits in the saved register when when it's
    written to and when the asved value is not invalid.
o   Also in lbc_write_reg(), the LTESR register is unlocked (in H/W) when
    bit 1 of LTEATR is cleared. We use this to invalidate our saved LTESR
    register value. Subsequent reads and write go to H/W directly.

While here:
o   In lbc_read_reg() & lbc_write_reg(), add some belts and suspenders to
    catch when register offsets are out of range.
o   In lbc_attach(), initialize completely and don't leave something left
    for lbc_banks_enable().
2012-07-03 00:06:14 +00:00
marcel
ca38cd4da4 Properly implement the bus_config_intr, bus_setup_intr and bus_teardown_intr
methods so that MI drvers can depend on us doing the right thing instead
of having to go around us and call MD code directly. See the FDT code for
example (not for long though).
2012-07-02 23:41:56 +00:00
marcel
027ab2407d Remove device uart_z8530 and options GEOM_PART_APM from DEFAULTS and instead
add them to GENERIC and GENERIC64. They are applicable to Apple H/W and not
at all for Book-E platforms.
2012-07-02 21:25:24 +00:00
marcel
d03048e853 Fix a typo that resulted in or-ing PTE_UW twice whrn PTE_SW was needed.
Note that setting the PTE_MODIFIED bit based on whether write is possible
is incorrect. We should set PTE_MODIFIED based on whether the access
is a write operation.
2012-07-02 21:21:12 +00:00
marcel
50f2900b4c Handle traps from the debugger. We need to catch them and re-enter
the debugger where they're being taken care of.
2012-07-02 21:18:09 +00:00
marcel
67b1b7f52a Invalidate any TLB1 entries we don't need. The firmware (e.g. U-Boot)
may have added entries that conflict with TLB0 entries.
2012-07-02 21:15:56 +00:00
marcel
ce5683d3c5 Implement cpu_flush_dcache(). This allows us to optimize __syncicache()
for the common case in chich D-caches are coherent by virtue of busdma.
2012-07-02 21:11:01 +00:00
rpaulo
56b781d5ea Remove bogus __unused attribute from hrowpic_eoi(). 2012-07-01 19:07:45 +00:00
ken
380bfd1f7a Now that the mps(4) driver is endian-safe, add it to the powerpc 32-bit
GENERIC config file.

MFC after:	3 days
Reqested by:	nwhitehorn
2012-07-01 05:32:26 +00:00
joel
0541fc8c5b Reduce diffs between GENERIC and GENERIC64. Also fix a few whitespace nits
while I'm here. No functional change.
2012-06-29 19:05:29 +00:00
rpaulo
540fcf6aed The `end' symbol doesn't match the end of the kernel image because it's
relative to the start address (unless the start address is 0, which is
not the case).
This is currently not a problem because all powerpc architectures are
using loader(8) which passes metadata to the kernel including the
correct `endkernel' address.  If we don't use loader(8), register 4
and 5 will have the size of the kernel ELF file, not its end address.
We fix that simply by adding `kernel_text' to `end' to compute
`endkernel'.

Discussed with:	nathanw
2012-06-29 01:55:20 +00:00
ken
da17d879d7 Now that the mps(4) driver is endian-safe, add it to the powerpc and
sparc64 GENERIC config files.

MFC after:	3 days
2012-06-28 20:48:24 +00:00
andrew
0a7002aae7 Make the wchar_t type machine dependent.
This is required for ARM EABI. Section 7.1.1 of the Procedure Call for the
ARM Architecture (AAPCS) defines wchar_t as either an unsigned int or an
unsigned short with the former preferred.

Because of this requirement we need to move the definition of __wchar_t to
a machine dependent header. It also cleans up the macros defining the limits
of wchar_t by defining __WCHAR_MIN and __WCHAR_MAX in the same machine
dependent header then using them to define WCHAR_MIN and WCHAR_MAX
respectively.

Discussed with:	bde
2012-06-24 04:15:58 +00:00
kib
7b36a08108 Implement mechanism to export some kernel timekeeping data to
usermode, using shared page.  The structures and functions have vdso
prefix, to indicate the intended location of the code in some future.

The versioned per-algorithm data is exported in the format of struct
vdso_timehands, which mostly repeats the content of in-kernel struct
timehands. Usermode reading of the structure can be lockless.
Compatibility export for 32bit processes on 64bit host is also
provided. Kernel also provides usermode with indication about
currently used timecounter, so that libc can fall back to syscall if
configured timecounter is unknown to usermode code.

The shared data updates are initiated both from the tc_windup(), where
a fast task is queued to do the update, and from sysctl handlers which
change timecounter. A manual override switch
kern.timecounter.fast_gettime allows to turn off the mechanism.

Only x86 architectures export the real algorithm data, and there, only
for tsc timecounter. HPET counters page could be exported as well, but
I prefer to not further glue the kernel and libc ABI there until
proper vdso-based solution is developed.

Minimal stubs neccessary for non-x86 architectures to still compile
are provided.

Discussed with:	bde
Reviewed by:	jhb
Tested by:	flo
MFC after:	1 month
2012-06-22 07:06:40 +00:00
kib
d98ad62d7e Reserve AT_TIMEKEEP auxv entry for providing usermode the pointer to
timekeeping information.

MFC after:  1 week
2012-06-22 06:38:31 +00:00
alc
6eeaee04e4 The page flag PGA_WRITEABLE is set and cleared exclusively by the pmap
layer, but it is read directly by the MI VM layer.  This change introduces
pmap_page_is_write_mapped() in order to completely encapsulate all direct
access to PGA_WRITEABLE in the pmap layer.

Aesthetics aside, I am making this change because amd64 will likely begin
using an alternative method to track write mappings, and having
pmap_page_is_write_mapped() in place allows me to make such a change
without further modification to the MI VM layer.

As an added bonus, tidy up some nearby comments concerning page flags.

Reviewed by:	kib
MFC after:	6 weeks
2012-06-16 18:56:19 +00:00
raj
4542634c3c Panic openly if we cannot retrieve memory information from the device tree.
This is a critical condition and can lead to all sorts of misterious hangs if
not handled.

Obtained from:	Semihalf
Also reported by: thompsa
2012-05-30 18:05:48 +00:00
raj
76640cb48b Extract vendor specific Book-E pieces into separate files and have a common
skeleton (maybe we should kobj-tize this one day).

Note the PPC4xx bit is not connected to the build yet.

Obtained from:	AppliedMicro, Semihalf.
2012-05-30 17:34:40 +00:00
raj
39bb31b171 Remove redundant check, we catch ULE platform support in common
sys/kern/sched_ule.c
2012-05-27 10:32:10 +00:00
raj
7136f7f893 Let us manage differences of Book-E PowerPC variations i.e. vendor /
implementation specific vs. the common architecture definition.

Bring PPC4XX defines (PSL, SPR, TLB). Note the new definitions under
BOOKE_PPC4XX are not used in the code yet.

This change set is not supposed to affect existing E500 support, it's just
another reorg step before bringing support for E500mc, E5500 and PPC465.

Obtained from:	AppliedMicro, Freescale, Semihalf
2012-05-27 10:25:20 +00:00
raj
f58c0d7427 Import eSDHC driver for Freescale integrated controller.
Obtained from:	Freescale, Semihalf
Written by:	Michal Dubiel
2012-05-26 21:07:15 +00:00
raj
dc343feae3 Move OpenPIC FDT bus glue to a shared location, so that other PowerPC
platforms can use it, not only MPC85XX.

This is just reorg, no functional changes.
2012-05-26 21:02:49 +00:00
raj
e87745389c Retrieve CPU number info from the device tree.
Obtained from:	Freescale, Semihalf.
2012-05-26 13:42:55 +00:00
raj
8c2ef762a7 Rename e500 prefix to match other Book-E CPU variations. CPU id tidbits for
the new cores.

Obtained from:	Freescale, Semihalf.
2012-05-26 13:36:18 +00:00
raj
0557f549f6 Provide SPR definitions for newer Book-E (E500mc, E5500, PPC465).
Obtained from:	Freescale, Semihalf.
2012-05-26 12:39:23 +00:00
raj
9e109ca411 Unify SPR defines formatting, no funtional changes. 2012-05-26 12:15:13 +00:00
raj
c4e990d23d Update HID defines for E500mc and E5500 CPU cores.
Obtained from:	Freescale, Semihalf
2012-05-25 21:12:24 +00:00
raj
cb9537b464 Fix physical address type to vm_paddr_t also for powerpc64. 2012-05-25 18:17:26 +00:00
raj
0c51e3a0d5 Missing vm_paddr_t bits which should have been part of r235936. 2012-05-25 15:13:55 +00:00
bz
9254329b05 Add a missing " to get closer to compiling. 2012-05-24 23:46:17 +00:00
nwhitehorn
cb2f55559e Atomic operation acquire barriers also need to be isync on 64-bit systems. 2012-05-24 22:14:39 +00:00
marcel
3184129b6e Revert isync for ILP32 to sync as per my original change that I discussed
with Nathan. Leave __ATOMIC_ACQ as an isync as per Nathan.
2012-05-24 22:06:00 +00:00
bz
cd8b136e12 MFp4 bz_ipv6_fast:
in_cksum.h required ip.h to be included for struct ip.  To be
  able to use some general checksum functions like in_addword()
  in a non-IPv4 context, limit the (also exported to user space)
  IPv4 specific functions to the times, when the ip.h header is
  present and IPVERSION is defined (to 4).

  We should consider more general checksum (updating) functions
  to also allow easier incremental checksum updates in the L3/4
  stack and firewalls, as well as ponder further requirements by
  certain NIC drivers needing slightly different pseudo values
  in offloading cases.  Thinking in terms of a better "library".

  Sponsored by:	The FreeBSD Foundation
  Sponsored by:	iXsystems

Reviewed by:	gnn (as part of the whole)
MFC After:	3 days
2012-05-24 22:00:48 +00:00
marcel
5ba5b2308f A few improvements:
1.  Define all registers. These definitions are needed to support
    the FCM driver for direct-connect NAND.
2.  Repurpose lbc_read_reg() and lbc_write_reg() for use by localbus
    attached device drivers. Use bus_space functions directly in the
    lbc driver itself.
3.  Be smarter about programming LAWs and mapping memory. The ranges
    defined in the FDT are per bank (= chip select) and since we can
    have up to 8 banks, we could easily use more than 8 LAWs or TLB
    enrties when per-bank memory ranges need multiple LAWs or TLBs
    due to alignment or size constraints.
    We now combine all memory ranges into the fewest possible set of
    contiguous regions and program the hardware for that. Thus, a
    cleverly written FDT with 8 devices may still only need 1 LAW or
    1 TLB entry. Note that the memory ranges can be assigned randomly
    to the banks. We sort as we build to handle that.
4.  Support the FCM when programming the OR register. This is mostly
    for documention purposes as we do not have a way to define the
    mode for a bank.
5.  Remove Semihalf-ism: do not define DEBUG (only to undefine it
    again).
2012-05-24 21:23:13 +00:00
raj
91f8a79888 Fix physical address type to vm_paddr_t. 2012-05-24 21:13:24 +00:00
marcel
fece2de465 Remove Semihakf-ism. DEBUG is a kernel configuration option. It
should not be defined in source files.
2012-05-24 21:09:38 +00:00
marcel
4015ece7fb Just return if the size of the window is 0. This can happen when the
FDT does not define all ranges possible for a particular node (e.g.
PCI).
While here, only update the trgt_mem and trgt_io pointers if there's
no error. This avoids that we knowingly write an invalid target (= -1).
2012-05-24 21:07:10 +00:00
marcel
2c73b7699a Either the I/O port range or the memory mapped I/O range may not be
defined in the FDT. The range will have a zero size in that case.
2012-05-24 21:01:35 +00:00
marcel
eeea3251f8 o Rename kernload_ap to bp_kernelload. This to introduce a common prefix
for variables that live in the boot page.
o   Add bp_trace (yes, it's in the boot page) that gets zeroed before we
    try to wake a core and to which the core being woken can write markers
    so that we know where the core was in case it doesn't wake up. The
    boot code does not yet write markers (too follow).
o   Disable the boot page translation to allow the last 4K page to be used
    for whatever we please. It would get mapped otherwise.
o   Fix kernstart in the case of SMP. The start argument is typically page
    aligned due to the alignment requirements that come with having a boot
    page. The point of using trunc_page is that we get the actual load
    address given that the entry point is immediately following the ELF
    headers. In the SMP case this ended up exactly 4K after the load
    address. Hence subtracting 1 from start.
2012-05-24 20:58:40 +00:00
marcel
c933e51f6c Fix the memory barriers for CPUs that do not like lwsync and wedge or cause
exceptions early enough during boot that the kernel will do ithe same.
Use lwsync only when compiling for LP64 and revert to the more proven isync
when compiling for ILP32. Note that in the end (i.e. between revision 222198
and this change) ILP32 changed from using sync to using isync. As per Nathan
the isync is needed to make sure I/O accesses are properly serialized with
locks and isync tends to be more effecient than sync.

While here, undefine __ATOMIC_ACQ and __ATOMIC_REL at the end of the file
so as not to leak their definitions.

Discussed with: nwhitehorn
2012-05-24 20:45:44 +00:00
nwhitehorn
e83623fb1f Replace the list of PVOs owned by each PMAP with an RB tree. This simplifies
range operations like pmap_remove() and pmap_protect() as well as allowing
simple operations like pmap_extract() not to involve any global state.
This substantially reduces lock coverages for the global table lock and
improves concurrency.
2012-05-20 14:33:28 +00:00
nwhitehorn
68e9eabdbf Fix final bugs in memory barriers on PowerPC:
- Use isync/lwsync unconditionally for acquire/release. Use of isync
  guarantees a complete memory barrier, which is important for serialization
  of bus space accesses with mutexes on multi-processor systems.
- Go back to using sync as the I/O memory barrier, which solves the same
  problem as above with respect to mutex release using lwsync, while not
  penalizing non-I/O operations like a return to sync on the atomic release
  operations would.
- Place an acquisition barrier around thread lock acquisition in
  cpu_switchin().
2012-05-04 16:00:22 +00:00
dim
81a3e2b46d Add a convenience macro for the returns_twice attribute, and apply it to
the prototypes of the appropriate functions (getcontext, savectx,
setjmp, sigsetjmp and vfork).

MFC after:	2 weeks
2012-04-29 11:04:31 +00:00
nwhitehorn
98252594c8 Fix build on 32-bit systems. 2012-04-28 14:42:49 +00:00
nwhitehorn
d4577289f5 After switching mutexes to use lwsync, they no longer provide sufficient
guarantees on acquire for the tlbie mutex. Conversely, the TLB invalidation
sequence provides guarantees that do not need to be redundantly applied on
release. Roll a small custom lock that is just right. Simultaneously,
convert the SLB tree changes back to lwsync, as changing them to sync
was a misdiagnosis of the tlbie barrier problem this commit actually fixes.
2012-04-28 00:12:23 +00:00
nwhitehorn
337d2f2292 Switch the default I/O memory barrier to eieio, as it should be. This
does not appear to cause any problems due to fixes elsewhere.

MFC after:	2 months
2012-04-24 13:37:43 +00:00
nwhitehorn
d5494b21d8 Revert r234581 for this file. The lockless SLB tree code does in fact need
a heavyweight sync instead of a lightweight sync to function properly.
Thanks to mdf for the clarification.
2012-04-24 13:36:41 +00:00
nwhitehorn
1f2cd3bf47 Fix copy-and-paste error in r230400.
MFC after: 3 days
2012-04-23 20:53:50 +00:00
nwhitehorn
ff8c08b546 Fix missing header for powerpc_iomb().
Pointy hat to:	me
2012-04-23 15:47:07 +00:00
nwhitehorn
265701f492 Provide a clearer split between read/write and acquire/release barriers.
This should really, actually be correct now.
2012-04-22 22:27:35 +00:00
nwhitehorn
19e4decf83 Correctly specify assembler constrains for synchronization instructions.
MFC after: 3 days
2012-04-22 21:55:19 +00:00
nwhitehorn
f4ccf1d6d0 Clarify what we are doing in r234583 a little better: eieio and isync do
not provide general barriers, but only barriers in the context of the
atomic sequences here. As such, make them private and keep the global
*mb() routines using a variant of sync.
2012-04-22 21:11:01 +00:00
nwhitehorn
9735a82985 On non-64-bit systems (which generally don't have lwsync), use eieio and
isync to implement read and write barriers, following Appendix B.2 of
Book II of the architecture manual. This provides a 25% speed increase
to fork() on the PowerPC G4.
2012-04-22 20:23:34 +00:00
nwhitehorn
086dac3dc0 Use lwsync to provide memory barriers on systems that support it instead
of sync (lwsync is an alternate encoding of sync on systems that do not
support it, providing graceful fallback). This provides more than an order
of magnitude reduction in the time required to acquire or release a mutex.

MFC after:	2 months
2012-04-22 19:00:51 +00:00
nwhitehorn
0e093d4003 Remove dead code. The routines in atomic.S did not work properly anyway, and
were everywhere unused. If we turn out to need them, they should be
reimplemented.

MFC after:	2 weeks
2012-04-22 18:56:56 +00:00
nwhitehorn
666d3956e9 Replace eieio; sync for creating bus-space memory barriers with sync.
sync performs a strict superset of the functions of eieio, so using both
is redundant. While here, expand bus barriers to all bus_space operations,
since many drivers do not correctly use bus_space_barrier().

In principle, we can also replace sync just with eieio, for a significant
performance increase, but it remains to be seen whether any poorly-written
drivers currently depend on the side effects of sync to properly function.

MFC after:	1 week
2012-04-22 18:54:51 +00:00
nwhitehorn
d394621163 Avoid a lock order reversal in pmap_extract_and_hold() from relocking
the page. This PMAP requires an additional lock besides the PMAP lock
in pmap_extract_and_hold(), which vm_page_pa_tryrelock() did not release.

Suggested by:	kib
MFC after:	4 days
2012-04-22 17:58:30 +00:00
nwhitehorn
5af196c3d0 Organize some members of ucontext_t in the same order they are in the
trap frame. These are usually not used, and so this changes very little.

MFC after:	5 days
2012-04-21 14:39:47 +00:00
nwhitehorn
8f2d167ee3 Make sure all pending operations have completed on the existing thread
before (potentially) migrating it to a different CPU.

MFC after:	5 days
2012-04-20 23:01:36 +00:00
nwhitehorn
d89ad2c78a We don't need kcopy() in any of the remaining places it is used, so
remove it.

MFC after:	2 weeks
2012-04-11 22:23:50 +00:00
nwhitehorn
e1fa94aa4e Only manipulate the PGA_EXECUTABLE flag on managed pages. This is a proxy
for whether the page is physical. On dense phys mem systems (32-bit),
VM_PHYS_TO_PAGE will not return NULL for device memory pages if device
memory is above physical memory even if there is no allocated vm_page.
Attempting to use the returned page could then cause either memory
corruption or a page fault.
2012-04-11 21:56:55 +00:00
nwhitehorn
31bc0a8bff Fix error in r233949. Synchronizing icaches on uncacheable pages turns out
not to be a good idea, and of course the PV entry list for a page is never
empty after the page has been mapped.
2012-04-11 20:28:05 +00:00
nwhitehorn
5ff92b1d9c Do not restore the register holding the TLS pointer when doing various
usermode context switches (long jumps and ucontext operations). If these
are used across threads, multiple threads can end up with the same TLS base.
Madness will then result.

This makes behavior on PPC match that on x86 systems and on Linux.

MFC after:	10 days
2012-04-11 00:00:40 +00:00
nwhitehorn
a8563567c4 Execute an initial ptesync if and only if the PTE is actually being
invalidated, as opposed to a ref/changed bit update.
2012-04-06 22:33:13 +00:00
nwhitehorn
6c37128bdd Substantially reduce the scope of the locks held in pmap_enter(), which
improves concurrency slightly.
2012-04-06 18:18:48 +00:00
nwhitehorn
9c79ae8eea Reduce the frequency that the PowerPC/AIM pmaps invalidate instruction
caches, by invalidating kernel icaches only when needed and not flushing
user caches for shared pages.

Suggested by:	kib
MFC after:	2 weeks
2012-04-06 16:03:38 +00:00
nwhitehorn
e05a39a26d Give the kernel pmap lock a different name than user pmap locks. It has
(slightly) different semantics and renaming it prevents a (harmless)
WITNESS warning during bootup for 32-bit kernels on 64-bit CPUs.

MFC after:	5 days
2012-04-06 16:00:37 +00:00
jhb
98fa920cd5 - Rename VM_MEMATTR_UNCACHED to VM_MEMATTR_WEAK_UNCACHEABLE on x86 to
be less ambiguous and more clearly identify what it means.  This
  attribute is what Intel refers to as UC-, and it's only difference
  relative to normal UC memory is that a WC MTRR will override a UC-
  PAT entry causing the memory to be treated as WC, whereas a UC PAT
  entry will always override the MTRR.
- Remove the VM_MEMATTR_UNCACHED alias from powerpc.
2012-03-29 16:51:22 +00:00
nwhitehorn
dc06a3cb59 Allow multiple inclusion of trap.h. This has always been broken, but
until recently never caused problems.
2012-03-29 02:02:14 +00:00
fabient
5edfb77dd3 Add software PMC support.
New kernel events can be added at various location for sampling or counting.
This will for example allow easy system profiling whatever the processor is
with known tools like pmcstat(8).

Simultaneous usage of software PMC and hardware PMC is possible, for example
looking at the lock acquire failure, page fault while sampling on
instructions.

Sponsored by: NETASQ
MFC after:	1 month
2012-03-28 20:58:30 +00:00
nwhitehorn
03485ae3df More PMAP performance improvements: skip 256 MB segments entirely if they
are are not mapped during ranged operations and reduce the scope of the
tlbie lock only to the actual tlbie instruction instead of the entire
sequence. There are a few more optimization possibilities here as well.
2012-03-28 17:25:29 +00:00
nwhitehorn
78cf971b20 Make sure to call vm_page_dirty() before the pmap lock is released to
prevent a race where another process could conclude the page was clean.

Submitted by:	alc
2012-03-27 01:26:00 +00:00
nwhitehorn
3bbb70297a More PMAP concurrency improvements: replace the table lock and (almost) all
uses of the page queues mutex with a new rwlock that protects the page
table and the PV lists. This reduces system time during a parallel
buildworld by 35%.

Reviewed by:	alc
2012-03-27 01:24:18 +00:00
nwhitehorn
13688ae964 More PMAP performance improvements: on powerpc64, when TLBIE can be run
with exceptions enabled, leave them enabled and use a regular mutex to
guard TLB invalidations instead of a spinlock.
2012-03-25 06:01:34 +00:00
nwhitehorn
30ea2f9f86 Only call vm_page_dirty() on pages that are writable in order not to
confuse the VM.
2012-03-24 22:32:19 +00:00
nwhitehorn
2cab577d3a Following suggestions from alc, skip wired mappings in pmap_remove_pages()
and remove moea64_attr_*() in favor of direct calls to vm_page_dirty()
and friends.
2012-03-24 19:59:14 +00:00
ed
619ab2327e Remove pty(4) from our kernel configurations.
As of FreeBSD 8, this driver should not be used. Applications that use
posix_openpt(2) and openpty(3) use the pts(4) that is built into the
kernel unconditionally. If it turns out high profile depend on the
pty(4) module anyway, I'd rather get those fixed. So please report any
issues to me.

The pty(4) module is still available as a kernel module of course, so a
simple `kldload pty' can be used to run old-style pseudo-terminals.
2012-03-21 08:38:42 +00:00
andreast
86771720e4 Provide a fix for certain PowerMacs where the U3 i2c lacks the interrupt
info.

Tested by:	Robert Hish
MFC after:	1 week
2012-03-19 18:03:20 +00:00
nwhitehorn
fcd574676f Remove acquisition of VM page queues lock from pmap_protect(). Any actual
manipulation of the pvo_vlink and pvo_olink entries is already protected
by the table lock, so most remaining instances of the acquisition of the
page queues lock can likely be replaced with the table lock, or removed
if the table lock is already held.

Reviewed by:	alc
2012-03-18 13:22:42 +00:00
nwhitehorn
6a20b9d5e1 Make ofw_bus_get_node() consistently return -1 when there is no associated
OF node, instead of a random mixture of 0 and -1. Update all checks for 0
to check for -1 instead.

MFC after:	4 weeks
2012-03-15 22:53:39 +00:00
nwhitehorn
9a147d4aa9 Implement pmap_remove_pages(). This will be added later to the 32-bit MMU
module.

Suggested by:	alc
2012-03-15 22:50:48 +00:00
nwhitehorn
61f538e719 Improve algorithm for deciding whether to loop through all process pages
or look them up individually in pmap_remove() and apply the same logic
in the other ranged operation (pmap_protect). This speeds up make
installworld by a factor of 2 on powerpc64.

MFC after:	1 week
2012-03-15 19:36:52 +00:00
nwhitehorn
71beaf7fd7 Use LIST_FOREACH_SAFE() instead of LIST_FOREACH() in pmap_remove(), since
the point of this loop is to remove elements. This worked by accident before.

MFC after:	2 days
2012-03-14 20:19:49 +00:00
dim
cf2c2fde9c Add casts to __uint16_t to the __bswap16() macros on all arches which
didn't already have them.  This is because the ternary expression will
return int, due to the Usual Arithmetic Conversions.  Such casts are not
needed for the 32 and 64 bit variants.

While here, add additional parentheses around the x86 variant, to
protect against unintended consequences.

MFC after:	2 weeks
2012-03-09 20:34:31 +00:00
attilio
9906b913d9 Disable the option VFS_ALLOW_NONMPSAFE by default on all the supported
platforms.
This will make every attempt to mount a non-mpsafe filesystem to the
kernel forbidden, unless it is expressely compiled with
VFS_ALLOW_NONMPSAFE option.

This patch is part of the effort of killing non-MPSAFE filesystems
from the tree.

No MFC is expected for this patch.
2012-03-06 20:01:25 +00:00
andreast
2e83fcc661 Restore proper dot symbol creation for assembly files in the kernel build case.
Without this patch we were not able to see the assembly function.
Only the function descriptor was visible.

- Distinguish between user-land and kernel when creating the ENTRY() point of
  assembly source.
- Make the ENTRY() macro more readable, replace the .align directive with the
  gas platform independant .p2align directive.
- Create an END()macro for later use to provide traceback tables on powerpc64.
2012-03-04 11:55:28 +00:00
andreast
81229669a4 Add support for PWM controlled fans. I found these fans on my PowerMac9,1.
These fans are not located under the same node as the the RPM controlled ones,
So I had to adapt the current source to parse and fill the properties correctly.
To control the fans we can set the PWM ratio via sysctl between 20 and 100%.

Tested by:	nwhitehorn
MFC after:	3 weeks
2012-03-04 08:43:33 +00:00
jhb
d6e546f14a - Add a bus_dma tag to each PCI bus that is a child of a Host-PCI bridge.
The tag enforces a single restriction that all DMA transactions must not
  cross a 4GB boundary.  Note that while this restriction technically only
  applies to PCI-express, this change applies it to all PCI devices as it
  is simpler to implement that way and errs on the side of caution.
- Add a softc structure for PCI bus devices to hold the bus_dma tag and
  a new pci_attach_common() routine that performs actions common to the
  attach phase of all PCI bus drivers.  Right now this only consists of
  a bootverbose printf and the allocate of a bus_dma tag if necessary.
- Adjust all PCI bus drivers to allocate a PCI bus softc and to call
  pci_attach_common() from their attach routines.

MFC after:	2 weeks
2012-03-02 20:38:04 +00:00
jhb
5013ab31bd - Change contigmalloc() to use the vm_paddr_t type instead of an unsigned
long for specifying a boundary constraint.
- Change bus_dma tags to use bus_addr_t instead of bus_size_t for boundary
  constraints.

These allow boundary constraints to be fully expressed for cases where
sizeof(bus_addr_t) != sizeof(bus_size_t).  Specifically, it allows a
driver to properly specify a 4GB boundary in a PAE kernel.

Note that this cannot be safely MFC'd without a lot of compat shims due
to KBI changes, so I do not intend to merge it.

Reviewed by:	scottl
2012-03-01 19:58:34 +00:00
jhibbits
76b96a73a2 Add backlight control to ATI-graphics PowerBooks and iBooks.
Approved by:	nwhitehorn (mentor)
MFC after:	1 week
2012-02-26 13:45:25 +00:00
andreast
a7373d1fb4 Enable the new PCI-PCI bridge driver by default.
Tested on 32- and 64-bit PowerMac.
2012-02-19 10:10:12 +00:00
nwhitehorn
b5854e1423 Improve error handling in smusat(4).
MFC after:	4 days
2012-02-15 16:59:24 +00:00
nwhitehorn
b81e3d3b8f The bus resource adjustment API is not meant to work on active resources.
Return an error if a driver attempts this, and, if INVARIANTS is on,
panic.

Reviewed by:	jhb
2012-02-07 19:14:13 +00:00
nwhitehorn
412d48f588 Inherit from PCI bridge driver instead of manually specifying all of its
methods.

Obtained from:	sparc64
MFC after:	1 week
2012-02-05 20:07:45 +00:00
andreast
bf13243b53 Replace the assembler macro WEAK_ALIAS with a new macro WEAK_REFERENCE which
has the same API as __weak_reference(). Give 'x' in SYS.h a more meaningful
name.

Tested on 32- and 64-bit PowerMac.

Reviewed by:	bde
2012-02-05 20:04:43 +00:00