Commit Graph

140 Commits

Author SHA1 Message Date
Oleksandr Tymoshenko
070f07e3de - Remove stale comments
- Replace a1 with k1 to while restoring context. a1 was there by mistake,
    interrupts are disabled at this point and it's safe to use k0, k1.
    This code never was reached beacasue current Status register handling
    prevented interrupta from user mode.
2009-05-23 18:00:20 +00:00
Oleksandr Tymoshenko
41917f9933 - Wrong logical operator was used for flag check 2009-05-23 06:30:03 +00:00
Doug White
58f0ea3143 Remove unused variable. 2009-05-22 20:08:13 +00:00
Doug White
58a5af46ef Add some missing bits to arge:
* In arge_attach(), hard reset the MAC blocks before configuring the MAC.
 * In arge_reset_dma(), clear pending packet interrupts based off
   the hardware counter instead of acking every packet in the ring,
   as the hardware counter can exceed the ring size. If the reset
   was successful the counters will be zero anyway.
 * In arge_encap(), remove an unused variable.
 * In arge_tx_locked(), remove redundant setting of the EMPTY flag as
   the TX DMA engine sets it for us.
 * In arge_intr(), remember to clear the interrupt status bits
   relayed from arge_intr_filter().
 * Handle RX overflow and TX underflow.
 * In arge_tx_intr(), remember to unmask the TX interrupt bits
   after processing them.
2009-05-21 22:12:42 +00:00
Oleksandr Tymoshenko
52e6bd2801 - Invalidate caches for respective areain KSEG0 in order
to prevent further overwriting of KSEG1 data with
    writeback.
2009-05-20 23:07:10 +00:00
Oleksandr Tymoshenko
f92ba06830 - ar71xx increases Count value every two cycles 2009-05-19 02:51:30 +00:00
Oleksandr Tymoshenko
dea8410235 - Cleanup ticker initialization code. For some MIPS cpu Counter
register increments only every second cycle. The only timing
    references for us is Count value. Therefore it's better to convert
    frequencies related to it and use them. Besides cleanup this commit
    fixes twice more then requested sleep interval problem.
2009-05-19 02:43:21 +00:00
Oleksandr Tymoshenko
e0e8ed6ab1 - Add spibus and mx25l device 2009-05-18 23:36:11 +00:00
Oleksandr Tymoshenko
495d422f49 - Add SPI bus driver for ar71xx SoC 2009-05-18 23:32:04 +00:00
Oleksandr Tymoshenko
b665f0d4b7 - Set MAC Address obtained from RedBoot or generate random one 2009-05-16 02:45:38 +00:00
Oleksandr Tymoshenko
89616da3f5 - Get memory size and base MAC address from RedBoot (if available) 2009-05-16 02:43:24 +00:00
Oleksandr Tymoshenko
9270c7be8b - Add MIPS_IS_KSEG0_ADDR, MIPS_IS_KSEG1_ADDR and MIPS_IS_VALID_PTR
macroses thet check if address belongs to KSEG0, KSEG1 or both
    of them respectively.
2009-05-16 02:39:13 +00:00
Oleksandr Tymoshenko
a2f4a6ee3c - Add informational title for cache info lines to separate
them from environment variables dump
2009-05-16 02:34:03 +00:00
Oleksandr Tymoshenko
bcc90b6ff5 - Add pci bus space that translates byte order to little endian,
may be it will be merged with bus_space_reversed later
- Handle memory resources close to bus in order to control
    bus_space_tag
2009-05-15 21:36:50 +00:00
Oleksandr Tymoshenko
b75cca0708 - Calculate clock frequency using PLL registers
- Remove stale comments
2009-05-15 01:54:32 +00:00
Oleksandr Tymoshenko
b31707c849 - Calculate CPU frequency using dividers from PLL registers 2009-05-15 01:53:09 +00:00
Oleksandr Tymoshenko
9b54fef7f5 - Add definitions for PLL CPU Config register fields 2009-05-15 01:51:47 +00:00
Oleksandr Tymoshenko
ce205fb47f - Add SPI-related registers 2009-05-14 21:27:03 +00:00
Oleksandr Tymoshenko
c5d30a2254 - Off by one check fix. Check for last address in region
to fit in KSEG1
2009-05-14 21:26:07 +00:00
Oleksandr Tymoshenko
a88b9b52e3 - Remove garbage debug output 2009-05-14 21:15:27 +00:00
Oleksandr Tymoshenko
5db10e923d - Add interrupt handling for AR71XX PCI bridge 2009-05-07 03:39:23 +00:00
Oleksandr Tymoshenko
e7153b2583 Merge from HEAD 2009-05-06 22:40:01 +00:00
Oleksandr Tymoshenko
aa5b813413 - Use index ops in order to avoid TLBMiss exceptions when flushing caches
on mapping removal
- Writeback all VA for page that is being copied in pmap_copy_page to
    guaranty up-to-date data in SDRAM
2009-05-06 02:55:43 +00:00
Oleksandr Tymoshenko
ccf532a44b - Rollback to the hack with 3-bytes offset in base address.
uart_bus_XXXXX resources are handled in uart(4) code
    and we need more sophysticated way to define which space
    should be used for device based on hints
2009-05-06 02:46:04 +00:00
Oleksandr Tymoshenko
1540246aab - Rollback to legacy NFS RPC implementation. New one has unaligned
memory access after nfsm_dissect
2009-05-06 02:34:35 +00:00
Oleksandr Tymoshenko
07e615d625 - Add APB base and size for memory rman in apb 2009-05-06 02:31:46 +00:00
Oleksandr Tymoshenko
ccf8f87398 - Handle memory requests on apb level, do not pass them up to
nexus
- Unmask IRQ in bus_intr_setup
- Do not count timer IRQ (IRQ0) as stray
2009-05-06 02:31:07 +00:00
Alan Cox
7b89d46e0f A variety of changes:
Reimplement "kernel_pmap" in the standard way.

Eliminate unused variables.  (These are mostly variables that were
discarded by the machine-independent layer after FreeBSD 4.x.)

Properly handle a vm_page_alloc() failure in pmap_init().

Eliminate dead or legacy (FreeBSD 4.x) code.

Eliminate unnecessary page queues locking.

Eliminate some excess white space.

Correct the synchronization of pmap_page_exists_quick().

Tested by: gonzo
2009-05-02 06:12:38 +00:00
Oleksandr Tymoshenko
26a323c653 - accummulate interrupt causes in filter instead of rewriting old. The only
place where status should be overrided - interrupt handler
2009-04-29 03:21:53 +00:00
Oleksandr Tymoshenko
4f3aceef88 - When destroying va -> pa mapping writeback all caches or we may endup
with partial page content in SDRAM
- style(9) fix
2009-04-28 02:59:18 +00:00
Oleksandr Tymoshenko
c231293745 - Cast argument to proper type in order to avoid warnings like
"shift value is too large for given type"
2009-04-27 19:18:55 +00:00
Oleksandr Tymoshenko
3a8b0ab3f3 - Use new spacebus
- Be a bit more verbose on failures
- style(9) fixes
- Use default rid value of 0 instead of MIPS_MEM_RID (0x20)
2009-04-27 18:46:57 +00:00
Oleksandr Tymoshenko
00c35cc20b - Use naming convention the same as MIPS spec does: eliminate _sel1 sufix
and just use selector number. e.g. mips_rd_config_sel1 -> mips_rd_config1
- Add WatchHi/WatchLo accessors for selctors 1..3 (for debug purposes)
2009-04-27 18:29:59 +00:00
Oleksandr Tymoshenko
ffb90c259e Fix cut'n'paste code. cfg3 should get the value of selector 3
Spotted by: thompa@
2009-04-24 05:28:44 +00:00
Oleksandr Tymoshenko
709410480c - Print supported CPU capabilities during stratup 2009-04-24 04:18:16 +00:00
Oleksandr Tymoshenko
7323fa4005 - Define accessor functions for CP0 Config(16) register selects 1, 2, 3.
Content of these registers is defined in MIPS spec and can be used
    for obtaining info about CPU capabilities.
2009-04-24 04:17:21 +00:00
Oleksandr Tymoshenko
e19cc06695 - Fix whitespace to conform style(9) 2009-04-24 03:38:51 +00:00
Robert Watson
9725389e1e Don't conditionally define CACHE_LINE_SHIFT, as we anticipate sizing
a fair number of static data structures, making this an unlikely
option to try to change without also changing source code. [1]

Change default cache line size on ia64, sparc64, and sun4v to 128
bytes, as this was what rtld-elf was already using on those
platforms. [2]

Suggested by:	bde [1], jhb [2]
MFC after:	2 weeks
2009-04-20 12:59:23 +00:00
Alan Cox
1c951556bc MFamd64/i386
Introduce pmap_try_insert_pv_entry(), a function that conditionally
  creates a pv entry if the number of entries is below the high water mark
  for pv entries.

  Introduce pmap_enter_quick_locked() and use it to reimplement
  pmap_enter_object().  The old implementation was broken.  For example,
  it could block while holding a mutex lock.

  Change pmap_enter_quick_locked() to fail rather than wait if it is
  unable to allocate a page table page.  This prevents a race between
  pmap_enter_object() and the page daemon.  Specifically, an inactive
  page that is a successor to the page that was given to
  pmap_enter_quick_locked() might become a cache page while
  pmap_enter_quick_locked() waits and later pmap_enter_object() maps
  the cache page violating the invariant that cache pages are never
  mapped.  Similarly, change
  pmap_enter_quick_locked() to call pmap_try_insert_pv_entry() rather
  than pmap_insert_entry().  Generally speaking,
  pmap_enter_quick_locked() is used to create speculative mappings.  So,
  it should not try hard to allocate memory if free memory is scarce.

Tested by:	gonzo
2009-04-20 03:44:54 +00:00
Oleksandr Tymoshenko
c124ae524d - Enable USB and EHCI
- Include if_arge to build
- Add NFS root options
- Disable pci ATM and add stubs for wifi adapter config
2009-04-19 23:15:04 +00:00
Oleksandr Tymoshenko
0b67040463 - Expand memory window for apb to include OHCI memory region
- Add hints for EHCI and OHCI controllers
2009-04-19 23:08:23 +00:00
Oleksandr Tymoshenko
c058a01081 - Remove garbage debug output
- ar71xx_bus_space_reversed is bus_space_tag_t, use it this way
2009-04-19 23:06:15 +00:00
Oleksandr Tymoshenko
e6a88aa8ad - Add EHCI controller driver for AR71XX-based boards. 2009-04-19 22:58:36 +00:00
Oleksandr Tymoshenko
06dfe15065 - Handle byte-order issue for non-word accesses to memory mapped
registers with ar71xx_bus_space_reversed. Note, that byte order
    of values is handled by drivers. bus_spaces fixes only position
    of register in word.
- Replace .hints hack for AR71XX UART with ar71xx_bus_space_reversed.
2009-04-19 22:56:35 +00:00
Oleksandr Tymoshenko
50b3024887 - Make mips_bus_space_generic be of type bus_space_tag_t instead of
struct bus_space and update all relevant places.
2009-04-19 22:02:14 +00:00
Robert Watson
22037b2d2c Add description and cautionary note regarding CACHE_LINE_SIZE.
MFC after:	2 weeks
Suggested by:	alc
2009-04-19 21:26:36 +00:00
Robert Watson
a93fa8f2bb For each architecture, define CACHE_LINE_SHIFT and a derived
CACHE_LINE_SIZE constant.  These constants are intended to
over-estimate the cache line size, and be used at compile-time
when a run-time tuning alternative isn't appropriate or
available.

Defaults for all architectures are 64 bytes, except powerpc
where it is 128 bytes (used on G5 systems).

MFC after:	2 weeks
Discussed on:   arch@
2009-04-19 20:19:13 +00:00
Oleksandr Tymoshenko
cf6e3ada35 Fix USB2 quick'n'dirty porting, now system successfully detects OHCI 2009-04-15 05:37:17 +00:00
Oleksandr Tymoshenko
cbc6cfe0ed - Port AR71XX OHCI controller to new USB stack 2009-04-15 03:04:33 +00:00
Oleksandr Tymoshenko
0c6b091e31 Use FreeBSD/arm approach for handling bus space access: space tag is a pointer
to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.
2009-04-15 02:28:26 +00:00