123 Commits

Author SHA1 Message Date
sbruno
171a28589f Queisce warning about empty bodies in these loops by bumping the ;; to the
next line.
2013-10-29 20:35:28 +00:00
emaste
0e8668d655 Don't force 64-bit DWARF2 on MIPS
64-bit debug data is only necessary for objects with greater than 4GB of
debug data, and is not used on other 64-bit FreeBSD targets.

Sponsored by:	DARPA, AFRL
2013-10-21 20:38:02 +00:00
andrew
8748a4fbf3 Merge from projects/arm_eabi_vfp r255380:
Fix the VCVT instruction. It must round towards zero when converting from
a floating-point to an integer value. This was not the case causing issues
when printing certain values.

There is a VCVTR instruction that will round depending on the current
rounding mode. We don't yet support this instruction, or setting the
rounding mode.
2013-10-20 15:13:32 +00:00
emaste
2ba2e395d9 Fix .debug_line prologue header length calculation for 64-bit DWARF
The header_length field is the number of bytes following the field to
the first byte of the line number program.  The hard-coded constants
previously here (4 + 2 + 4) were correct only for 32-bit DWARF.

Sponsored by:	DARPA, AFRL
2013-10-17 17:25:00 +00:00
jhb
8f38cafe69 Add support for the 'invpcid' instruction to binutils and DDB's
disassembler on amd64.

MFC after:	1 month
2013-09-03 21:21:47 +00:00
andrew
4275694348 Silence a warning that is incorrect on ARMv6 and later. In the smull, umull,
smlal, and umlal the output registers are allowed to be the same as either
input registers, where in ARMv4 and ARMv5 they could only be the same as the
last input register.
2013-08-17 14:36:32 +00:00
andrew
c94762cd4a do_vfp_vmrs and do_vfp_vmsr should not return anything. 2013-03-18 15:14:36 +00:00
andrew
7479840eb8 Add support for the vmsr and vmrs instructions. This supports the system
level version of the instructions. When used in userland the hardware only
allows us to read/write FPSCR.
2013-03-18 08:22:35 +00:00
andrew
e0722a1284 Some ARM vmov similar to 'vmov.f32 s1, s2' will incorrectly have the second
register added to the symbol table by the assembler. On further
investigation it was found the problem was with the my_get_expression
function. This is called by parse_big_immediate.

Fix this by moving the call to parse_big_immediate to the end of the if,
else if, ..., else block.
2013-03-18 07:41:08 +00:00
andrew
86e5cbf21f Clear the memory allocated to build the unwind tables. This fixes C++
exceptions on ARM EABI with static binaries.
2013-02-27 06:53:15 +00:00
jmg
fa192d80dd add support for AES and PCLMULQDQ instructions to binutils...
Thanks to Mike Belopuhov for the pointer to the OpenBSD patch, though
OpenBSD's gcc is very different that it only helped w/ where to modify,
not how...  Thanks to jhb for some early reviews...

Reviewed by:	imp, kib
MFC after:	1 month
2013-02-19 21:35:17 +00:00
andrew
20e1774582 Recognise vfpv2 as a value for the ARM .fpu asm directive. Clang generates
these even when building soft floating-point code

Submitted by:	Daisuke Aoyama <aoyama AT peach.ne.jp>
2012-12-15 21:12:13 +00:00
gonzo
b501ab9dc9 Merging of projects/armv6, part 3
r238211:
Support TARGET_ARCH=armv6 and TARGET_ARCH=armv6eb

This adds a new TARGET_ARCH for building on ARM
processors that support the ARMv6K multiprocessor
extensions.  In particular, these processors have
better support for TLS and mutex operations.

This mostly touches a lot of Makefiles to extend
existing patterns for inferring CPUARCH from ARCH.
It also configures:
 * GCC to default to arm1176jz-s
 * GCC to predefine __FreeBSD_ARCH_armv6__
 * gas to default to ARM_ARCH_V6K
 * uname -p to return 'armv6'
 * make so that MACHINE_ARCH defaults to 'armv6'
It also changes a number of headers to use
the compiler __ARM_ARCH_XXX__ macros to configure
processor-specific support routines.

Submitted by:	Tim Kientzle <kientzle@freebsd.org>
2012-08-15 03:21:56 +00:00
jhb
56b27dd2e7 Add support for the 'invept' and 'invvpid' instructions. Beyond simply
adding appropriate table entries, the assembler had to be adjusted as
these are the first non-SSE instructions to use a 3-byte opcode (and a
mandatory prefix to boot).

MFC after:	1 month
2012-07-06 14:28:18 +00:00
jhb
2ce653dc23 Add support for the 'xsave', 'xrstor', 'xsaveopt', 'xgetbv', and 'xsetbv'
instructions.  I reimplemented this from scratch based on the Intel
manuals and the existing support for handling the fxsave and fxrstor
instructions.  This will let us use these instructions natively with GCC
rather than hardcoding the opcodes in hex.

Reviewed by:	kib
MFC after:	1 month
2012-07-04 22:12:10 +00:00
dim
1f9c357d9b Make GNU as recognize the ARM 'rrx' mnemonic, which can be generated by
clang for certain expressions.  Code taken from Apple cctools (GPLv2).

Submitted by:	damjan.marion@gmail.com
2011-06-23 20:54:44 +00:00
benl
2071e3510a Fix clang warnings.
Approved by:	philip (mentor)
2011-06-18 13:56:33 +00:00
benl
3bcf417808 Fix clang warnings.
Approved by:	philip (mentor)
2011-05-22 22:15:42 +00:00
dim
fd23e48979 For ia64, add a proper 'elf64-ia64-freebsd' output format to BFD, so the
ELF branding for FreeBSD is done in the same way as amd64, i386 and
sparc.  Something similar should probably also be done for arm, mips and
powerpc.
2010-12-05 20:24:22 +00:00
dim
3f5c947f44 Merge ^/vendor/binutils/dist@214571 into contrib/binutils, which brings
us up to version 2.17.50.20070703, at the last GPLv2 commit.

Amongst others, this added upstream support for some FreeBSD-specific
things that we previously had to manually hack in, such as the OSABI
label support, and so on.

There are also quite a number of new files, some for cpu's (e.g. SPU)
that we may or may not be interested in, but those can be cleaned up
later on, if needed.
2010-11-01 19:35:33 +00:00
dim
844d5c9852 Merge ^vendor/binutils/dist@214082 into contrib/binutils. 2010-10-21 19:11:14 +00:00
dim
0280420643 Merge ^vendor/binutils/dist@214033 into contrib/binutils.
The change made to bfd/elf.c in upstream revision 1.217.4.3 (which was a
revert of an earlier change), caused objcopy on powerpc to fail to copy
debug info from kernel modules.  This had to be fixed by applying the
diff from upstream revision 1.243 on top of it.
2010-10-19 20:14:32 +00:00
dim
1139501487 Merge ^vendor/binutils/dist@213996 into contrib/binutils. Skip adding
any files we do not need, delete some files that were removed upstream,
but keep our own customizations and backports from later binutils.
2010-10-18 20:57:43 +00:00
jmallett
ef36c6939e Add/improve mips64r2, Octeon, n32 and n64 support in the toolchain.
o) Add TARGET_ABI to the MIPS toolchain build process.  This sets the default
   ABI to one of o32, n32 or n64.  If it is not set, o32 is assumed as that is
   the current default.
o) Set the default GCC cpu type to any specified TARGET_CPUTYPE.  This is
   necessary to have a working "cc" if e.g. mips64 is specified, as binutils
   will refuse to link objects using different ISAs in some cases.
o) Add support for n32 and n64 ABIs to binutils and GCC.
o) Add additional required libgcc2 stubs for n32 and n64.
o) Add support for the "mips64r2" architecture to GCC.  Add the "octeon"
o) When static linking, wrap default libraries in --start-group and
   --end-group.  This is required for static linking to work on n64 with the
   interdependencies between libraries there.  This is what other OSes that
   support n64 seem to do, as well.
o) Fix our GCC spec to define __mips64 for 64-bit targets, not __mips64__, the
   former being what libgcc, etc., check and the latter seemingly being a
   misspelling of a hand merge from a Linux spec.
o) When no TARGET_CPUTYPE is specified at build time, make GCC take the default
   ISA from the ABI.  Our old defaults were too liberal and assumed that 64-bit
   ABIs should default to the MIPS64 ISA and that 32-bit ABIs should default to
   the MIPS32 ISA, when we are supporting or will support some systems based on
   earlier 32-bit and 64-bit ISAs, most notably MIPS-III.
o) Merge a new opcode file (and support code) from a later version of binutils
   and add flags and code necessary to support Octeon-specific instructions.
   This should also make merging opcodes for other modern architectures easier.

Reviewed by:	imp
2010-06-02 11:06:03 +00:00
obrien
2b02dfaa48 Rename vendor/binutils/*/contrib to vendor/binutils/*/x
Binutils has a "contrib" subdirectory - thus flattening cannot happen
without renaming the upper level contrib directory in a first pass.

Also, don't record this move and remove any keyword expansion.
2009-01-19 17:25:17 +00:00
imp
806f871aea Push mips support into the tree. 2008-12-11 08:22:20 +00:00
obrien
cd5f96a9ef Import of Binutils from the FSF 2.15 branch (just post-.0 release).
These bits are taken from the FSF anoncvs repo on 23-May-2004 04:41:00 UTC.
2008-05-29 02:29:59 +00:00
obrien
8bca5d6f6b This commit was generated by cvs2svn to compensate for changes in r179404,
which included commits to RCS files with non-trunk default branches.
2008-05-29 02:29:59 +00:00
kan
415b6dd3be Import two binutils header files from FSF 2.15 branch.
These fix binutils compilation on i386/amd64 with GCC 4.1 and
have no other effect.

No response by: obrien
2007-04-06 17:43:46 +00:00
kan
d4909d3f26 This commit was generated by cvs2svn to compensate for changes in r168433,
which included commits to RCS files with non-trunk default branches.
2007-04-06 17:43:46 +00:00
obrien
0aa70a0bbc Update HEAD with the stock binutils_2_15_20040523 file. 2004-06-16 06:55:49 +00:00
obrien
2504df11e1 Import of Binutils from the FSF 2.15 branch (just post-.0 release).
These bits are taken from the FSF anoncvs repo on 23-May-2004 04:41:00 UTC.
2004-06-16 05:45:41 +00:00
obrien
abfa7c9435 This commit was generated by cvs2svn to compensate for changes in r130561,
which included commits to RCS files with non-trunk default branches.
2004-06-16 05:45:41 +00:00
obrien
b0507dc8c4 Update HEAD with the stock files. 2002-12-02 09:39:02 +00:00
obrien
de862b42e9 GC some stuff I thought was long gone. 2002-12-02 09:14:25 +00:00
obrien
4f4b0b5073 Import of Binutils from the FSF 2.13 branch (just pre-.2 release).
These bits are taken from the FSF anoncvs repo on 27-Oct-2002 21:12:00 EST.
2002-12-02 09:06:04 +00:00
obrien
225c3b1101 This commit was generated by cvs2svn to compensate for changes in r107492,
which included commits to RCS files with non-trunk default branches.
2002-12-02 09:06:04 +00:00
obrien
c35e71cdfc Try to keep CVS from pissing over the next binutils import by returning
to purely stock files.
2002-12-02 08:42:08 +00:00
obrien
e523ed1ed7 Typo fixed on Vendor branch 2002-10-11 07:06:21 +00:00
obrien
644e24c601 This commit was generated by cvs2svn to compensate for changes in r104858,
which included commits to RCS files with non-trunk default branches.
2002-10-11 07:06:21 +00:00
obrien
32d8add601 Use the stock version of this. 2002-10-11 06:19:00 +00:00
obrien
613e6f63e2 Bring the binutils_2_13_20021110 snap version of this to the HEAD branch. 2002-10-11 06:18:04 +00:00
obrien
aae950e69c Import of Binutils from the FSF 2.13 branch (just pre-.1 release).
These bits are taken from the FSF anoncvs repo on 11-Oct-2002 22:39:35 PDT.
2002-10-11 06:01:20 +00:00
obrien
4e4a001541 This commit was generated by cvs2svn to compensate for changes in r104834,
which included commits to RCS files with non-trunk default branches.
2002-10-11 06:01:20 +00:00
obrien
dcf134d53b Remove these MIPS (and stragglers) from the vendor branch so I won't
accidently import them again.
2002-08-31 20:49:15 +00:00
obrien
0570468a60 Import of Binutils from the FSF 2.12 branch (post-.1 release). 2002-08-31 20:20:07 +00:00
obrien
19ac0b62f9 Use the stock version of this. 2002-07-05 20:37:36 +00:00
obrien
e23e2669ca Bring the binutils_2_12_20020622 snap version of this to the HEAD branch. 2002-07-05 20:36:17 +00:00
obrien
f3c54bd2c1 Import of Binutils from the FSF 2.12 branch (just post-.1 release).
These bits are taken from the FSF anoncvs repo on 22-June-2002 23:28:00 EDT.
2002-07-05 20:16:34 +00:00
obrien
5bbed9e6b0 This commit was generated by cvs2svn to compensate for changes in r99461,
which included commits to RCS files with non-trunk default branches.
2002-07-05 20:16:34 +00:00