Commit Graph

744 Commits

Author SHA1 Message Date
cognet
1ee793cfc2 Say if the L2 cache is enabled or disabled as well.
Approved by:	re (blanket)
2007-07-27 14:49:11 +00:00
cognet
72f29f4f32 Handle supersections and L2 cache.
Approved by:	re (blanket)
2007-07-27 14:46:43 +00:00
cognet
70e7077c96 Use supersection instead of standard sections to map the whole memory
when available.

Approved by:	re (blanket)
2007-07-27 14:46:15 +00:00
cognet
123f2b86f7 Fix the cache mode description.
Approved by:	re (blanket)
2007-07-27 14:45:33 +00:00
cognet
8b22cea67f Properly handle supersections.
Make sure we cache entries in the L2 cache.

Approved by:	re (blanket)
2007-07-27 14:45:04 +00:00
cognet
d9f013dcfb Bring in two bandaids to get the elf trampoline to work again, until I find
a proper solution.
- Add a dummy entry point which just calls the C entry points, and try to make
sure it's the first code in the binary.
- Copy a bit more than func_end to try to copy the whole load_kernel()
function. gcc4 puts code behind the func_end symbol.

Approved by:	re (blanket)
2007-07-27 14:42:25 +00:00
cognet
30161fe629 Add a new set of functions to handle L2 cache. Make them no-op for every
CPU except Xscale core 3.

Approved by:	re (blanket)
2007-07-27 14:39:41 +00:00
cognet
22beec041a Import xscale core 3 cache management functions.
Approved by:	re (blanket)
2007-07-27 14:28:15 +00:00
cognet
b1d9735f04 INTR_FILTER bits for arm
Approved by:	re (blanket)
2007-07-27 14:26:42 +00:00
cognet
25994fd742 The iop34x has 128 interrupts. 2007-06-16 15:03:33 +00:00
cognet
2349f48ce0 Introduce pmap_kenter_supersection(), which maps 16MB super-sections into
the kernel pmap.
Document a bit more the behavior of the xscale core 3.
2007-06-11 21:29:26 +00:00
imp
eed16ca559 Fix a spacing nit. 2007-06-11 19:36:37 +00:00
cognet
4042d45aba Initialize the dma tag's bounce_zone to NULL if we didn't allocate it. 2007-06-10 12:33:01 +00:00
marcel
75588c5a15 Add kdb_cpu_sync_icache(), intended to synchronize instruction
caches with data caches after writing to memory. This typically
is required to make breakpoints work on ia64 and powerpc. For
those architectures the function is implemented.
2007-06-09 21:55:17 +00:00
cognet
1f72bba084 There's no nobounce_dmamap on arm. 2007-06-07 21:51:09 +00:00
jeff
fe66d0ac91 - PCPU_ADD is no longer spelled with LAZY_ in the middle.
Submitted by:	attilio
2007-06-06 23:23:47 +00:00
jeff
be3241715a - Change comments and asserts to reflect the removal of the global
scheduler lock.

Tested by:      kris, current@
Tested on:      i386, amd64, ULE, 4BSD, libthr, libkse, PREEMPTION, etc.
Discussed with: kris, attilio, kmacy, jhb, julian, bde (small parts each)
2007-06-04 23:57:32 +00:00
attilio
e333d0ff0e Rework the PCPU_* (MD) interface:
- Rename PCPU_LAZY_INC into PCPU_INC
- Add the PCPU_ADD interface which just does an add on the pcpu member
  given a specific value.

Note that for most architectures PCPU_INC and PCPU_ADD are not safe.
This is a point that needs some discussions/work in the next days.

Reviewed by: alc, bde
Approved by: jeff (mentor)
2007-06-04 21:38:48 +00:00
marcel
c118c8a64b Revert to the previous version where the return value of uart_getenv()
is being ignored. It's optional and the lack of environment variable
is not an error condition.
2007-06-04 17:53:42 +00:00
alc
ccfe66d477 Add the machine-specific definitions for configuring the new physical
memory allocator.

Approved by:	re
2007-06-04 08:02:22 +00:00
attilio
7dd8ed88a9 Revert VMCNT_* operations introduction.
Probabilly, a general approach is not the better solution here, so we should
solve the sched_lock protection problems separately.

Requested by: alc
Approved by: jeff (mentor)
2007-05-31 22:52:15 +00:00
piso
42dfc78150 In some particular cases (like in pccard and pccbb), the real device
handler is wrapped in a couple of functions - a filter wrapper and an
ithread wrapper. In this case (and just in this case), the filter
wrapper could ask the system to schedule the ithread and mask the
interrupt source if the wrapped handler is composed of just an ithread
handler: modify the "old" interrupt code to make it support
this situation, while the "new" interrupt code is already ok.

Discussed with: jhb
2007-05-31 19:25:35 +00:00
jhay
410f244e4f Remove the hardcoded IXP425_UART?_VBASE values in the
uart_ixp425_probe() and uart_cpu_getdev(). Change
uart_cpu_getdev() to use hints to find the console.

Reviewed by:	marcel
2007-05-29 18:10:42 +00:00
yongari
f53195d29a Honor maxsegsz of less than a page size in a DMA tag. Previously it
used to return PAGE_SIZE without respect to restrictions of a DMA tag.
This affected all of the busdma load functions that use
_bus_dmamap_loader_buffer() as their back-end.

Reviewed by:	scottl
2007-05-29 06:30:26 +00:00
alc
1dfb7ec904 Eliminate some unused definitions that came from NetBSD. 2007-05-28 21:04:22 +00:00
jhay
069f479480 We do not need to get the irq out of ivars in ixp425_setup_intr(). By
this time they have already been set. In fact trying to set it here too
breaks irqs for pci devices.
2007-05-28 18:54:08 +00:00
jhay
87f87ebe96 Optimize a bit more, both the Avila and Pronghorn Metro boards work with
GPIO_TYPE_EDG_RISING.

Reviewed by:	sam
2007-05-28 18:45:16 +00:00
sam
fb9dbcd056 Search for a proper ucode image to use by incrementing the minor
release number up to the max.  This should eliminate the need to
tweak the default imageid define for later releases that are found
on the Intel web site.

MFC after:	1 month
2007-05-24 16:31:22 +00:00
sam
daab632c06 o add hints for avila boards; brings back i2c devices lost when iicbus
started using hints instead of wired down device enumeration
o add usb commented out; will enable when support works

MFC after:	1 month
2007-05-24 16:27:48 +00:00
sam
b8a3a47186 Move to hints for configuring numerous devices so we can eliminate various
quirky code: uarts, led, cf/ide, ixpqmgr, npe are now specified with hints.

May want to put some of these devices back in the code and just use hints
to override/specify configuration.

MFC after:	1 month
2007-05-24 16:25:49 +00:00
sam
96b2598c74 Don't muck with the internal state of a uart during probe, all we
should setup is the class.  This corrects an issue where enabling
uart1 on the avila board caused uart0 to stop working during boot
(no msgs generated by rc scripts were displayed).

Reviewed by:	imp
MFC after:	3 weeks
2007-05-24 16:17:51 +00:00
sam
7a7c4c420a Fix interrupt setup; rev 1.3 switched the irq to GPIO_TYPE_ACT_LOW
but this does not work on avila boards; special case them to use
GPIO_TYPE_EDG_RISING.

MFC after:	3 weeks
Submitted by:	jhay
2007-05-24 16:15:20 +00:00
cognet
8e2721e190 Remove duplicate includes.
Submitted by:   Cyril Nguyen Huu <cyril ci0 org>
2007-05-23 13:21:57 +00:00
kan
4c2d706212 Allow FreeBSD's native ELF image activators to execute shared libraries the
same way it was enabled for Linux binares in linuxulator.

This allows binaries built with -pie. Many ports auto-detect -fPIE support
in GCC 4.2 and build binaries FreeBSD was unable to run.
2007-05-22 02:22:58 +00:00
cognet
643c457209 Use __mcount() instead of _mcount() to reduce diffs with NetBSD. 2007-05-19 16:20:37 +00:00
cognet
48f705d2cd Constify to please gcc 4.2. 2007-05-19 13:32:58 +00:00
cognet
f3ab1245c9 Do not try to inline pmap_kremove(), as it's exported. 2007-05-19 13:21:41 +00:00
cognet
18046753b1 Do not try to inline bus_dmamap_sync_buf(), gcc 4.2 doesn't want to do so
because it uses alloca().
Initialize lastaddr in bus_dmamap_load_uio().
2007-05-19 13:17:31 +00:00
cognet
6e70ec73e9 Switch the kernel's pmap domain from 15 to 0.
This should be a no-op, and this is needed for xscale core 3 supersections
support, as they are always part of the domain 0
2007-05-19 12:47:34 +00:00
jeff
e1996cb960 - define and use VMCNT_{GET,SET,ADD,SUB,PTR} macros for manipulating
vmcnts.  This can be used to abstract away pcpu details but also changes
   to use atomics for all counters now.  This means sched lock is no longer
   responsible for protecting counts in the switch routines.

Contributed by:		Attilio Rao <attilio@FreeBSD.org>
2007-05-18 07:10:50 +00:00
alc
b34f6f7ab1 Define every architecture as either VM_PHYSSEG_DENSE or
VM_PHYSSEG_SPARSE depending on whether the physical address space is
densely or sparsely populated with memory.  The effect of this
definition is to determine which of two implementations of
vm_page_array and PHYS_TO_VM_PAGE() is used.  The legacy
implementation is obtained by defining VM_PHYSSEG_DENSE, and a new
implementation that trades off time for space is obtained by defining
VM_PHYSSEG_SPARSE.  For now, all architectures except for ia64 and
sparc64 define VM_PHYSSEG_DENSE.  Defining VM_PHYSSEG_SPARSE on ia64
allows the entirety of my Itanium 2's memory to be used.  Previously,
only the first 1 GB could be used.  Defining VM_PHYSSEG_SPARSE on
sparc64 allows USIIIi-based systems to boot without crashing.

This change is a combination of Nathan Whitehorn's patch and my own
work in perforce.

Discussed with: kmacy, marius, Nathan Whitehorn
PR:		112194
2007-05-05 19:50:28 +00:00
kevlo
ae8910aaa7 Remove sa1_cache_clean_addr. It isn't needed. 2007-05-03 09:51:12 +00:00
marcel
f30daf4b49 Don't expose the uart_ops structure directly, but instead have
it obtained through the uart_class structure. This allows us
to declare the uart_class structure as weak and as such allows
us to reference it even when it's not compiled-in.
It also allows is to get the uart_ops structure by name, which
makes it possible to implement the dt tag handling in uart_getenv().
The side-effect of all this is that we're using the uart_class
structure more consistently which means that we now also have
access to the size of the bus space block needed by the hardware
when we map the bus space, eliminating any hardcoding.
2007-04-02 22:00:22 +00:00
n_hibma
2e4f7510d9 Revisit the watchdogs: Resetting the error to EINVAL after failing to set the
watchdog might hide the succesful arming of an earlier one. Accept that on
failing to arm any watchdog (because of non-supported timeouts) EOPNOTSUPP is
returned instead of the more appropriate EINVAL.

MFC after:	3 days
2007-03-27 21:03:37 +00:00
kevlo
c93478d4b1 Don't map mini-data cache page since ARM920T doesn't have it. 2007-03-27 06:29:19 +00:00
imp
dbeaed2a56 Default to booting off the SD card. It is more useful, and a full
FreeBSD/arm installworld install is only 170MB.  The smallest SD card
I could find at the store today was 512MB (and it was only $10 after
rebate), with a 2GB card for as low as $25.00...

Now that the IIC stuff has been sorted out, include that as well.
Include hints for the icee 16kb 16-bit i2c device.  It should include
info about the temperature sensor as well, but that driver isn't quite
ready.

Add bpf for dhclient happiness.

MFC After: 1 week
2007-03-23 23:47:59 +00:00
imp
9e26c86850 MFp4: A bunch of patches from myself and Tisco to improve the
robustness of IIC transactions when parts aren't present.  This also
removes a bunch of debug.  This also moves this driver to 7-1
addressing rather than 6-0 addressing, which is more inline with all
the other iic drivers in the tree.  I've tested this for about a
million years on the systems at work.
2007-03-23 22:57:24 +00:00
kevlo
042b3d4a6d Fix a comment 2007-03-21 07:49:56 +00:00
kevlo
44a4513fbb Remove __P 2007-03-21 03:28:16 +00:00
jhay
04128426ca Map the second CS of the compact flash too. This allow us access to
the alternate status and the control registers. Remove the local
version of ata_reset.

Add support for the ADI Pronghorn Metro boards. They use CS3 and CS4
instead of Avila's CS1 and CS2.
2007-03-14 19:03:07 +00:00