35 Commits

Author SHA1 Message Date
jhb
2463f40fc3 Introduce a standard name for the lock protecting an interrupt controller
and it's associated state variables: icu_lock with the name "icu".  This
renames the imen_mtx for x86 SMP, but also uses the lock to protect
access to the 8259 PIC on x86 UP.  This also adds an appropriate lock to
the various Alpha chipsets which fixes problems with Alpha SMP machines
dropping interrupts with an SMP kernel.
2001-12-20 23:48:31 +00:00
jhb
be9d34abc8 INTREN() and INTRDIS() have been MP safe for a while. Don't say that they
are "soon to be" MP safe in the comments.
2001-08-24 16:51:47 +00:00
jake
fbf342ab77 Remove the leading underscore from all symbols defined in x86 asm
and used in C or vice versa.  The elf compiler uses the same names
for both.  Remove asnames.h with great prejudice; it has served its
purpose.

Note that this does not affect the ability to generate an aout kernel
due to gcc's -mno-underscores option.

moral support from:	peter, jhb
2001-02-25 06:29:04 +00:00
peter
92c9bab52b Move io_apic_{read,write} from apic_ipl.s (where they do not belong) into
mpapic.c.  This gives us the benefit of C type checking.  These functions
are not called in any critical paths and are not used by the interrupt
routines.
2000-12-06 01:04:02 +00:00
peter
2d9ab18849 GC unused assembler function apic_eoi() 2000-12-06 00:38:04 +00:00
peter
8bd975051e Cleanup some leftover lint from the old interrupt system.
Also, while here, run up to 32 interrupt sources on APIC systems.
Normalize INTREN/INTRDIS so they are the same on both UP and SMP systems
rather than sometimes a macro, and sometimes a function.

Reviewed by:  jhb, jakeb
2000-12-04 21:15:14 +00:00
ps
ab88cc6719 Remove the NCPU, NAPIC, NBUS, NINTR config options. Make NAPIC,
NBUS, NINTR dynamic and set NCPU to a maximum of 16 under SMP.

Reviewed by:	peter
2000-09-22 23:40:10 +00:00
jasone
769e0f974d Major update to the way synchronization is done in the kernel. Highlights
include:

* Mutual exclusion is used instead of spl*().  See mutex(9).  (Note: The
  alpha port is still in transition and currently uses both.)

* Per-CPU idle processes.

* Interrupts are run in their own separate kernel threads and can be
  preempted (i386 only).

Partially contributed by:	BSDi (BSD/OS)
Submissions by (at least):	cp, dfr, dillon, grog, jake, jhb, sheldonh
2000-09-07 01:33:02 +00:00
dillon
689641c1ea Commit major SMP cleanups and move the BGL (big giant lock) in the
syscall path inward.  A system call may select whether it needs the MP
    lock or not (the default being that it does need it).

    A great deal of conditional SMP code for various deadended experiments
    has been removed.  'cil' and 'cml' have been removed entirely, and the
    locking around the cpl has been removed.  The conditional
    separately-locked fast-interrupt code has been removed, meaning that
    interrupts must hold the CPL now (but they pretty much had to anyway).
    Another reason for doing this is that the original separate-lock for
    interrupts just doesn't apply to the interrupt thread mechanism being
    contemplated.

    Modifications to the cpl may now ONLY occur while holding the MP
    lock.  For example, if an otherwise MP safe syscall needs to mess with
    the cpl, it must hold the MP lock for the duration and must (as usual)
    save/restore the cpl in a nested fashion.

    This is precursor work for the real meat coming later: avoiding having
    to hold the MP lock for common syscalls and I/O's and interrupt threads.
    It is expected that the spl mechanisms and new interrupt threading
    mechanisms will be able to run in tandem, allowing a slow piecemeal
    transition to occur.

    This patch should result in a moderate performance improvement due to
    the considerable amount of code that has been removed from the critical
    path, especially the simplification of the spl*() calls.  The real
    performance gains will come later.

Approved by: jkh
Reviewed by: current, bde (exception.s)
Some work taken from: luoqi's patch
2000-03-28 07:16:37 +00:00
peter
3b842d34e8 $Id$ -> $FreeBSD$ 1999-08-28 01:08:13 +00:00
peter
8858fe3aec It would help if things that MUST be 32 bit aligned were really 32 bit
aligned.  If I recall correctly, this is to ensure apic_imen can be
accessed in a single bus cycle.  Also, use TEXT_ALIGN rather than a
.align 2 (which means 2 byte align on ELF and 4 byte align on a.out)
1999-08-25 23:42:02 +00:00
bde
76b6611489 Go back to the old (icu.s rev.1.7 1993) way of keeping the AST-pending
bit separate from ipending, since this is simpler and/or necessary for
SMP and may even be better for UP.

Reviewed by:	alc, luoqi, tegge
1999-07-10 15:28:01 +00:00
alc
29ea153b13 An SMP-specific change: Add the lock prefix to RMW operations
on ipending.
1999-07-03 06:33:48 +00:00
tegge
f800e1dc81 When trying to enable or disable an interrupt not described by the mp table,
just return instead of dereferencing a null pointer.
1999-04-10 19:22:17 +00:00
tegge
857a03a573 Maintain a mapping from irq number to (ioapic number, int pin) tuple,
and use this when masking/unmasking interrupts.

Maintain a mapping from (iopaic number, int pin) tuple to irq number,
and use this when configuring devices and programming the ioapics.

Previous code assumed that irq number was equal to int pin number, and
that the ioapic number was 0.

Don't let an AP enter _cpu_switch before all local apics are initialized.
1998-09-06 22:41:42 +00:00
bde
577b83a70e Implemented dynamic registration of software interrupt handlers. Not
used yet.

Use dummy SWI handlers to avoid some checks for null pointers.
1998-08-11 15:08:13 +00:00
tegge
3135dafcdb Mask the interrupt before setting the corresponding bit in ipending if
the interrupt is already active.
Don't use lock prefix for operations on ipending.
Always use lock prefix for operations on iactive.
1998-04-22 22:49:29 +00:00
tegge
eaaa067364 Remove special handling for resuming clock interrupt when using APIC_IO.
The `generic' vector stubs do the right thing.
1998-03-05 21:45:53 +00:00
tegge
9f3982f0f6 When entering the apic version of slow interrupt handler, level
interrupts are masked, and EOI is sent iff the corresponding ISR bit
is set in the local apic. If the CPU cannot obtain the interrupt
service lock (currently the global kernel lock) the interrupt is
forwarded to the CPU holding that lock.

Clock interrupts now have higher priority than other slow interrupts.
1998-03-03 22:56:30 +00:00
tegge
ba494eff3a Add support for low resolution SMP kernel profiling.
- A nonprofiling version of s_lock (called s_lock_np) is used
    by mcount.

  - When profiling is active, more registers are clobbered in
    seemingly simple assembly routines. This means that some
    callers needed to save/restore extra registers.

  - The stack pointer must have space for a 'fake' return address
    in idle, to avoid stack underflow.
1997-12-15 02:18:35 +00:00
fsmp
877f33cf60 General cleanup of the lock pushdown code. They are grouped and enabled
from machine/smptests.h:

#define PUSHDOWN_LEVEL_1
#define PUSHDOWN_LEVEL_2
#define PUSHDOWN_LEVEL_3
#define PUSHDOWN_LEVEL_4_NOT
1997-09-07 22:04:09 +00:00
fsmp
13fe237edc Support for the new FAST_HI algorithm, enabled.
Preliminary support for the INTR_SIMPLELOCK algorithm, disabled.
Note that this code is NOT ready.
1997-08-29 18:45:23 +00:00
fsmp
618ef60cbd The last of the encapsolation of cpl/spl/ipending things into a critical
region protected by the simplelock 'cpl_lock'.

Notes:

 - this code is currently controlled on a section by section basis with
   defines in machine/param.h.  All sections are currently enabled.

 - this code is not as clean as I would like, but that can wait till later.

 - the "giant lock" still surrounds most instances of this "cpl region".
   I still have to do the code that arbitrates setting cpl between the
   top and bottom halves of the kernel.

 - the possibility of deadlock exists, I am committing the code at this
   point so as to exercise it and detect any such cases B4 the "giant lock"
   is removed.
1997-08-24 00:05:37 +00:00
fsmp
50236db533 Made PEND_INTS default.
Made NEW_STRATEGY default.
Removed misc. old cruft.

Centralized simple locks into mp_machdep.c
Centralized simple lock macros into param.h

More cleanup in the direction of making splxx()/cpl MP-safe.
1997-08-21 05:08:25 +00:00
fsmp
2c414e3eff Preperation for moving cpl into critical region access.
Several new fine-grained locks.
New FAST_INTR() methods:
 - separate simplelock for FAST_INTR, no more giant lock.
 - FAST_INTR()s no longer checks ipending on way out of ISR.
sio made MP-safe (I hope).
1997-08-20 05:25:48 +00:00
fsmp
b816202ef3 Fixed imen alignment.
Submitted by:	Bruce Evans <bde@zeta.org.au>
1997-07-31 17:28:56 +00:00
fsmp
176a721ba4 Removed the simplelock functions.
Cleaned up the other functions.
1997-07-24 23:49:44 +00:00
fsmp
68126f0545 Fixed possible deadlock from recursive INTs on same cpu. Since
we use lazy masking INTREN()/INTRDIS() might be called with INTs enabled.
This means another higher prio INT to the same cpu could attempt to
re-enter the critical region, but would spin waiting for the lock.  Since
it is the owner, it would deadlock.
1997-07-23 21:25:31 +00:00
fsmp
31c730f3a6 New simple_lock code in asm:
- s_lock_init()
 - s_lock()
 - s_lock_try()
 - s_unlock()

Created lock for IO APIC and apic_imen  (SMP version of imen)
 - imen_lock

Code to use imen_lock for access from apic_ipl.s and apic_vector.s.
Moved this code *outside* of mp_lock.

It seems to work!!!
1997-07-23 20:47:19 +00:00
fsmp
53d4b25b15 Coded simple_lock and friends in asm. 1997-07-23 05:49:19 +00:00
fsmp
5a26b1bcd7 Last commit didn't take, operator error??? 1997-07-22 20:12:32 +00:00
fsmp
2ac3ad1fd3 Developed a new strategy for handling the 8254/8259/APIC issue. 1997-07-20 19:41:38 +00:00
fsmp
74e8279498 Added #code to support define APIC_PIN0_TIMER.
This code ALWAYS runs the 8254 timer thru the 8259 ICU.
It depricates the usage of "options SMP_TIMER_NC" in the config file.
1997-07-19 03:59:28 +00:00
fsmp
74f362861c SMP or APIC_IO:
- Increased NIDT to 256.
 - Moved IPI vectors up above the linux compat vector.
 - Removed runtime setup of RTC vector.
1997-07-19 02:28:30 +00:00
fsmp
be6c5ef7bc Split vector.s into UP and SMP specific files:
- vector.s		<- stub called by i386/exception.s
 - icu_vector.s		<- UP
 - apic_vector.s	<- SMP

Split icu.s into UP and SMP specific files:
 - ipl.s		<- stub called by i386/exception.s (formerly icu.s)
 - icu_ipl.s		<- UP
 - apic_ipl.s		<- SMP

This was done in preparation for massive changes to the SMP INTerrupt
mechanisms.  More fine tuning, such as merging ipl.s into exception.s,
may be appropriate.
1997-05-26 17:58:27 +00:00