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259 Commits

Author SHA1 Message Date
rnoland
0c27368296 vm_offset_t is unsigned, so compare of >= 0 is not needed. 
Found with:	Coverity Prevent(tm)
CID:		2259

MFC after:	3 days
 2009-03-20 18:35:16 +00:00
rnoland
b1f84dee06 Remove the DRM_ERROR to fix build. It didn't make any sense anyway. 
MFC after:	3 days
 2009-03-20 18:01:32 +00:00
rnoland
20b6095aac Fix what appears to be a typo, and restore the registers correctly. 
Found with:	Coverity Prevent(tm)
CID: 		2454
 2009-03-20 17:51:26 +00:00
rnoland
1d4e991616 Don't deref dev->dev_private before checking that it exists. 
Found with:	Coverity Prevent(tm)
CID:		2940

MFC after:	3 days
 2009-03-20 17:48:36 +00:00
rnoland
895053fb73 Only issue the wakeup and store the counter if vblank is enabled on 
the pipe.

MFC after:	3 days
 2009-03-20 04:53:12 +00:00
rnoland
2a1f86a975 Add a couple of radeon pci ids. 
MFC after:	3 days
 2009-03-20 04:49:48 +00:00
rnoland
074d756fc9 Adjust the flags to bus_dmamem around here too. 
MFC after:	3 days
 2009-03-20 04:48:27 +00:00
rnoland
d310eb36e2 Add some debugging so I can see when syscalls are being restarted 
consistantly.  After a lengthy irc discussion it seems like we
shouldn't need to worry about them, but it's nice to know about.

MFC after:	3 days
 2009-03-19 08:36:08 +00:00
rnoland
eadbcd8e34 Rework vblank handling to try to resolve some reports of "slow" windows 
after vt switch or suspend.  I can't really test this on Intel right now
but I think I've heard reports of it on radeon as well.  I can't break
it on the radeon here.

MFC after:	3 days
 2009-03-19 08:34:04 +00:00
rnoland
45592455be Sync up the rest of the code that we use with what Intel is shipping 
-Some irq/vblank related changes that hopefully will help.
	-A little more cleanup while I'm here.

MFC after:	3 days
 2009-03-19 08:28:36 +00:00
rnoland
78db4b9606 Pull in some suspend / resume changes from Intel's code 
Tested by:	mav@
MFC after:	3 days
 2009-03-19 08:22:56 +00:00
rnoland
b18e0f5075 Cast to (unsigned long) to make printf happy on i386 
MFC after:	3 days
 2009-03-17 05:10:12 +00:00
rnoland
6c3703e6cd Add support for matching solely on vendor id. 
We will use this method with nouveau

MFC after:	3 days
 2009-03-17 03:53:44 +00:00
rnoland
224f04f590 Improve the debugging output of drm_mmap 
MFC after:	3 days
 2009-03-17 03:50:35 +00:00
rnoland
9993b42fe9 Add list_for_each_prev to our linux compatibility. 
We need this for nouveau

MFC after:	3 days
 2009-03-17 03:49:24 +00:00
rnoland
209dd0d752 Minor code cleanup 
MFC after:	3 days
 2009-03-17 03:46:37 +00:00
rnoland
437af23ffa We can have more than 3 pci resources 
MFC after:	3 days
 2009-03-17 03:44:36 +00:00
rnoland
12867b8e80 Cast register maps and offsets to vm_offset_t 
MFC after:	3 days
 2009-03-17 03:39:09 +00:00
rnoland
f718488412 Change the logic around to match ati_pcigart. 
MFC after:	3 days
 2009-03-17 03:36:24 +00:00
rnoland
a1322394c1 Use flsl() here rather than ffsl() 
I discovered that we were computing page_order differently than linux.

MFC after:	3 days
 2009-03-17 03:32:12 +00:00
rnoland
8e5cd6f1a0 Use the right MSI_REARM for RS600. 
MFC after:	3 days
 2009-03-16 19:09:59 +00:00
rnoland
6822cdf607 Get rid of any remaining PZERO flags in mtx_sleep() 
Also, clean up some ifdef mess while I'm here.

MFC after:	3 days
 2009-03-16 08:19:11 +00:00
rnoland
b65366a14a Fix R600 writeback across suspend/resume. 
This is likely a NOOP for us, since I haven't ported the suspend/resume
code yet.

MFC after:	3 days
 2009-03-16 08:15:35 +00:00
rnoland
084103fa7c Consistently use kdev for the kernel device. 
Submitted by:	vehemens <vehemens@verizon.net>
MFC after:	3 days
 2009-03-09 07:55:18 +00:00
rnoland
7d9d797109 Clean up the printing on amd64. Should also be consistent on i386. 
MFC after:	3 days
 2009-03-09 07:50:27 +00:00
rnoland
684aefd788 There is no need to sync these buffers to swap. 
MFC after:	3 days
 2009-03-09 07:49:13 +00:00
rnoland
10f014e6a9 Change the flags to bus_dmamem around to allow it to sleep waiting for 
resources during allocation, but not during map load.  Also, zero the
buffers here.

MFC after:	3 days
 2009-03-09 07:47:03 +00:00
rnoland
e227ee6ba8 Fix the flags to bus_dmamem_* to allow the allocation to sleep while 
waiting for resources.  It is really the load that we can't defer.
BUS_DMA_NOCACHE belongs on bus_dmamap_load() as well.

MFC after:	3 days
 2009-03-09 07:38:22 +00:00
rnoland
d19cf7a6d0 -Make the PCI(E)/AGP calculations consistent 
-Calculate the scratch address correctly

MFC after:	10 days
 2009-03-09 07:33:35 +00:00
rnoland
a7840d9936 Call the right function for the right chipset. 
MFC after:	10 days
 2009-03-09 07:24:32 +00:00
rnoland
67b6c21b74 Import support for ATI Radeon R600 and R700 series chips. 
Tested on an HD3850 (RV670) on loan from Warren Block.

Currently, you need one of the following for this to be useful:

	x11-drivers/xf86-video-radeonhd-devel (not tested)
	xf86-video-ati from git (EXA works, xv is too fast)
	xf86-video-radeonhd from git (EXA works, xv works)

There is no 3d support available from dri just yet.

MFC after:	2 weeks
 2009-03-07 21:36:57 +00:00
rnoland
ddd5c68e84 Initialize the vblank structures at load time. Previously we did this 
at irq install/uninstall time, but when we vt switch, we uninstall the
irq handler.  When the irq handler is reinstalled, the modeset ioctl
happens first.  The modeset ioctl is supposed to tell us that we can
disable vblank interrupts if there are no active consumers.  This will
fail after a vt switch until another modeset ioctl is called via dpms
or xrandr.  Leading to cases where either interrupts are on and can't
be disabled, or worse, no interrupts at all.

MFC after:	2 weeks
 2009-02-28 02:37:55 +00:00
rnoland
e9bc5839af Add a tuneable to allow disabling msi on drm at runtime. 
Suggested by:	jhb@

MFC after:	2 weeks
 2009-02-27 23:50:55 +00:00
rnoland
01cc5b6616 Fix up some ioctl permissions issues long overlooked. 
Submitted by:	jkim@
MFC after:	2 weeks
 2009-02-27 06:01:42 +00:00
rnoland
35f0e5ba8f The GM45 handles vblank differently. Pull the changes from Intel in. 
MFC after:	2 Weeks
 2009-02-25 20:24:13 +00:00
rnoland
4abf3eb200 Remove D_NEEDGIANT. 
MFC after:	2 weeks
 2009-02-25 18:56:49 +00:00
rnoland
6a02e32ede Turn on MSI if the card supports it. There is a blacklist for chips 
which report that they are capable of MSI, but don't work correctly.

MFC after:	2 weeks
 2009-02-25 18:54:35 +00:00
rnoland
ede7b46946 Prepare the radeon driver for MSI support. 
MFC after:	2 weeks
 2009-02-25 18:50:35 +00:00
rnoland
8df73af328 Add some vblank related debugging and replace the DRM_WAIT_ON macro 
with a localized version.

MFC after:	2 weeks
 2009-02-25 18:48:33 +00:00
rnoland
ca01a44d40 This was part of a sync to the code that Intel is shipping in linux. 
- Remove the old TTM interface
	- Move register definitions to i915_reg.h
	- Overhaul the irq handler

MFC after:	2 weeks
 2009-02-25 18:44:50 +00:00
rnoland
12840cf005 The i915 driver was the only consumer of locked task support. 
Now that it doesn't use it anymore, get right of the taskqueue
and locked task support.

MFC after:	2 weeks
 2009-02-25 18:25:47 +00:00
rnoland
577eb25e17 The vblank_swap ioctl was fundamentally race prone. Get rid of it. 
MFC after:	2 weeks
 2009-02-25 18:22:57 +00:00
rnoland
69ae0a399c There is no reason to hold the lock here. 
When I was LOCK_PROFILING this was pretty high up and there is no
reason for it.

MFC after:	2 weeks
 2009-02-25 18:19:16 +00:00
rnoland
1e7c6ababe Remove the PZERO priority from mtx_sleep. 
MFC after:	2 weeks
 2009-02-25 18:16:50 +00:00
rnoland
8672278c6f Only set registers if irqs are enabled 
Approved by:	kib
Obtained from:	drm git
 2008-12-23 22:53:57 +00:00
rnoland
ce8ac85e5f Convert DRM_[DEBUG,ERROR,INFO] macros to c99 __VA_ARGS__. 
Approved by:	kib
 2008-12-21 22:32:01 +00:00
rnoland
2a643b0269 Garbage collect entries from pcireg.h since we now include it. 
Approved by:	kib@
MFC after:	2 weeks
 2008-12-18 22:01:46 +00:00
rnoland
1b619f003f We only want drm to ever attach to the primary pci device. 
Intel 855 chips present the same pci id for both heads.  This prevents
us from attaching to the dummy second head.  All other chips that I
am aware of either only present a single pci id, or different ids
for each head so that we only match on the correct head.

Approved by:	kib@
MFC after:	2 weeks
 2008-12-18 21:58:57 +00:00
rnoland
3e6eb1349a rework drm_scatter.c which allocates scatter / gather pages for use by 
ati pci gart to use bus_dma to handle the allocations.  This fixes
a garbled screen issue on at least some radeons (X1400 tested).  It is
also likely that this is the correct fix for PR# 119324, though that
is not confirmed yet.

Reviewed by:	jhb@ (mentor, prior version)
Approved by:	kib@
MFC after:	2 weeks
 2008-12-18 21:04:50 +00:00
rnoland
ae1f87d8c5 Fix error in busmaster enable logic 
rs400/rs480 should clear the RADEON_BUS_MASTER_DIS bit.  This should get
the rs485 IGP chips going again.

Approved by:	jhb (mentor)
Obtained from:	drm git master
 2008-10-27 21:24:34 +00:00