Commit Graph

1384 Commits

Author SHA1 Message Date
kib
bd7f0fa0bb Reform the busdma API so that new types may be added without modifying
every architecture's busdma_machdep.c.  It is done by unifying the
bus_dmamap_load_buffer() routines so that they may be called from MI
code.  The MD busdma is then given a chance to do any final processing
in the complete() callback.

The cam changes unify the bus_dmamap_load* handling in cam drivers.

The arm and mips implementations are updated to track virtual
addresses for sync().  Previously this was done in a type specific
way.  Now it is done in a generic way by recording the list of
virtuals in the map.

Submitted by:	jeff (sponsored by EMC/Isilon)
Reviewed by:	kan (previous version), scottl,
	mjacob (isp(4), no objections for target mode changes)
Discussed with:	     ian (arm changes)
Tested by:	marius (sparc64), mips (jmallet), isci(4) on x86 (jharris),
	amd64 (Fabian Keil <freebsd-listen@fabiankeil.de>)
2013-02-12 16:57:20 +00:00
marius
fb83414a6e Improve r238673 to additionally allow for odd-aligned buffers as
passed in by smartd of smartmontools.
While at it, hint the compiler that 32-bit PIO is the most likely
case (idea from Linux) and use bus_{read,write}_stream_2(9) instead
of bus_{read,write}_multi_stream_2(9) for single count reads/writes.

MFC after:	1 week
2013-02-02 21:57:06 +00:00
mav
bd2a8ea6d8 In case somebody still use it, fix legacy ataraid(4) to work on combined
PATA+AHCI controllers, such as JMicron JMB363.

PR:		kern/159271
MFC after:	1 week
2013-01-15 02:18:04 +00:00
jfv
661fe34689 Add Intel Lynx Point PCH SATA Controller Device IDs 2013-01-02 22:26:46 +00:00
mav
54156ad826 Add IDs for SATA controllers on AMD Hudson-2 series chipsets.
I am not exactly sure about the naming due to lack of specs on AMD site,
but it is better to have some identification then none at all.

MFC after:	1 month
2012-12-12 11:53:15 +00:00
dim
373133f0ad Remove duplicate const specifiers in many drivers (I hope I got all of
them, please let me know if not).  Most of these are of the form:

static const struct bzzt_type {
	[...list of members...]
} const bzzt_devs[] = {
	[...list of initializers...]
};

The second const is unnecessary, as arrays cannot be modified anyway,
and if the elements are const, the whole thing is const automatically
(e.g. it is placed in .rodata).

I have verified this does not change the binary output of a full kernel
build (except for build timestamps embedded in the object files).

Reviewed by:	yongari, marius
MFC after:	1 week
2012-11-05 19:16:27 +00:00
mav
61059593f6 Only four specific ATA PIO commands transfer several sectors per DRQ block
(interrupt).  All other ATA PIO commands transfer one sector or 512 bytes
at one time.  Hardcode these exceptions in ata(4) with ATA_CAM option.
This fixes timeout of READ LOG EXT command used by `smartctl -x /dev/adaX`.
2012-11-01 00:09:01 +00:00
mav
cca98d66c9 Implement CAM_ATAIO_NEEDRESULT (fetching full set of result registers) for
ata(4) driver in ATA_CAM mode.  That slighty improves error reporting and
also should fix `smartctl -l scterc /dev/adaX` operation.

MFC after:	3 weeks
2012-10-26 20:03:08 +00:00
mav
33a3526a8c Add checks for ata_sata_scr_read() return statuses. It is mostly to silence
Clang Static Analyzer warnings as errors there are usually unlikely.
2012-10-10 17:51:23 +00:00
mav
5b8c32a59f Fix build without options ATA_CAM, broken by r241144. 2012-10-03 12:43:26 +00:00
mav
63f83ebad9 Implement SATA revision (speed) control for legacy SATA controller for
both boot (via loader tunables) and run-time (via `camcontrol negotiate`).
Tested to work at least on NVIDIA MCP55 chipset.

H/w provided by:	glebius
2012-10-02 22:03:21 +00:00
kevlo
6568ceefaf Remove bogus break statements.
Obtained from:	DragonFly
2012-09-18 02:19:43 +00:00
mav
2ae0055aac Add IDs for JMicron JMB360/JMB362 AHCI SATA controllers.
MFC after:	1 week
2012-08-30 15:23:59 +00:00
mav
5793dc9994 Use 16bit PIO instead of 32bit in case of misaligned buffer.
It fixes kernel panic during CD write with cdrecord on sparc64.
2012-07-21 14:59:43 +00:00
mav
7ed4ca8337 Fix typo in bzero length argument during sense fetching.
For me it at least fixed CD burning in PIO mode.

MFC after:	3 days
2012-07-21 08:19:43 +00:00
eadler
38e8d76697 Remove variables which are initialized but never used thereafter
reported by gcc46 warning

Approved by:	cperciva
MFC after:	1 week
2012-07-07 17:20:52 +00:00
marius
924ef2a7f3 - As a baind-aid, disable ATAPI DMA when using ATA_CAM for these controllers
as well as it causes the kernel to hang during boot.
  Reported and tested by: Kevin Oberman
- Use NULL instead of 0 for a pointer.

MFC after:	3 days
2012-06-14 22:19:23 +00:00
mav
6450bdd899 Partially revert r236666:
Return PROTO_ATA protocol in response to XPT_PATH_INQ.

smartmontools uses it to identify ATA devices and I don't know any other
place now where it is important. It could probably use XPT_GDEV_TYPE
instead for more accurate protocol information, but let it live for now.

Reported by:	matthew
MFC after:	3 days
2012-06-10 11:17:14 +00:00
mav
ee6412e858 ATA/SATA controllers have no idea about protocol of the connected device
until transport will do some probe actions (at least soft reset).
Make ATA/SATA SIMs to not report bogus and confusing PROTO_ATA protocol.
Make ATA/SATA transport to fill that gap by reporting protocol to SIM with
XPT_SET_TRAN_SETTINGS and patching XPT_GET_TRAN_SETTINGS results if needed.
2012-06-06 06:52:51 +00:00
mav
b9ef440fcd Make legacy ATA to not call device_add_child() with unit number but
without driver name. This fixed legacy ATA breakage by r235978.

MFC after:	1 week
2012-05-28 14:33:15 +00:00
mav
693ceab23e Add two functions xpt_batch_start() and xpt_batch_done() to the CAM SIM KPI
to allow drivers to handle request completion directly without passing
them to the CAM SWI thread removing extra context switch.
Modify all ATA/SATA drivers to use them.

Reviewed by:	gibbs, ken
MFC after:	2 weeks
2012-05-12 13:55:36 +00:00
marius
cc444f6cf5 - First pass at const'ifying ata(4) as appropriate.
- Use DEVMETHOD_END.
- Use NULL instead of 0 for pointers

MFC after:	1 week
2012-03-21 16:59:39 +00:00
marius
7bb0bdde2a Remove remnants of ATA_LOCKING uses in the ATA_CAM case and wrap it
along with functions, SYSCTLs and tunables that are not used with
ATA_CAM in #ifndef ATA_CAM, similar to the existing #ifdef'ed ATA_CAM
code for the other way around. This makes it easier to understand
which parts of ata(4) actually are used in the new world order and
to later on remove the !ATA_CAM bits. It also makes it obvious that
there is something fishy with the C-bus front-end as well as in the
ATP850 support, as these used ATA_LOCKING which is defunct in the
ATA_CAM case. When fixing the former, ATA_LOCKING probably needs to
be brought back in some form or other.

Reviewed by:	mav
MFC after:	1 week
2012-03-21 08:57:15 +00:00
mav
11e7605a3d Fix names of some Marvell SATA chips. It looks like chips with proprietary
interface supported by mvs(4) are 88SX, while AHCI-like chips are 88SE.

PR:		kern/165271
Submitted by:	Jia-Shiun Li <jiashiun@gmail.com>
MFC after:	1 week
2012-03-02 08:49:07 +00:00
emaste
748cf05a77 Fix panic after "WARNING - ATA_IDENTIFY taskqueue timeout"
When performing a firmware upgrade via atacontrol[1] the subsequent
command may time out producing the error message above.  When this
happens the callout could still be active, and the system would then
panic due to a destroyed semaphore.

Instead, ensure that the callout is done first, via callout_drain.

Note that this fix applies to the "old" ata(4) and so isn't applicable
to the default configuration in HEAD.  It is still applicable to
stable/8.

[1] http://lists.freebsd.org/pipermail/freebsd-current/2012-January/031122.html

Submitted by:   Nima Misaghian
Reviewed by:    rstone, attilio, mav
Obtained from:  SVOS
MFC after:      3 days
2012-02-13 01:44:12 +00:00
marius
b9e5d2aba5 Using ATA_CAM along with ATAPI DMA causes data corruption with ALI_NEW
and CMD controllers for reasons unknown so disable it.

PR:	164226
2012-01-27 21:52:59 +00:00
uqs
d61d88a310 Convert files to UTF-8 2012-01-15 13:23:18 +00:00
ken
fce645c153 Add the CAM Target Layer (CTL).
CTL is a disk and processor device emulation subsystem originally written
for Copan Systems under Linux starting in 2003.  It has been shipping in
Copan (now SGI) products since 2005.

It was ported to FreeBSD in 2008, and thanks to an agreement between SGI
(who acquired Copan's assets in 2010) and Spectra Logic in 2010, CTL is
available under a BSD-style license.  The intent behind the agreement was
that Spectra would work to get CTL into the FreeBSD tree.

Some CTL features:

 - Disk and processor device emulation.
 - Tagged queueing
 - SCSI task attribute support (ordered, head of queue, simple tags)
 - SCSI implicit command ordering support.  (e.g. if a read follows a mode
   select, the read will be blocked until the mode select completes.)
 - Full task management support (abort, LUN reset, target reset, etc.)
 - Support for multiple ports
 - Support for multiple simultaneous initiators
 - Support for multiple simultaneous backing stores
 - Persistent reservation support
 - Mode sense/select support
 - Error injection support
 - High Availability support (1)
 - All I/O handled in-kernel, no userland context switch overhead.

(1) HA Support is just an API stub, and needs much more to be fully
    functional.

ctl.c:			The core of CTL.  Command handlers and processing,
			character driver, and HA support are here.

ctl.h:			Basic function declarations and data structures.

ctl_backend.c,
ctl_backend.h:		The basic CTL backend API.

ctl_backend_block.c,
ctl_backend_block.h:	The block and file backend.  This allows for using
			a disk or a file as the backing store for a LUN.
			Multiple threads are started to do I/O to the
			backing device, primarily because the VFS API
			requires that to get any concurrency.

ctl_backend_ramdisk.c:	A "fake" ramdisk backend.  It only allocates a
			small amount of memory to act as a source and sink
			for reads and writes from an initiator.  Therefore
			it cannot be used for any real data, but it can be
			used to test for throughput.  It can also be used
			to test initiators' support for extremely large LUNs.

ctl_cmd_table.c:	This is a table with all 256 possible SCSI opcodes,
			and command handler functions defined for supported
			opcodes.

ctl_debug.h:		Debugging support.

ctl_error.c,
ctl_error.h:		CTL-specific wrappers around the CAM sense building
			functions.

ctl_frontend.c,
ctl_frontend.h:		These files define the basic CTL frontend port API.

ctl_frontend_cam_sim.c:	This is a CTL frontend port that is also a CAM SIM.
			This frontend allows for using CTL without any
			target-capable hardware.  So any LUNs you create in
			CTL are visible in CAM via this port.

ctl_frontend_internal.c,
ctl_frontend_internal.h:
			This is a frontend port written for Copan to do
			some system-specific tasks that required sending
			commands into CTL from inside the kernel.  This
			isn't entirely relevant to FreeBSD in general,
			but can perhaps be repurposed.

ctl_ha.h:		This is a stubbed-out High Availability API.  Much
			more is needed for full HA support.  See the
			comments in the header and the description of what
			is needed in the README.ctl.txt file for more
			details.

ctl_io.h:		This defines most of the core CTL I/O structures.
			union ctl_io is conceptually very similar to CAM's
			union ccb.

ctl_ioctl.h:		This defines all ioctls available through the CTL
			character device, and the data structures needed
			for those ioctls.

ctl_mem_pool.c,
ctl_mem_pool.h:		Generic memory pool implementation used by the
			internal frontend.

ctl_private.h:		Private data structres (e.g. CTL softc) and
			function prototypes.  This also includes the SCSI
			vendor and product names used by CTL.

ctl_scsi_all.c,
ctl_scsi_all.h:		CTL wrappers around CAM sense printing functions.

ctl_ser_table.c:	Command serialization table.  This defines what
			happens when one type of command is followed by
			another type of command.

ctl_util.c,
ctl_util.h:		CTL utility functions, primarily designed to be
			used from userland.  See ctladm for the primary
			consumer of these functions.  These include CDB
			building functions.

scsi_ctl.c:		CAM target peripheral driver and CTL frontend port.
			This is the path into CTL for commands from
			target-capable hardware/SIMs.

README.ctl.txt:		CTL code features, roadmap, to-do list.

usr.sbin/Makefile:	Add ctladm.

ctladm/Makefile,
ctladm/ctladm.8,
ctladm/ctladm.c,
ctladm/ctladm.h,
ctladm/util.c:		ctladm(8) is the CTL management utility.
			It fills a role similar to camcontrol(8).
			It allow configuring LUNs, issuing commands,
			injecting errors and various other control
			functions.

usr.bin/Makefile:	Add ctlstat.

ctlstat/Makefile
ctlstat/ctlstat.8,
ctlstat/ctlstat.c:	ctlstat(8) fills a role similar to iostat(8).
			It reports I/O statistics for CTL.

sys/conf/files:		Add CTL files.

sys/conf/NOTES:		Add device ctl.

sys/cam/scsi_all.h:	To conform to more recent specs, the inquiry CDB
			length field is now 2 bytes long.

			Add several mode page definitions for CTL.

sys/cam/scsi_all.c:	Handle the new 2 byte inquiry length.

sys/dev/ciss/ciss.c,
sys/dev/ata/atapi-cam.c,
sys/cam/scsi/scsi_targ_bh.c,
scsi_target/scsi_cmds.c,
mlxcontrol/interface.c:	Update for 2 byte inquiry length field.

scsi_da.h:		Add versions of the format and rigid disk pages
			that are in a more reasonable format for CTL.

amd64/conf/GENERIC,
i386/conf/GENERIC,
ia64/conf/GENERIC,
sparc64/conf/GENERIC:	Add device ctl.

i386/conf/PAE:		The CTL frontend SIM at least does not compile
			cleanly on PAE.

Sponsored by:	Copan Systems, SGI and Spectra Logic
MFC after:	1 month
2012-01-12 00:34:33 +00:00
jimharris
b3a02b2c5d Add 0x2826 device ID for C600 (Patsburg) SATA controller in RAID mode.
Reviewed by: mav
Approved by: scottl
2012-01-06 00:22:55 +00:00
ed
ab210c8f2f Use strchr() and strrchr().
It seems strchr() and strrchr() are used more often than index() and
rindex(). Therefore, simply migrate all kernel code to use it.

For the XFS code, remove an empty line to make the code identical to
the code in the Linux kernel.
2012-01-02 12:12:10 +00:00
mav
2e0d4eac9b Add PCI IDs for the Intel ICH9M SATA controllers.
MFC after:	2 weeks
2011-12-14 13:12:55 +00:00
mav
9be1bfa322 Add hw.ahci.force tunable to control whether AHCI drivers should attach
to known AHCI-capable chips (AMD/NVIDIA), configured for legacy emulation.

Enabled by default to get additional performance and functionality of AHCI
when it can't be enabled by BIOS. Can be disabled to honor BIOS settings if
needed for some reason.

MFC after:	1 month
2011-12-02 12:52:33 +00:00
hselasky
53a216b722 Rename device_delete_all_children() into device_delete_children().
Suggested by:	jhb @ and marius @
MFC after:	1 week
2011-11-22 21:56:55 +00:00
hselasky
3bcdb8772a Move the device_delete_all_children() function from usb_util.c
to kern/subr_bus.c. Simplify this function so that it no longer
depends on malloc() to execute. Identify a few other places where
it makes sense to use device_delete_all_children().

MFC after:	1 week
2011-11-19 10:11:50 +00:00
ed
0c56cf839d Mark all SYSCTL_NODEs static that have no corresponding SYSCTL_DECLs.
The SYSCTL_NODE macro defines a list that stores all child-elements of
that node. If there's no SYSCTL_DECL macro anywhere else, there's no
reason why it shouldn't be static.
2011-11-07 15:43:11 +00:00
marius
58500f4f41 In r225931 I've missed the only other driver using the pointer returned
by rman_get_virtual(9) to access device registers sparc64 currently cares
about.
Ideally ata(4) should just be converted to access these using bus_space(9)
read/write functions instead as there's really no reason to do it the
former way. However, this part of ata-siliconimage.c should go away in
favor of siis(4) sooner or later anyway and I don't have the hardware to
actually test the SX4 bits of ata-promise.c.
Also ideally the other architectures should also properly handle the
BUS_SPACE_MAP_LINEAR flag of bus_space_map(9) so this code wouldn't need
to be #ifdef'ed.
2011-11-01 17:57:21 +00:00
mav
c1182fb18d Some dmesg cosmetics:
- for the legacy PCI ATA channels move channel number out of the device
description, same as it is for ahci(4), siis(4) and mvs(4);
 - add device description for the ISA ATA channels.
2011-10-24 08:47:23 +00:00
rodrigc
c78f4c8ed1 Add a "kern.features.ata_cam" sysctl in the kernel when the ATA_CAM kernel
option is defined.  This sysctl can be queried by feature_present(3).

Query for this feature in /sbin/atacontrol and /usr/sbin/burncd.
If these utilities detect that ATA_CAM is enabled, then these utilities
will error out.  These utilities are compatible with the old ATA
driver, but are incomptible with the new ATA_CAM driver.  By erroring out,
we give end-users an idea as to what remedies to use, and reduce the need for them
to file PR's.  For atacontrol, camcontrol must be used instead,
and for burncd, alternative utilties from the ports collection must be used
such as sysutils/cdrtools.

In future, maybe someone can re-write burncd to work with ATA_CAM,
but at least for now, we give a somewhat useful error message to end users.

PR:		160979
Reviewed by:	jh, Arnaud Lacombe <lacombar at gmail dot com>
Reported by:	Joe Barbish <fbsd8 at a1poweruser dot com>
MFC after:	3 days
2011-10-09 21:42:02 +00:00
wxs
0d289d32e4 Fix a typo in a comment.
Approved by:	kib@
2011-10-06 16:13:47 +00:00
mav
863be0d261 Do not force AHCI mode on NVIDIA MCP89 SATA controllers. Recent Apple
Mac with this chipset does not initialize AHCI mode unless it is started
from EFI loader.  However, legacy ATA mode works.

Submitted by:	jkim@ (original version)
Approved by:	re (kib)
MFC after:	1 week
2011-08-02 11:07:47 +00:00
mav
910d1f1924 - Use mutex to serialize index/data register pair usage, when
accessing SATA registers. Unserialized access under heavy load caused
wrong speed reporting and potentially could cause device loss.
 - To free memory and other resources (including above), allocated
during chipinit() method call on attach, add new chipdeinit() method,
called during driver detach.

Submitted by:   Andrew Boyer <aboyer@averesystems.com> (initial version)
Approved by:	re (kib)
MFC after:	1 week
2011-07-22 16:37:04 +00:00
mav
af6faca77e Skip BAR(5) usage for SATA registers access on ICH8M Apples, because for
some reason it causes system lock up. Linux does the same.

MFC after:	1 week
2011-06-14 20:30:15 +00:00
mav
a630391c8c Intel NM10 chipset's SATA controller has same PCI ID and revision as ICH7's,
but has only 2 SATA ports instead of 4. The worst part is that SStatus and
SError registers for missing ports are not implemented and return wrong
values (0xffffffff), that caused infinite reset loop.

Just ignore that SError value while I found no better way to identify them.
2011-06-09 16:30:13 +00:00
jfv
3cb21d8ed2 Chipset support for the new Intel Panther Point PCH, thanks
to Seth Heasley for preparing the changes.
2011-05-11 20:31:27 +00:00
mav
be04871210 According to ATA specifications, when ATAPI master is the only device, it
should respond with all zeroes to any access to slave registers. Test with
PATA devices confirmed such behavior. Unluckily, Intel SATA controllers in
legacy emulation mode behave differently, not making any difference between
ATA and ATAPI devices. It causes false positive slave device detection and,
as result, command timeouts.

To workaround this problem, mask result of legacy-emulated soft-reset with
the device presence information received from the SATA-specific registers.
2011-04-21 20:56:34 +00:00
mav
7551e50fbf - Fix mapping of the last two SATA ports on 6-port Intel controllers.
This improves hard-reset and hot-plug on these ports.
 - Device with ID 0x29218086 is a 2-port variant of ICH9 in legacy mode.
Skip probing for nonexistent slave devices there.
2011-04-21 11:44:16 +00:00
mav
f5bcaec9aa Use periodic status polling added at r214671 only in ATA_CAM mode. Legacy
mode won't receive much benefit from it due to its hot-plug limitations.
2011-04-21 09:02:19 +00:00
mav
c59fbe15ce Make PATA-like soft-reset in ata(4) more strict in checking disk signature.
It allows to avoid false positive device detection under Xen, that caused
long probe delays due to subsequent IDENTIFY command timeouts.

MFC after:	1 month
2011-04-21 07:26:14 +00:00
mav
f70691f628 Implement automatic SCSI sense fetching for ata(4) in ATA_CAM mode.
While it could be successfully done by CAM error recovery code, I was
told by several people that it is also a SIM obligation.
2011-04-12 09:55:24 +00:00
marius
8549269265 Add missing bus_dmamap_sync() calls for the work DMA map.
MFC after:	2 weeks
2011-03-06 13:08:25 +00:00
marius
e2cad91205 Add missing bus_dmamap_sync() calls for the work DMA map.
MFC after:	2 weeks
2011-03-06 13:06:41 +00:00
marius
c4b1dac511 - Allocate the DMA memory used for the work area as coherent as at least
the ataahci(4) and atamarvell(4) drivers share it between the host and
  the controller.
- Spell some zeros as BUS_DMA_WAITOK when used as bus_dmamem_alloc() flags.

MFC after:	2 weeks
2011-03-06 12:54:00 +00:00
nwhitehorn
3fa7ecd613 Add the disk ident and a human-meaningful description (here, the disk model
string) to the geom_disk config XML so that they are easily accessible from
userland.

MFC after:	1 week
2011-02-26 14:58:54 +00:00
jfv
c4f814b2fb Support for the new Patsburg PCH chipset:
- SMBus Controller
     - SATA Controller
     - HD Audio Controller
     - Watchdog Controller

Thanks to Seth Heasley (seth.heasley@intel.com) for providing us code.

MFC after 3 days
2011-02-01 01:05:11 +00:00
jfv
ec8c08c081 Support for the new DH89xxCC PCH chipset including:
- SATA controller
      - Watchdog timer
      - SMBus controller
2011-01-31 18:41:52 +00:00
mav
81b17619eb ICH7 SATA controller in legacy mode can provide access to SATA registers
via AHCI-like memory resource at BAR(5). Use it if BIOS was so kind to
allocate memory for that BAR. This allows hot-plug support and connection
speed reporting.

MFC after:	2 weeks
2011-01-24 09:24:20 +00:00
marius
4f90f79024 Several chipset drivers alter parameters relevant for the DMA tag creation,
i.e. alignment, max_address, max_iosize and segsize (only max_address is
thought to have an negative impact regarding this issue though), after
calling ata_dmainit() either directly or indirectly so these values have
no effect or at least no effect on the DMA tags and the defaults are used
for the latter instead. So change the drivers to set these parameters
up-front and ata_dmainit() to honor them.

Reviewd by:	mav
MFC after:	1 month
2010-11-28 18:53:29 +00:00
mav
d7d3d37fd0 Do hard reset before soft reset for SATA channels. Soft reset reported to be
not enough to restore device readiness in some situations.

Tested by: 	Roger Hammerstein <cheeky.m@live.com> on ServerWorks HT1000.
2010-11-27 07:03:31 +00:00
mav
dfc44b4d0b Make ATA_CAM wrapper to report SATA power management capabilities to CAM to
make it configure device to initiate transitions if controller configured
to accept them. This makes hint.ata.X.pm_level=1 mode working.
2010-11-18 19:28:45 +00:00
mav
a8ae41654e Even if we are skipping SATA hard reset - set power management bits in
SControl register. This should make things consistent and help to avoid
unexpected PHY events that I've noticed in some cases on VIA controllers.
2010-11-18 11:58:17 +00:00
mav
6bb4865644 Record that there is no devices if SATA reset found none. 2010-11-18 10:34:18 +00:00
mav
1dd61e867f Some VIA SATA controllers provide access to non-standard SATA registers via
PCI config space. Use them to implement hot-plug and link speed reporting.
Tested on ASRock PV530 board with VX900 chipset.
2010-11-18 08:03:40 +00:00
mav
2d8b9a3198 Add IDs for VIA VX900 chipset SATA controller.
(Missed part of r215428)
2010-11-17 17:52:04 +00:00
mav
2422e8c5a0 Add IDs for VIA VX900 chipset SATA controller.
MFC after:	1 week
2010-11-17 16:17:35 +00:00
brucec
696c4e1f9b Fix typos.
PR:	bin/148894
Submitted by:	olgeni
2010-11-09 10:59:09 +00:00
mav
78df14851a Teach ahci(4), siis(4) and ATA_CAM ata(4) wrapper report to CAM residual
I/O length on underruns, that often happens for some SCSI commands.
2010-11-08 15:36:15 +00:00
mav
ef5448bdd8 Mark command submission timeouts as timeouts. This should trigger device
resets and increase chances of getting device back again.
2010-11-06 19:11:49 +00:00
mav
eed6d0709d Add support for odd-sized PIO transfers, sometimes used by ATAPI. 2010-11-06 14:22:50 +00:00
mav
5eb5cf6b6a Remove stale line, accidentally slipped into r214016.
MFC after:	3 days
2010-11-02 09:31:24 +00:00
mav
d5157b7469 Set of legacy mode SATA enchancements:
- Implement proper combined mode decoding for Intel controllers to properly
identify SATA and PATA channels and associate ATA channels with SATA ports.
This fixes wrong reporting and in some cases hard resets to wrong SATA ports.
- Improve SATA registers support to handle hot-plug events and potentially
interface errors. For ICH5/6300ESB chipsets these registers accessible via
PCI config space. For later ones they may be accessible via PCI BAR(5).
- For controllers not generating interrupts on hot-plug events, implement
periodic status polling. Use it to detect hot-plug on Intel and VIA
controllers. Same probably could also be used for Serverworks and SIS.
2010-10-18 11:30:13 +00:00
mav
fb2ddb5237 Revert r132291.
Restore setting PIO/WDMA timings for VIA UDMA133 controllers.
Linux disables only AST register writing there, but no all timings.
2010-09-30 16:09:52 +00:00
mav
cc9d3a376d Add missing le32toh(), same as recently done in ata-siliconimage.c. 2010-09-24 07:14:14 +00:00
jchandra
6845185dad Add missing byteswap, works on big endian systems now (tested on Netlogic
XLS MIPS processor).

Submitted by:	Sreekanth M. S. <kanthms at netlogicmicro dot com>
Reviewed by:	mav
2010-09-23 05:17:36 +00:00
nwhitehorn
258c3c9135 Fix a problem where device detection would work unreliably on Serverworks
K2 SATA controllers. The chip's status register must be read first, and
as a long, for other registers to be correctly updated after a command, and
this includes the command sequence in device detection as well as the
previously handled case after interrupts. While here, clean up some
previous hacks related to this controller.

Reported by:	many
Reviewed by:	mav
MFC after:	3 weeks
2010-09-09 13:17:30 +00:00
mav
e758e6c84a Add fix for SiI3114 and SiI3512 chips bug, which caused sending R_ERR in
response to DMA activate FIS under certain circumstances. This is
recommended fix from chip datasheet. If triggered, this bug most likely
cause write command timeout.

MFC after:	2 weeks
2010-09-02 12:32:29 +00:00
mav
aac03a91b1 SATA1.x SiliconImage controllers on power-on reset TFD Status register into
value 0xff. On hot-plug this value confuses ata_generic_reset() device
presence detection logic. As soon as we already know drive presence from
SATA hard reset, hint ata_generic_reset() to wait for device signature
until success or full timeout.
2010-09-02 11:18:43 +00:00
mav
78488718dc Increase device reset timeout from 10 to 15 seconds, same as in ahci(4).
Some devices found need about 10-12 seconds to spinup.
2010-09-01 06:43:41 +00:00
mav
271a49c955 Add Intel Cougar Point PCH SATA Controller DeviceIDs. Correct some existing
entries for Intel Ibex Peak (5 Series/3400 Series) PCH SATA controllers.

Submitted by:	jfv@
MFC after:	1 week
2010-08-28 07:10:51 +00:00
mav
68b26f6649 Export PCI IDs of ATA/SATA controllers through CAM and ata(4) layers to
GEOM. This information needed for proper soft-RAID's on-disk metadata
reading and writing.
2010-07-25 15:43:52 +00:00
mav
8b6b10d281 Make legacy ATA emulation detection more strict. This should fix false
positive legacy detection and attach failure/panic for Marvell 88SX6141
controller and potentially some others.

PR:		kern/145064
2010-07-16 17:27:43 +00:00
mav
7b58892c33 Improve interrupt setup errors handling. 2010-07-16 10:05:00 +00:00
mav
bc9554cce6 Disable multi-sector PIO transfers if ATA_SET_MULTI command failed.
Submitted by:	Mikolaj Golub on fs@
2010-07-13 06:42:47 +00:00
mav
60fbea5ce0 Revert and remake r209883:
Do not grab lock while setting up interrupt, as it causes LOR with
allocation code. Instead make interrupt handler check that CAM bus
initialization completed before touching it.

While there, slightly improve attach errors handling.

Reported by:	kib
2010-07-12 12:16:11 +00:00
mav
4895e1982d If ata_sata_phy_reset() failed and ata_generic_reset() is not called, mark
channel as having no devices connected. This improves hot-unplug operation
on legacy-emulating SATA controllers.
2010-07-10 15:36:27 +00:00
mav
e4e2e8edd3 On attach, grab channel lock before setting up interrupt. This fixes crash
in ATA_CAM mode if phy connect event arrive before CAM bus initialization
completed.
2010-07-10 15:27:27 +00:00
mav
20380dbd90 Make hw.ata.ata_dma_check_80pin tunable affect not only device side, but
also controller side cable checks. Make respective sysctl writable.

PR:		kern/143462
2010-07-10 13:46:14 +00:00
imp
cdee2d4b3b Add a safety-belt. If the identified disk has 0 blocks, don't attach
it.  This can happen in some cases when plugging in SD/SmartCard PC
Cards with empty slots.  It is better to detect this bogosity, and
refuse to attach rather than panic with a division by zero (in one of
many places) down stream.
2010-07-04 07:42:52 +00:00
imp
e88b37e4b4 Minor formatting nits. 2010-07-04 05:58:17 +00:00
mav
1f8ff496d3 Add ata(4) ability to limit initial ATA mode for devices via device hints.
After boot this mode can be changed with atacontrol/camcontrol as usual.
It works for both legacy and ATA_CAM wrapper mode.

PR:		kern/123980
2010-07-03 14:14:42 +00:00
nwhitehorn
6a83117174 Following r209299, level interrupts are low by default on PPC, so remove
the hack here to reprogram the interrupt for K2 SATA devices.
2010-06-18 14:17:45 +00:00
nwhitehorn
5327c141d1 Some revisions of the Serverworks K2 SATA controller have a data
corruption bug where if an ATA command is issued before DMA is started,
data will become available to the controller before it knows what to do
with it. This results in either data corruption or a controller crash.

This patch remedies the problem by adopting the workaround employed
by Linux and Darwin: starting the DMA engine prior to sending the ATA
command.

Observer on:	Xserve G5
Reviewed by:	mav
MFC after:	1 week
2010-06-06 14:09:48 +00:00
nwhitehorn
970d0bdaf6 Correct the comment. We now use level low instead of edge high for this
interrupt.
2010-06-05 16:27:15 +00:00
nwhitehorn
f1e9317c13 Partially revert r208162 while waiting for review on a more comprehensive
fix. On Apple OpenPICs, the low/high bit of the interrupt sense is only
respected for interrupt 0. We currently erroneously program all OpenPIC
interrupts level high instead of level low by default, which only matters
for some G5 systems where the SATA controllers use IRQ 0.

This change is a quick fix that will be reverted once the effect of
changing the default interrupt sense on embedded systems is known.

MFC after:	3 days
2010-06-05 16:25:25 +00:00
mav
505be0fb99 Fix possible use after free.
Found with:   Coverity Prevent(tm)
CID:          4634
2010-06-05 08:58:03 +00:00
mav
0f3a1006c2 Fix use after free on error.
Found with:   Coverity Prevent(tm)
CID:          4722
2010-06-05 08:44:40 +00:00
mav
d08eeebaec Fix PCH chipset IDs. They are 0x3bxx, not 0x3axx.
Pointy hat to:	me
2010-06-04 07:35:59 +00:00
mav
810a32455d Report ATA/SATA channel number to NewBus at location string. 2010-05-22 07:32:47 +00:00
mav
e4bb679c99 Improve suspend/resume support. Make sure controller is idle on suspend
and reset it on resume.
2010-05-21 13:29:28 +00:00
marius
427e94121a Change ad_firmware_geom_adjust() to operate on a struct disk * only and
hook it up to ada(4) also. While at it, rename *ad_firmware_geom_adjust()
to *ata_disk_firmware_geom_adjust() etc now that these are no longer
limited to ad(4).

Reviewed by:	mav
MFC after:	3 days
2010-05-20 12:46:19 +00:00
nwhitehorn
14881a2b1c Relocate interrupt sense setting for K2 SATA from the ATA driver to the
OFW PCI layer and read the sense directly from the device tree instead
of guessing.

MFC after:	1 week
2010-05-16 17:55:09 +00:00