Commit Graph

1297 Commits

Author SHA1 Message Date
rodrigc
c78f4c8ed1 Add a "kern.features.ata_cam" sysctl in the kernel when the ATA_CAM kernel
option is defined.  This sysctl can be queried by feature_present(3).

Query for this feature in /sbin/atacontrol and /usr/sbin/burncd.
If these utilities detect that ATA_CAM is enabled, then these utilities
will error out.  These utilities are compatible with the old ATA
driver, but are incomptible with the new ATA_CAM driver.  By erroring out,
we give end-users an idea as to what remedies to use, and reduce the need for them
to file PR's.  For atacontrol, camcontrol must be used instead,
and for burncd, alternative utilties from the ports collection must be used
such as sysutils/cdrtools.

In future, maybe someone can re-write burncd to work with ATA_CAM,
but at least for now, we give a somewhat useful error message to end users.

PR:		160979
Reviewed by:	jh, Arnaud Lacombe <lacombar at gmail dot com>
Reported by:	Joe Barbish <fbsd8 at a1poweruser dot com>
MFC after:	3 days
2011-10-09 21:42:02 +00:00
wxs
0d289d32e4 Fix a typo in a comment.
Approved by:	kib@
2011-10-06 16:13:47 +00:00
mav
863be0d261 Do not force AHCI mode on NVIDIA MCP89 SATA controllers. Recent Apple
Mac with this chipset does not initialize AHCI mode unless it is started
from EFI loader.  However, legacy ATA mode works.

Submitted by:	jkim@ (original version)
Approved by:	re (kib)
MFC after:	1 week
2011-08-02 11:07:47 +00:00
mav
910d1f1924 - Use mutex to serialize index/data register pair usage, when
accessing SATA registers. Unserialized access under heavy load caused
wrong speed reporting and potentially could cause device loss.
 - To free memory and other resources (including above), allocated
during chipinit() method call on attach, add new chipdeinit() method,
called during driver detach.

Submitted by:   Andrew Boyer <aboyer@averesystems.com> (initial version)
Approved by:	re (kib)
MFC after:	1 week
2011-07-22 16:37:04 +00:00
mav
af6faca77e Skip BAR(5) usage for SATA registers access on ICH8M Apples, because for
some reason it causes system lock up. Linux does the same.

MFC after:	1 week
2011-06-14 20:30:15 +00:00
mav
a630391c8c Intel NM10 chipset's SATA controller has same PCI ID and revision as ICH7's,
but has only 2 SATA ports instead of 4. The worst part is that SStatus and
SError registers for missing ports are not implemented and return wrong
values (0xffffffff), that caused infinite reset loop.

Just ignore that SError value while I found no better way to identify them.
2011-06-09 16:30:13 +00:00
jfv
3cb21d8ed2 Chipset support for the new Intel Panther Point PCH, thanks
to Seth Heasley for preparing the changes.
2011-05-11 20:31:27 +00:00
mav
be04871210 According to ATA specifications, when ATAPI master is the only device, it
should respond with all zeroes to any access to slave registers. Test with
PATA devices confirmed such behavior. Unluckily, Intel SATA controllers in
legacy emulation mode behave differently, not making any difference between
ATA and ATAPI devices. It causes false positive slave device detection and,
as result, command timeouts.

To workaround this problem, mask result of legacy-emulated soft-reset with
the device presence information received from the SATA-specific registers.
2011-04-21 20:56:34 +00:00
mav
7551e50fbf - Fix mapping of the last two SATA ports on 6-port Intel controllers.
This improves hard-reset and hot-plug on these ports.
 - Device with ID 0x29218086 is a 2-port variant of ICH9 in legacy mode.
Skip probing for nonexistent slave devices there.
2011-04-21 11:44:16 +00:00
mav
f5bcaec9aa Use periodic status polling added at r214671 only in ATA_CAM mode. Legacy
mode won't receive much benefit from it due to its hot-plug limitations.
2011-04-21 09:02:19 +00:00
mav
c59fbe15ce Make PATA-like soft-reset in ata(4) more strict in checking disk signature.
It allows to avoid false positive device detection under Xen, that caused
long probe delays due to subsequent IDENTIFY command timeouts.

MFC after:	1 month
2011-04-21 07:26:14 +00:00
mav
f70691f628 Implement automatic SCSI sense fetching for ata(4) in ATA_CAM mode.
While it could be successfully done by CAM error recovery code, I was
told by several people that it is also a SIM obligation.
2011-04-12 09:55:24 +00:00
marius
8549269265 Add missing bus_dmamap_sync() calls for the work DMA map.
MFC after:	2 weeks
2011-03-06 13:08:25 +00:00
marius
e2cad91205 Add missing bus_dmamap_sync() calls for the work DMA map.
MFC after:	2 weeks
2011-03-06 13:06:41 +00:00
marius
c4b1dac511 - Allocate the DMA memory used for the work area as coherent as at least
the ataahci(4) and atamarvell(4) drivers share it between the host and
  the controller.
- Spell some zeros as BUS_DMA_WAITOK when used as bus_dmamem_alloc() flags.

MFC after:	2 weeks
2011-03-06 12:54:00 +00:00
nwhitehorn
3fa7ecd613 Add the disk ident and a human-meaningful description (here, the disk model
string) to the geom_disk config XML so that they are easily accessible from
userland.

MFC after:	1 week
2011-02-26 14:58:54 +00:00
jfv
c4f814b2fb Support for the new Patsburg PCH chipset:
- SMBus Controller
     - SATA Controller
     - HD Audio Controller
     - Watchdog Controller

Thanks to Seth Heasley (seth.heasley@intel.com) for providing us code.

MFC after 3 days
2011-02-01 01:05:11 +00:00
jfv
ec8c08c081 Support for the new DH89xxCC PCH chipset including:
- SATA controller
      - Watchdog timer
      - SMBus controller
2011-01-31 18:41:52 +00:00
mav
81b17619eb ICH7 SATA controller in legacy mode can provide access to SATA registers
via AHCI-like memory resource at BAR(5). Use it if BIOS was so kind to
allocate memory for that BAR. This allows hot-plug support and connection
speed reporting.

MFC after:	2 weeks
2011-01-24 09:24:20 +00:00
marius
4f90f79024 Several chipset drivers alter parameters relevant for the DMA tag creation,
i.e. alignment, max_address, max_iosize and segsize (only max_address is
thought to have an negative impact regarding this issue though), after
calling ata_dmainit() either directly or indirectly so these values have
no effect or at least no effect on the DMA tags and the defaults are used
for the latter instead. So change the drivers to set these parameters
up-front and ata_dmainit() to honor them.

Reviewd by:	mav
MFC after:	1 month
2010-11-28 18:53:29 +00:00
mav
d7d3d37fd0 Do hard reset before soft reset for SATA channels. Soft reset reported to be
not enough to restore device readiness in some situations.

Tested by: 	Roger Hammerstein <cheeky.m@live.com> on ServerWorks HT1000.
2010-11-27 07:03:31 +00:00
mav
dfc44b4d0b Make ATA_CAM wrapper to report SATA power management capabilities to CAM to
make it configure device to initiate transitions if controller configured
to accept them. This makes hint.ata.X.pm_level=1 mode working.
2010-11-18 19:28:45 +00:00
mav
a8ae41654e Even if we are skipping SATA hard reset - set power management bits in
SControl register. This should make things consistent and help to avoid
unexpected PHY events that I've noticed in some cases on VIA controllers.
2010-11-18 11:58:17 +00:00
mav
6bb4865644 Record that there is no devices if SATA reset found none. 2010-11-18 10:34:18 +00:00
mav
1dd61e867f Some VIA SATA controllers provide access to non-standard SATA registers via
PCI config space. Use them to implement hot-plug and link speed reporting.
Tested on ASRock PV530 board with VX900 chipset.
2010-11-18 08:03:40 +00:00
mav
2d8b9a3198 Add IDs for VIA VX900 chipset SATA controller.
(Missed part of r215428)
2010-11-17 17:52:04 +00:00
mav
2422e8c5a0 Add IDs for VIA VX900 chipset SATA controller.
MFC after:	1 week
2010-11-17 16:17:35 +00:00
brucec
696c4e1f9b Fix typos.
PR:	bin/148894
Submitted by:	olgeni
2010-11-09 10:59:09 +00:00
mav
78df14851a Teach ahci(4), siis(4) and ATA_CAM ata(4) wrapper report to CAM residual
I/O length on underruns, that often happens for some SCSI commands.
2010-11-08 15:36:15 +00:00
mav
ef5448bdd8 Mark command submission timeouts as timeouts. This should trigger device
resets and increase chances of getting device back again.
2010-11-06 19:11:49 +00:00
mav
eed6d0709d Add support for odd-sized PIO transfers, sometimes used by ATAPI. 2010-11-06 14:22:50 +00:00
mav
5eb5cf6b6a Remove stale line, accidentally slipped into r214016.
MFC after:	3 days
2010-11-02 09:31:24 +00:00
mav
d5157b7469 Set of legacy mode SATA enchancements:
- Implement proper combined mode decoding for Intel controllers to properly
identify SATA and PATA channels and associate ATA channels with SATA ports.
This fixes wrong reporting and in some cases hard resets to wrong SATA ports.
- Improve SATA registers support to handle hot-plug events and potentially
interface errors. For ICH5/6300ESB chipsets these registers accessible via
PCI config space. For later ones they may be accessible via PCI BAR(5).
- For controllers not generating interrupts on hot-plug events, implement
periodic status polling. Use it to detect hot-plug on Intel and VIA
controllers. Same probably could also be used for Serverworks and SIS.
2010-10-18 11:30:13 +00:00
mav
fb2ddb5237 Revert r132291.
Restore setting PIO/WDMA timings for VIA UDMA133 controllers.
Linux disables only AST register writing there, but no all timings.
2010-09-30 16:09:52 +00:00
mav
cc9d3a376d Add missing le32toh(), same as recently done in ata-siliconimage.c. 2010-09-24 07:14:14 +00:00
jchandra
6845185dad Add missing byteswap, works on big endian systems now (tested on Netlogic
XLS MIPS processor).

Submitted by:	Sreekanth M. S. <kanthms at netlogicmicro dot com>
Reviewed by:	mav
2010-09-23 05:17:36 +00:00
nwhitehorn
258c3c9135 Fix a problem where device detection would work unreliably on Serverworks
K2 SATA controllers. The chip's status register must be read first, and
as a long, for other registers to be correctly updated after a command, and
this includes the command sequence in device detection as well as the
previously handled case after interrupts. While here, clean up some
previous hacks related to this controller.

Reported by:	many
Reviewed by:	mav
MFC after:	3 weeks
2010-09-09 13:17:30 +00:00
mav
e758e6c84a Add fix for SiI3114 and SiI3512 chips bug, which caused sending R_ERR in
response to DMA activate FIS under certain circumstances. This is
recommended fix from chip datasheet. If triggered, this bug most likely
cause write command timeout.

MFC after:	2 weeks
2010-09-02 12:32:29 +00:00
mav
aac03a91b1 SATA1.x SiliconImage controllers on power-on reset TFD Status register into
value 0xff. On hot-plug this value confuses ata_generic_reset() device
presence detection logic. As soon as we already know drive presence from
SATA hard reset, hint ata_generic_reset() to wait for device signature
until success or full timeout.
2010-09-02 11:18:43 +00:00
mav
78488718dc Increase device reset timeout from 10 to 15 seconds, same as in ahci(4).
Some devices found need about 10-12 seconds to spinup.
2010-09-01 06:43:41 +00:00
mav
271a49c955 Add Intel Cougar Point PCH SATA Controller DeviceIDs. Correct some existing
entries for Intel Ibex Peak (5 Series/3400 Series) PCH SATA controllers.

Submitted by:	jfv@
MFC after:	1 week
2010-08-28 07:10:51 +00:00
mav
68b26f6649 Export PCI IDs of ATA/SATA controllers through CAM and ata(4) layers to
GEOM. This information needed for proper soft-RAID's on-disk metadata
reading and writing.
2010-07-25 15:43:52 +00:00
mav
8b6b10d281 Make legacy ATA emulation detection more strict. This should fix false
positive legacy detection and attach failure/panic for Marvell 88SX6141
controller and potentially some others.

PR:		kern/145064
2010-07-16 17:27:43 +00:00
mav
7b58892c33 Improve interrupt setup errors handling. 2010-07-16 10:05:00 +00:00
mav
bc9554cce6 Disable multi-sector PIO transfers if ATA_SET_MULTI command failed.
Submitted by:	Mikolaj Golub on fs@
2010-07-13 06:42:47 +00:00
mav
60fbea5ce0 Revert and remake r209883:
Do not grab lock while setting up interrupt, as it causes LOR with
allocation code. Instead make interrupt handler check that CAM bus
initialization completed before touching it.

While there, slightly improve attach errors handling.

Reported by:	kib
2010-07-12 12:16:11 +00:00
mav
4895e1982d If ata_sata_phy_reset() failed and ata_generic_reset() is not called, mark
channel as having no devices connected. This improves hot-unplug operation
on legacy-emulating SATA controllers.
2010-07-10 15:36:27 +00:00
mav
e4e2e8edd3 On attach, grab channel lock before setting up interrupt. This fixes crash
in ATA_CAM mode if phy connect event arrive before CAM bus initialization
completed.
2010-07-10 15:27:27 +00:00
mav
20380dbd90 Make hw.ata.ata_dma_check_80pin tunable affect not only device side, but
also controller side cable checks. Make respective sysctl writable.

PR:		kern/143462
2010-07-10 13:46:14 +00:00
imp
cdee2d4b3b Add a safety-belt. If the identified disk has 0 blocks, don't attach
it.  This can happen in some cases when plugging in SD/SmartCard PC
Cards with empty slots.  It is better to detect this bogosity, and
refuse to attach rather than panic with a division by zero (in one of
many places) down stream.
2010-07-04 07:42:52 +00:00