From the OpenBSD log:
x86-64 ABI requires arrays greater than 16 bytes to be aligned to
16byte boundary. However, GCC 16-byte aligns arrays of >=16 BITS,
not BYTES.
This diff improves bug detectability for code which has local arrays
of [16 .. 127] bits: in those cases SSP will now detect even 1-byte
overflows.
Obtained from: OpenBSD (CVS rev 1.4)
MFC after: 1 week
Very small updates: fixes GCC-PR target/31152
Tested by building the cross-compiler.
Obtained from: gcc 4.3 (rev. r118461, 125973: GPLv2)
MFC after: 2 weeks
following builtin functions:
* __builtin_ia32_pslldi128() takes __v4si instead of __v8hi
* __builtin_ia32_psllqi128() takes __v2di instead of __v8hi
* __builtin_ia32_psradi128() takes __v4si instead of __v8hi
This should fix the following errors when building the LINT kernel with
gcc:
sys/crypto/aesni/aesni_wrap.c:191: error: incompatible type for argument 1 of
'__builtin_ia32_psradi128'
sys/crypto/aesni/aesni_wrap.c:195: error: incompatible type for argument 1 of
'__builtin_ia32_pslldi128'
MFC after: 3 days
Bring The following revisions from the gcc43 branch[1]:
118360, 118361, 118363, 118576, 119820,
123906, 125246, and 125721.
They all have in common that the were merged long ago
into Apple's gcc and should help improve the general
quality of the compiler and make it easier to bring
new features from Apple's gcc42.
For details please review the additions to the files:
gcc/ChangeLog.gcc43
gcc/cp/ChangeLog.gcc43 (new, adds previous revisions)
Reference:
[1] http://gcc.gnu.org/viewcvs/gcc/trunk/?pathrev=126700
Obtained from: gcc pre4.3 (GPLv2) branch
MFC after: 3 weeks
-maes option, but not the -mpclmul option as I ran out of bits in
the 32 bit flags field... You can -D__PCLMUL__ to get this, but it
won't be compatible w/ clang and modern gcc...
Reviewed by: -current, -toolchain
Initial support for the AMD amdfam10 chipsets has been available in the
gcc43 branch under GPLv2. AMD and some linux distributions (OpenSUSE) did
a backport of the amdfam10 support and made it available.
This is a revised subset of the support initially brought in in r236962
and later reverted. The collateral efects seem to have disappeared but
it is still recommended to set the CPUTYPE with caution.
Reviewed by: jkim (ages ago)
MFC after: 3 weeks
_Unwind_ForcedUnwind in libgcc_s takes as one of it's parameters a stop
function to tell it when to stop unwinding. One of the stop function's
parameters is a _Unwind_Exception_Class. On most architectures this is an
int64_t, however on ARM EABI the gcc developers have made this a char array
with 8 items. While both of these take the same space they are passed into
the stop function differently, an int64_t is passed in in registers r2 and
r3, while the char[8] is passed in as a pointer to the first item in
register r2.
Because libthr expects the value to be an int64_t we would get incorrect
results when it passes a function that take an int64_t but libgcc passes in
a pointer to a char array including crashing.
The fix is to update libgcc_s to make it pass an int64_t to the stop
function and to libstdc++ as it expects _Unwind_Exception_Class to be an
array.
ARM EABI support is disabled by default and can be enabled by setting
WITH_ARM_EABI when building, however only the kernel-toolchain target will
work with this flag until the rest of the support is added.
built with clang. When these are defined the lists are defined similar to:
asm(".section .ctors");
STATIC func_ptr __CTOR_LIST__[1] = { (func_ptr) (-1) };
asm(".section .dtors");
STATIC func_ptr __DTOR_LIST__[1] = { (func_ptr) (-1) };
The problem is clang will move the two arrays out of the .ctors and .dtors
sections causing these sections to contain a single null address. By not
defining these macros we use the version of the code that places the arrays
is their sections by using __attribute__((section(".ctors"))) and similar
for .dtors.
Submitted by: Daisuke Aoyama <aoyama AT peach.ne.jp>
r238211:
Support TARGET_ARCH=armv6 and TARGET_ARCH=armv6eb
This adds a new TARGET_ARCH for building on ARM
processors that support the ARMv6K multiprocessor
extensions. In particular, these processors have
better support for TLS and mutex operations.
This mostly touches a lot of Makefiles to extend
existing patterns for inferring CPUARCH from ARCH.
It also configures:
* GCC to default to arm1176jz-s
* GCC to predefine __FreeBSD_ARCH_armv6__
* gas to default to ARM_ARCH_V6K
* uname -p to return 'armv6'
* make so that MACHINE_ARCH defaults to 'armv6'
It also changes a number of headers to use
the compiler __ARM_ARCH_XXX__ macros to configure
processor-specific support routines.
Submitted by: Tim Kientzle <kientzle@freebsd.org>
desired, one can turn off the generation of post-ELF standard dtags by
overriding it with --disable-new-dtags after the default switch.
Immediate effect of the change is that -rpath path is now stored both
in DT_RPATH and DT_RUNPATH tags, which is the right way to provide
rpath for dynamic linker supporting DT_RUNPATH per specification.
Reviewed by: kan
MFC after: 1 month
The patches are unexpectedly causing gcc to fail while
building ports/graphics/ImageMagick even when the cpu
flags are not used.
Reported by: Andreas Tobler
Initial support for the AMD barcelona chipsets has been available in the
gcc43 branch under GPLv2 but was not included when the Core 2 support
was brought to the system gcc.
AMD and some linux distributions (OpenSUSE) did a backport of the amdfam10
support and made them available. Unfortunately this is still experimental
and while it can improve performance, enabling the CPUTYPE may break some
C++ ports (like clang).
Special care was taken to make sure that the patches predate the GPLv3
switch upstream.
Tested by: Vladimir Kushnir
Reviewed by: mm
Approved by: jhb (mentor)
MFC after: 2 weeks
the GCC 4.1 branch and are available under GPLv2.
2007-11-07 Eric Botcazou <ebotcazou@libertysurf.fr>
PR rtl-optimization/33822
* rtl.h (REG_OFFSET): Fix comment.
* var-tracking.c (INT_MEM_OFFSET): New macro.
(var_mem_set): Use it.
(var_mem_delete_and_set): Likewise.
(var_mem_delete): Likewise.
(vt_get_decl_and_offset): Likewise.
(offset_valid_for_tracked_p): New predicate.
(count_uses): Do not track locations with invalid offsets.
(add_uses): Likewise.
(add_stores): Likewise.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=129972
2007-11-16 Richard Guenther <rguenther@suse.de>
PR middle-end/34030
* fold-const.c (fold_binary): Use correct types for folding
1 << X & Y to Y >> X & 1.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=130242
2008-01-14 Eric Botcazou <ebotcazou@adacore.com>
PR rtl-optimization/31944
* cse.c (remove_pseudo_from_table): New function.
(merge_equiv_classes): Use above function to remove pseudo-registers.
(invalidate): Likewise
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=131524
2008-01-24 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
Backport:
2007-11-07 Kenneth Zadeck <zadeck@naturalbridge.com>
PR middle-end/33826
* ipa-pure-const (static_execute): Added code to keep recursive
functions from being marked as pure or const.
* ipa-utils (searchc): Fixed comment.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=131807
2008-02-01 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
Backport:
2007-08-02 Nathan Froyd <froydnj@codesourcery.com>
PR middle-end/25445
* varasm.c (default_binds_local_p_1): Consult flag_whole_program
if we are compiling with -fPIC.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=132061
2008-02-04 Richard Guenther <rguenther@suse.de>
PR middle-end/33631
* expr.c (count_type_elements): Give for unions instead of
guessing.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=132101
2008-02-14 Alan Modra <amodra@bigpond.net.au>
PR target/34393
* config/rs6000/rs6000.md (restore_stack_block): Force operands[1]
to a reg.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=132309
2008-03-25 Richard Guenther <rguenther@suse.de>
Backport from mainline:
2008-02-12 Richard Guenther <rguenther@suse.de>
PR middle-end/35163
* fold-const.c (fold_widened_comparison): Use get_unwidened in
value-preserving mode. Disallow final truncation.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=133509
2008-11-30 Eric Botcazou <ebotcazou@adacore.com>
PR target/38287
* config/sparc/sparc.md (divsi3 expander): Remove constraints.
(divsi3_sp32): Add new alternative with 'K' for operand #2.
(cmp_sdiv_cc_set): Factor common string.
(udivsi3_sp32): Add new alternative with 'K' for operand #2.
Add TARGET_V9 case.
(cmp_udiv_cc_set): Factor common string.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=142298
Reviewed by: mm
Approved by: jhb (mentor)
MFC after: 1 week
declares the proper size of a function. Without this macro recent GNU as will
complain about with:
'Error: .size expression for main does not evaluate to a constant.'
Up to now we produce this:
.L.main:
....
.size main, .-main
With the macro defined the output is this:
.L.main:
....
.size main,.-.L.main
This affects only the 64-bit compiler.
Tested with world and kernel on both, 32 and 64-bit powerpc.
These options are supported in this shape in all newer GCC versions.
PR: gnu/155308
Obtained from: gcc 4.3 (rev. 118090, 118973, 120846; GPLv2)
MFC after: 2 weeks
and k8-sse3 cpu-types for -march=/-mtune= gcc options.
These new cpu-types include the SSE3 instruction set that is supported
by all newer AMD Athlon 64 and Opteron processors.
All three cpu-types are supported by clang and all gcc versions
starting with 4.3 SVN rev 124339 (at that time GPLv2 licensed).
PR: gnu/154906
Discussed with: kib, kan, dim
Obtained from: gcc 4.3 (r124339, GPLv2 licensed)
MFC after: 2 weeks
