Commit Graph

200 Commits

Author SHA1 Message Date
Konstantin Belousov
49fe48ab0c For Xeon 7500 and 48XX (Nehalem EX and Westmere EX) variants of the
Core i7 and Westmere processors, the uncore PMC subsystem is
completely different from the uncore PMC on smaller versions of CPUs.
Disable existing uncore hwpmc code for EX, otherwise non-existing MSRs
are accessed.

The cores PMCs seems to be identical for non-EX and EX, according to
the SDM.

Reviewed by:	davide, fabient
Sponsored by:	The FreeBSD Foundation
MFC after:	2 weeks
2014-06-04 16:06:38 +00:00
George V. Neville-Neil
5c37e5dacf Add missing Ivy Bridge and Haswell events.
Submitted by: Anton Rang <rang@mac.com>
MFC: 2 weeks
2014-06-02 20:50:08 +00:00
Mark Johnston
2a1681877e Remove some prototypes for undefined functions.
MFC after:	3 days
2014-05-15 21:19:13 +00:00
Justin Hibbits
8a00edea58 Enable and disable the PMC unit at load/unload time, respectively.
MFC after:	3 weeks
2014-04-18 06:39:00 +00:00
Hiren Panchasara
e8f021a3f7 Update hwpmc to support core events for Atom Silvermont microarchitecture.
(Model 0x4D as per Intel document 330061-001 01/2014)

Tested by:	Olivier Cochard-Labbe <olivier@cochatrd.me>
MFC after:	4 weeks
2014-03-20 20:51:08 +00:00
Robert Watson
4a14441044 Update kernel inclusions of capability.h to use capsicum.h instead; some
further refinement is required as some device drivers intended to be
portable over FreeBSD versions rely on __FreeBSD_version to decide whether
to include capability.h.

MFC after:	3 weeks
2014-03-16 10:55:57 +00:00
Eitan Adler
c08da1429f Fix pointer type in call to malloc
Submitted by:	Meyer, Conrad conrad.meyer@isilon.com
2014-03-13 16:51:40 +00:00
Eitan Adler
7793787339 Fix pointer type in call to malloc
Submitted by:	Meyer, Conrad conrad.meyer@isilon.com
2014-03-13 16:51:01 +00:00
Konstantin Belousov
cee9542d51 Use correct types for sizeof() in the calculations for the malloc(9) sizes [1].
While there, remove unneeded checks for failed allocations with M_WAITOK flag.

Submitted by:	Conrad Meyer <cemeyer@uw.edu> [1]
MFC after:	1 week
2014-03-12 10:25:26 +00:00
Justin Hibbits
5c0761ba72 Fix callchain capture for hwpmc(4). While here, some style(9) fixes, too.
MFC after:	2 weeks
2014-02-27 04:45:29 +00:00
Justin Hibbits
169dd953b0 Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events.  Thus far only direct events are supported.  I included
some documentation in the driver on how indirect events work, but support is
for the future.

MFC after:	1 month
2014-02-01 02:03:50 +00:00
Justin Hibbits
e35effceaf MPC74xx should not fall through, to the error case.
MFC after:	1 week
2014-01-25 22:50:42 +00:00
John Baldwin
e07ef9b0f6 Move <machine/apicvar.h> to <x86/apicvar.h>. 2014-01-23 20:10:22 +00:00
George V. Neville-Neil
ac4030b7e1 Add another Haswell model (0x45) to the set of supported chips.
Model 0x45 appears, for example, in late 2013 Mac Book Pro models
and is properly emulated by VMware.
2013-12-20 20:22:10 +00:00
Attilio Rao
026346c8f1 o Remove assertions on ipa_version as sometimes the version detection
using cpuid can be quirky (this is the case of VMWare without the
  vPMC support) but fail to probe hwpmc.
o Apply the fix for XEON family of processors as established by
  315338-020 document (bug AJ85).

Sponsored by:	EMC / Isilon storage division
Reviewed by:	fabient
2013-12-20 14:03:56 +00:00
Justin Hibbits
0587a07215 Add userland PMC backtracing, and use the PMC trapframe macros for kernel
backtraces.

MFC after:	1 week
2013-12-14 20:12:28 +00:00
Eitan Adler
7a22215c53 Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit.  Instead use (1U << 31) which gets the
expected result.

This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.

A similar change was made in OpenBSD.

Discussed with:	-arch, rdivacky
Reviewed by:	cperciva
2013-11-30 22:17:27 +00:00
Davide Italiano
cabba8f230 Remove local change leftover, this should never have been part of
r255745.

Pointy-hat to:	davide
Approved by:	re (implicit)
2013-09-20 23:10:52 +00:00
Davide Italiano
7faf4d90e8 Fix lc_lock/lc_unlock() support for rmlocks held in shared mode. With
current lock classes KPI it was really difficult because there was no
way to pass an rmtracker object to the lock/unlock routines. In order
to accomplish the task, modify the aforementioned functions so that
they can return (or pass as argument) an uinptr_t, which is in the rm
case used to hold a pointer to struct rm_priotracker for current
thread. As an added bonus, this fixes rm_sleep() in the rm shared
case, which right now can communicate priotracker structure between
lc_unlock()/lc_lock().

Suggested by:	jhb
Reviewed by:	jhb
Approved by:	re (delphij)
2013-09-20 23:06:21 +00:00
Justin Hibbits
995df27c66 Fix the build. 2013-09-05 01:13:26 +00:00
Pawel Jakub Dawidek
7008be5bd7 Change the cap_rights_t type from uint64_t to a structure that we can extend
in the future in a backward compatible (API and ABI) way.

The cap_rights_t represents capability rights. We used to use one bit to
represent one right, but we are running out of spare bits. Currently the new
structure provides place for 114 rights (so 50 more than the previous
cap_rights_t), but it is possible to grow the structure to hold at least 285
rights, although we can make it even larger if 285 rights won't be enough.

The structure definition looks like this:

	struct cap_rights {
		uint64_t	cr_rights[CAP_RIGHTS_VERSION + 2];
	};

The initial CAP_RIGHTS_VERSION is 0.

The top two bits in the first element of the cr_rights[] array contain total
number of elements in the array - 2. This means if those two bits are equal to
0, we have 2 array elements.

The top two bits in all remaining array elements should be 0.
The next five bits in all array elements contain array index. Only one bit is
used and bit position in this five-bits range defines array index. This means
there can be at most five array elements in the future.

To define new right the CAPRIGHT() macro must be used. The macro takes two
arguments - an array index and a bit to set, eg.

	#define	CAP_PDKILL	CAPRIGHT(1, 0x0000000000000800ULL)

We still support aliases that combine few rights, but the rights have to belong
to the same array element, eg:

	#define	CAP_LOOKUP	CAPRIGHT(0, 0x0000000000000400ULL)
	#define	CAP_FCHMOD	CAPRIGHT(0, 0x0000000000002000ULL)

	#define	CAP_FCHMODAT	(CAP_FCHMOD | CAP_LOOKUP)

There is new API to manage the new cap_rights_t structure:

	cap_rights_t *cap_rights_init(cap_rights_t *rights, ...);
	void cap_rights_set(cap_rights_t *rights, ...);
	void cap_rights_clear(cap_rights_t *rights, ...);
	bool cap_rights_is_set(const cap_rights_t *rights, ...);

	bool cap_rights_is_valid(const cap_rights_t *rights);
	void cap_rights_merge(cap_rights_t *dst, const cap_rights_t *src);
	void cap_rights_remove(cap_rights_t *dst, const cap_rights_t *src);
	bool cap_rights_contains(const cap_rights_t *big, const cap_rights_t *little);

Capability rights to the cap_rights_init(), cap_rights_set(),
cap_rights_clear() and cap_rights_is_set() functions are provided by
separating them with commas, eg:

	cap_rights_t rights;

	cap_rights_init(&rights, CAP_READ, CAP_WRITE, CAP_FSTAT);

There is no need to terminate the list of rights, as those functions are
actually macros that take care of the termination, eg:

	#define	cap_rights_set(rights, ...)				\
		__cap_rights_set((rights), __VA_ARGS__, 0ULL)
	void __cap_rights_set(cap_rights_t *rights, ...);

Thanks to using one bit as an array index we can assert in those functions that
there are no two rights belonging to different array elements provided
together. For example this is illegal and will be detected, because CAP_LOOKUP
belongs to element 0 and CAP_PDKILL to element 1:

	cap_rights_init(&rights, CAP_LOOKUP | CAP_PDKILL);

Providing several rights that belongs to the same array's element this way is
correct, but is not advised. It should only be used for aliases definition.

This commit also breaks compatibility with some existing Capsicum system calls,
but I see no other way to do that. This should be fine as Capsicum is still
experimental and this change is not going to 9.x.

Sponsored by:	The FreeBSD Foundation
2013-09-05 00:09:56 +00:00
Justin Hibbits
177f0102f4 Fix hwpmc(4) for 32-bit PowerPC. 2013-09-04 04:11:38 +00:00
Justin Hibbits
b2fb58a11d Refactor PowerPC hwpmc(4) driver into generic and specific. More refactoring
will likely be done as more drivers are added, since AIM-compatible processors
have similar PMC configuration logic.
2013-09-03 00:34:18 +00:00
Davide Italiano
89f6b7baf4 Complete r250105. Do not zero fields if M_ZERO flag is specified to
malloc(9).

Reported by:	pluknet, glebius
2013-09-01 21:44:43 +00:00
Adrian Chadd
808d6d430f Remove the duplicate LLC_MISS event and put it in the right order. 2013-08-29 13:52:51 +00:00
Adrian Chadd
81c4f79f18 Update the mis-predicted branch PMC names (for sandy bridge) to not clash.
The SDM (June 2013) tables on these are rather confusing.  Yes, they
assign the same name (BR_MISP_RETIRED.ALL_BRANCHES) to two codes
(C5H/00H and C5H/04H.) The latter however is the PEBS version.

So, to make it easier to see the difference - and yes, we can use
both without having to actually enable the PEBS specific bits! -
just rename the PEBS one to _PS so there's no clashing.

Tested:

* Sandy bridge
2013-08-25 12:58:34 +00:00
Adrian Chadd
cb42cde6ec Fix a >80 character long line, introduced in my previous commit.
Noticed by: hiren
2013-08-25 12:02:20 +00:00
Adrian Chadd
c55e621eed Update the MEM_UOP_RETIRED PMC operation for sandy bridge and sandy
bridge Xeon.

Summary: These are PEBS events but they're also available as normal
counter/sample events.  The source table (Table 19-2) lists the
base versions (LOAD, STLB_MISS, SPLIT, ALL) but it says they must
be qualified with other values.  This particular commit fleshes
out those umask values.

Source:

* Linux; SDM June 2013, Volume 3B, Table 19-2 and 18-21.

Tested:

* Sandy Bridge (non-Xeon)
2013-08-25 02:07:28 +00:00
Mark Johnston
29f4e216f2 Rename the kld_unload event handler to kld_unload_try, and add a new
kld_unload event handler which gets invoked after a linker file has been
successfully unloaded. The kld_unload and kld_load event handlers are now
invoked with the shared linker lock held, while kld_unload_try is invoked
with the lock exclusively held.

Convert hwpmc(4) to use these event handlers instead of having
kern_kldload() and kern_kldunload() invoke hwpmc(4) hooks whenever files are
loaded or unloaded. This has no functional effect, but simplifes the linker
code somewhat.

Reviewed by:	jhb
2013-08-24 21:13:38 +00:00
Adrian Chadd
8e0cf70b5d Change the name of this particular event to reflect the name used in
Linux and Intel examples.

Sourced:

* https://github.com/andikleen/pmu-tools/blob/master/snb-client.csv
* http://software.intel.com/en-us/comment/1747932#comment-1747932

Note:

* It's not currently in the Intel SDM; I need to chase down what's
  going on.

Tested:

* Sandy Bridge
2013-08-21 21:47:56 +00:00
Bjoern A. Zeeb
a66b2c65c3 Correct a typo in the event mask mnemonic.
Reviewed by:	gnn
MFC after:	3 days
2013-08-20 14:59:31 +00:00
Adrian Chadd
f7cd52247d Add in missing events for Sandy Bridge Xeon.
* Add in MEM_LOAD_UOPS_LLC_HIT_RETIRED for both sandy bridge and sandy
  bridge Xeon.  Right now it only is enabled for Sandy Bridge.
* D2/0F is actually a combination rather than a separate counter, so
  just flip that on for the CPU types that support it.

There's an errata for using this on SB Xeon hardware - I've documented
it in kern/181346.

Tested:

* Sandy Bridge
* Sandy Bridge Xeon

Sponsored by:	Netflix, Inc.
2013-08-18 06:08:52 +00:00
Alan Cox
66c392df53 Relax the vm object locking. Use a read lock.
Sponsored by:	EMC / Isilon Storage Division
2013-06-05 17:00:10 +00:00
Davide Italiano
31d7f0b7b0 Suppress a GCC warning. This warning is actually bogus and newer GCC
versions than the one in base (dim@ mentioned he tried on 4.7.3 and 4.8.1)
do not whine about it, so, at some point this workaround will be reverted.

Reported by:	ache
Discussed with:	dim
2013-05-02 14:55:21 +00:00
Davide Italiano
c0c97b9962 malloc(9) cannot return NULL if M_WAITOK flag is specified. 2013-04-30 15:59:22 +00:00
Davide Italiano
38179e6e76 The Intel PMC architectural events have encodings which are identical to
those of some non-architectural core events. This is not a problem in the
general case as long as there's an 1:1 mapping between the two, but there
are few exceptions. For example, 3CH_01H on Nehalem/Westmere represents
both unhalted-reference-cycles and CPU_CLK_UNHALTED.REF_P.
CPU_CLK_UNHALTED.REF_P on the aforementioned architectures does not measure
reference (i.e. bus) but TSC, so there's the need to disambiguate.
In order to avoid the namespace collision rename all the architectural
events in a way they cannot be ambigous and refactor the architectural
events handling function to reflect this change.
While here, per Jim Harris request, rename
iap_architectural_event_is_unsupported() to iap_event_is_architectural().

Discussed with:	jimharris
Reviewed by:	jimharris, gnn
2013-04-30 15:31:45 +00:00
Davide Italiano
1c12d03f5e Complete r250097:
Do not change the initialization order in pmc_intel_initialize().
2013-04-30 14:56:41 +00:00
Davide Italiano
e1bd42c272 When hwpmc(4) module is unloaded it reports a double leakage. This happens
at least if FreeBSD is ran under VirtualBox. In order to avoid the leakage,
properly deallocate structures in case CPU claims that hw performance
monitoring counters are not supported.

Reported by:	hiren
2013-04-30 08:33:38 +00:00
Davide Italiano
9dc0d11127 Fixup Westmere hwpmc(4) support: add missing CPU flag so that
intrucion-retired, llc-misses and llc-reference events can now be
allocated.

Reviewed by:	jimharris, gnn
2013-04-30 08:18:08 +00:00
Hiren Panchasara
c851725506 Improve/correct a comment. We now support a lot more cpu types.
PR:	kern/177496
Approved by:	sbruno (mentor)
2013-04-14 02:26:12 +00:00
Ryan Stone
c83c365008 Cosmetic change: make a comment reference Sandy Bridge *Xeon*
Reviewed by:	sbruno
MFC after:	1 week
2013-04-12 20:43:14 +00:00
Sean Bruno
4b226201da Trailing whitespace cleanup along with 80 column enforcemnt.
Submitted by:	hiren.panchasara@gmail.com
Reviewed by:	sbruno@freebsd.org
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2013-04-03 21:34:35 +00:00
Sean Bruno
cc0c1555d3 Update hwpmc to support Haswell class processors.
0x3C:      /* Per Intel document 325462-045US 01/2013. */

Add manpage to document all the goodness that is available in this
processor model.

Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	jimharris, sbruno
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2013-03-28 19:15:54 +00:00
Attilio Rao
89f6b8632c Switch the vm_object mutex to be a rwlock. This will enable in the
future further optimizations where the vm_object lock will be held
in read mode most of the time the page cache resident pool of pages
are accessed for reading purposes.

The change is mostly mechanical but few notes are reported:
* The KPI changes as follow:
  - VM_OBJECT_LOCK() -> VM_OBJECT_WLOCK()
  - VM_OBJECT_TRYLOCK() -> VM_OBJECT_TRYWLOCK()
  - VM_OBJECT_UNLOCK() -> VM_OBJECT_WUNLOCK()
  - VM_OBJECT_LOCK_ASSERT(MA_OWNED) -> VM_OBJECT_ASSERT_WLOCKED()
    (in order to avoid visibility of implementation details)
  - The read-mode operations are added:
    VM_OBJECT_RLOCK(), VM_OBJECT_TRYRLOCK(), VM_OBJECT_RUNLOCK(),
    VM_OBJECT_ASSERT_RLOCKED(), VM_OBJECT_ASSERT_LOCKED()
* The vm/vm_pager.h namespace pollution avoidance (forcing requiring
  sys/mutex.h in consumers directly to cater its inlining functions
  using VM_OBJECT_LOCK()) imposes that all the vm/vm_pager.h
  consumers now must include also sys/rwlock.h.
* zfs requires a quite convoluted fix to include FreeBSD rwlocks into
  the compat layer because the name clash between FreeBSD and solaris
  versions must be avoided.
  At this purpose zfs redefines the vm_object locking functions
  directly, isolating the FreeBSD components in specific compat stubs.

The KPI results heavilly broken by this commit.  Thirdy part ports must
be updated accordingly (I can think off-hand of VirtualBox, for example).

Sponsored by:	EMC / Isilon storage division
Reviewed by:	jeff
Reviewed by:	pjd (ZFS specific review)
Discussed with:	alc
Tested by:	pho
2013-03-09 02:32:23 +00:00
Fabien Thomas
d49302aead Add a generic way to call per event allocate / release function.
Reviewed by:	mav
MFC after:	1 month
2013-03-05 10:18:48 +00:00
Alexander Motin
1af19ee4a2 Add support for good old 8192Hz profiling clock to software PMC.
Reviewed by:	fabient
2013-02-26 18:13:42 +00:00
Alexander Motin
8a4f65bc33 Change the way how software PMC updates counters.
This at least fixes -n option of pmcstat.

Reviewed by:	fabient
2013-02-26 13:59:39 +00:00
Sean Bruno
3f929d8cdd Update hwpmc to support the Xeon class of Ivybridge processors.
case 0x3E:      /* Per Intel document 325462-045US 01/2013. */

Add manpage to document all the goodness that is available in this
processor model.

No support for uncore events at this time.

Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	davide, jimharris, sbruno
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2013-01-31 22:09:53 +00:00
Sean Bruno
ca57f64f7d Quiesce a couple of clang warnings
Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Obtained from:	Yahoo! Inc
2013-01-12 18:30:52 +00:00
Attilio Rao
5584e91718 Fixup r240246: hwpmc needs to retain the pinning until ASTs are not
executed. This means past the point where userret() is generally
executed.

Skip the td_pinned check if a callchain tracing is currently happening
and add a more robust check to pmc_capture_user_callchain() in order to
catch td_pinned leak past ast() in hwpmc case.

Reported and tested by:	fabient
MFC after:	1 week
X-MFC:	r240246
2012-10-30 15:10:50 +00:00