660 Commits

Author SHA1 Message Date
kevlo
40ff793d55 Fix comments.
Approved by: cognet
2007-01-26 01:37:32 +00:00
marius
545a381d5f - Add a uart_rxready() and corresponding device-specific implementations
that can be used to check whether receive data is ready, i.e. whether
  the subsequent call of uart_poll() should return a char, and unlike
  uart_poll() doesn't actually receive data.
- Remove the device-specific implementations of uart_poll() and implement
  uart_poll() in terms of uart_getc() and the newly added uart_rxready()
  in order to minimize code duplication.
- In sunkbd(4) take advantage of uart_rxready() and use it to implement
  the polled mode part of sunkbd_check() so we don't need to buffer a
  potentially read char in the softc.
- Fix some mis-indentation in sunkbd_read_char().

Discussed with:	marcel
2007-01-18 22:01:19 +00:00
cognet
199c2180b1 Create bus dma tags for both the PCI bus and the IXP425 root bus. Set the
PCI bus' one as the default one, and explicitely use the other one for
non-PCI devices.
This is needed because the PCI bus can only address 64MB of RAM, while some
IXP425 boards have 128MB or more, and most of the PCI drivers do not bother
providing the parent dma tag.
2007-01-17 00:58:25 +00:00
cognet
b0b19280da - Add bounce pages for arm, largely based on the i386 implementation.
- Add a default parent dma tag, similar to what has been done for sparc64.
- Before invalidating the dcache in POSTREAD, save the bits which are in the
same cachelines than our buffers, but not part of it, and restore them after
the invalidation.
2007-01-17 00:53:05 +00:00
ticso
872ebc62d7 Hints are handled differently on -current
Don't include hints.at91rm9200 for now
2007-01-05 10:30:51 +00:00
ticso
9f4ed86194 MFp4: Use the next possible value for hz instead of defaulting to 128
Update tick value after modifying hz.
2007-01-05 02:52:06 +00:00
ticso
5b47ed3f0a MFp4: Add missing atomic functions
Based on a patch by: des
2007-01-05 02:50:27 +00:00
ticso
b2a331b15e MFp4: add BWCT kernel configuration 2007-01-05 02:08:35 +00:00
ticso
616c9e84da MFp4: Make at91_rtc optional to allow other RTC choices 2007-01-05 02:06:53 +00:00
ticso
9b171d8fea MFp4: Read access require PDC to be setup first otherwise we might get
overrun errors.
	Write access however need cmd first, so keep the existing order
	for them.
2007-01-05 01:18:32 +00:00
ticso
2cad965a32 MFp4: BWCT boards are using an 16MHz xtal 2007-01-05 01:14:14 +00:00
ticso
e065c8604c MFp4: Add VLAN_MTU support 2007-01-05 01:07:59 +00:00
ticso
84de78b5ca MFp4: fix a race in transmit buffer handling 2007-01-05 01:01:14 +00:00
imp
4f5a74c4f1 MFp4: Fix bit name for SPI SR register 2007-01-01 00:50:25 +00:00
imp
67ee3dc1bd MFp4: Remove watchdog timeout that appears to be unused. 2007-01-01 00:48:25 +00:00
imp
7367e09394 Merge from FreeBSD-tsf-6 by way of p4:
correct values for PIO registers

	submitted by: patrick schweiger
2007-01-01 00:46:54 +00:00
n_hibma
c98f016084 Align the interfaces for the various watchdogs and make the interface
behave as expected.

Also:
- Return an error if WD_PASSIVE is passed in to the ioctl as only
  WD_ACTIVE is implemented at the moment. See sys/watchdog.h for an
  explanation of the difference between WD_ACTIVE and WD_PASSIVE.
- Remove the I_HAVE_TOTALLY_LOST_MY_SENSE_OF_HUMOR define. If you've
  lost your sense of humor, than don't add a define.

Specific changes:

i80321_wdog.c
  Don't roll your own passive watchdog tickle as this would defeat the
  purpose of an active (userland) watchdog tickle.

ichwd.c / ipmi.c:
  WD_ACTIVE means active patting of the watchdog by a userland process,
  not whether the watchdog is active. See sys/watchdog.h.

kern_clock.c:
  (software watchdog) Remove a check for WD_ACTIVE as this does not make
  sense here. This reverts r1.181.
2006-12-15 21:44:49 +00:00
sam
fee97a223b Handle a missing NPE firmware file better; if it's missing print a
(somewhat) meaningful message and terminate the build.  It'd be
nice to print a proper URL from which to fetch the file but that
seems problematic.  Leave a suggested starting point in this file
(TBD: add it to the man page).

Submitted by:	ru
2006-12-07 00:49:33 +00:00
cognet
ae543684d0 Unbreak build for Skyeye: do not attempt to do any DMA, as Skyeye doesn't
emulate it.

Reported by:	ru
2006-12-07 00:24:15 +00:00
julian
396ed947f6 Threading cleanup.. part 2 of several.
Make part of John Birrell's KSE patch permanent..
Specifically, remove:
Any reference of the ksegrp structure. This feature was
never fully utilised and made things overly complicated.
All code in the scheduler that tried to make threaded programs
fair to unthreaded programs.  Libpthread processes will already
do this to some extent and libthr processes already disable it.

Also:
Since this makes such a big change to the scheduler(s), take the opportunity
to rename some structures and elements that had to be moved anyhow.
This makes the code a lot more readable.

The ULE scheduler compiles again but I have no idea if it works.

The 4bsd scheduler still reqires a little cleaning and some functions that now do
ALMOST nothing will go away, but I thought I'd do that as a separate commit.

Tested by David Xu, and Dan Eischen using libthr and libpthread.
2006-12-06 06:34:57 +00:00
cognet
f302efe50d Do not forget to call pmap_free_l2_bucket() in pmap_remove_pages().
This can fix the pmap-related panics reported on arm.

MFC After:	3 days
2006-12-04 12:55:00 +00:00
cognet
9b1d13ab09 Provide stream operations. 2006-12-02 13:37:29 +00:00
cognet
496475aa1f We can have no PV entry here if the previous mapping was unmanaged, and the new
one is unmanaged too, so update the KASSERT to reflect this.
2006-12-01 12:29:55 +00:00
cognet
644eaab03a In pmap_ts_referenced(), don't attempt to do anything if the page is
fictitious, and just return 0.
2006-11-30 23:35:34 +00:00
cognet
195024caef First bits of Xscale core 3 support (the VM bits are far from being optimal
yet).
2006-11-30 23:34:07 +00:00
cognet
126947ef1e Introduce CPU_XSCALE_CORE3, as XScale Core 3 is significally different than
regular Xscale (it has no mini data cache, has armv6-style 16MB
supersections, and can address 36bits).
Define it for i81342.
2006-11-30 23:30:40 +00:00
kevlo
da6b91f11c Better i2c bit definitions.
Approved by: cognet
2006-11-30 06:30:01 +00:00
jb
da35e3e55f Turn console printf buffering into a kernel option and only on
by default for sun4v where it is absolutely required.

This change moves the buffer from struct pcpu to the stack to avoid
using the critical section which created a LOR in a couple of cases
due to interaction with the tty code and kqueue. The LOR can't be
fixed with the critical section and the pcpu buffer can't be used
without the critical section.

Putting the buffer on the stack was my initial solution, but it was
pointed out that the stress on the stack might cause problems
depending on the call path. We don't have a way of creating tests
for those possible cases, so it's best to leave this as an option
for the time being. In time we may get enough data to enable this
option more generally.
2006-11-30 04:17:05 +00:00
imp
a4a3a2c4c4 MFp4:
formatting nit
2006-11-29 08:17:40 +00:00
imp
befbd3a3bb Make this work a lot better:
Remove a lot of older cruft not needed.
	Improve ISR support, but it is still unused since polling is faster
	Properly initalize the speed register to get 90kb/s, not 400b/s.
	Try to catch NACK
	Allow 0 length read transfers to generate start/top pairs.
2006-11-29 08:15:59 +00:00
imp
85a0be372b MFp4:
correct data counts so that we clock enough data for the spi
	transaction.  This allows complete spi transactions to happen.
2006-11-29 07:57:02 +00:00
kevlo
31440a920a Bring in status led support for /dev/led/gpioled on Avila.
Approved by: cognet
2006-11-22 12:57:17 +00:00
imp
ceddc20728 MFp4: Make it work :-)
o Don't delay when checking the done bits.  There's no gain other
	  than a small performance hit.
	o calculate the clock divisors better (things are still way slow,
	  so maybe there's more here?)
	o don't always fail reset.  Always succeed instead.
	o fix inverted logic around at91_twi_wait() return value
	o remove debug code
	o remove unneeded, unworking junk
2006-11-22 06:51:59 +00:00
kevlo
b38795bee6 Match bus space unmap prototype.
Approved by: cognet
2006-11-20 13:21:02 +00:00
imp
5df82d7e99 MFp4: Tweak descriptions in preparation for porting to other members of
the AT91 arm9 family.
2006-11-20 06:27:15 +00:00
sam
9eab840888 config for Gateworks Avila board booting with NFS-mounted root on npe0
Reviewed by:	cognet, imp
MFC after:	1 month
2006-11-19 23:58:12 +00:00
sam
ea8c3a2c48 Gateworks Avila board support:
o ixp425 support
o NPE network driver (requires Intel microcode)
o h/w qmgr support
o True IDE compact flash over expansion bus
o pci (ath and hifn795x parts tested)
o xscale watchdog timer
o ds1672 RTC on i2c bus
o ad7418 voltage + temp monitoring on i2c bus
o uart

Work done together with cognet, kevlo, and jmg.  Parts of
the ixp425 support obtaine/derived from netbsd.

Reviewed by:	cognet, imp
MFC after:	1 month
2006-11-19 23:55:23 +00:00
sam
023ec0dcbf change bus space unmap protoype
Reviewed by:	cognet, imp
MFC After:	1 month
2006-11-19 23:47:51 +00:00
sam
6f04d0fe06 correct bus space unmap prototype
Reviewed by:	cognet, imp
MFC after:	1 month
2006-11-19 23:46:50 +00:00
sam
958a76563e elaborate on stepping names; add intel terminology to help
people cross-referencing intel docs

Reviewed by:	imp, cognet
MFC after:	1 month
2006-11-19 23:45:33 +00:00
cognet
c1bbb4897d Erm we really want to mask all interrupts in the range, just not the first
one.

Submitted by:	ru
2006-11-17 11:56:56 +00:00
kevlo
a75c025373 Compile -- remove an unused global variable avail_end.
Approved by: cognet
2006-11-17 00:53:39 +00:00
ru
8beeb4382c Fix a comment. 2006-11-13 06:26:57 +00:00
alc
6093953d36 Make pmap_enter() responsible for setting PG_WRITEABLE instead
of its caller.  (As a beneficial side-effect, a high-contention
acquisition of the page queues lock in vm_fault() is eliminated.)
2006-11-12 21:48:34 +00:00
alc
760248140c Eliminate unused global variables. 2006-11-11 20:57:52 +00:00
alc
917d191eab MFamd64/ia64/i386/sun4v
Use cnt.v_page_count, the actual count of available physical pages,
  instead of vm_page_array_size to compute the maximum number of pv
  entries.
2006-11-08 06:31:28 +00:00
cognet
d64324b021 Increate cnt.v_intr on interrupt. 2006-11-08 01:32:24 +00:00
cognet
6c634eded7 Identify the xscale 81342. 2006-11-07 22:36:57 +00:00
cognet
d086fc78af In the ARM_USE_SMALL_ALLOC case, vm_page_t may have an address < KERNBASE,
so adjust the KASSERT to reflect this.
2006-11-07 22:35:30 +00:00
cognet
d9c8d94a60 Add atomic_cmpset_acq_32. 2006-11-07 11:53:44 +00:00