52 Commits

Author SHA1 Message Date
glebius
bf1634bd38 Convert to if_foreach_llmaddr() KPI. 2019-10-21 18:10:46 +00:00
br
a1a1b09414 Add glue driver for Altera SOCFPGA Ethernet MAC (EMAC) found in
Terasic DE10-Pro (an Intel Stratix 10 GX/SX FPGA Development Kit).

The Altera EMAC is an instance of Synopsys DesignWare Gigabit MAC.

This driver sets correct clock range for MDIO interface on Intel Stratix 10
platform.

This is required due to lack of support for clock manager device for
this platform that could tell us the clock frequency value for ethernet
clock domain.

Sponsored by:	DARPA, AFRL
2019-07-29 16:32:23 +00:00
br
57b40e04b4 o Add support for BERI IOMMU device
o Add an experimental IOMMU support to xDMA framework

The BERI IOMMU device is the part of CHERI device-model project [1]. It
translates memory addresses for various BERI peripherals modelled in
software. It accepts FreeBSD/mips64 page directories format and manages
BERI TLB.

1. https://github.com/CTSRD-CHERI/device-model

Sponsored by:	DARPA, AFRL
2019-07-22 16:01:20 +00:00
br
84fd1988a0 Negate the logic of XCHAN_CAP_NOBUFS macro and rename it to
XCHAN_CAP_BOUNCE.

The only application that uses bounce buffering for now is the Government
Furnished Equipment (GFE) P2's dma core (AXIDMA) with its own dedicated
cacheless bounce buffer.

Sponsored by:	DARPA, AFRL
2019-07-04 14:04:08 +00:00
br
2b448ee3ce Add support for extended descriptor format to Altera mSGDMA driver.
The format to use depends on hardware configuration (synthesis-time),
so make it compile-time kernel option.

Extended format allows DMA engine to operate with 64-bit memory addresses.

Sponsored by:	DARPA, AFRL
2019-06-27 18:08:18 +00:00
br
e3c58b27db o Rewrite softdma_process_tx() of Altera SoftDMA engine driver
so it does not require a bounce buffer. The only need for this was
  to align the buffer address. Implement unaligned access and we don't
  need to copy data twice.
o Remove contigmalloc-based bounce buffer from xDMA code since it is
  not suitable for arbitrary memory provided by platform, which is
  sometimes a dedicated piece of memory that is not managed by OS at all.

Sponsored by:	DARPA, AFRL
2019-04-29 16:27:15 +00:00
kib
6dc902485b Fix off-by-one (page) errors in checks in d_mmap methods of several drivers.
Reported by:	C Turt <ecturt@gmail.com>
Reviewed by:	alc, markj
admbug:		781
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
2018-12-02 18:30:58 +00:00
mmacy
7aeac9ef18 ifnet: Replace if_addr_lock rwlock with epoch + mutex
Run on LLNW canaries and tested by pho@

gallatin:
Using a 14-core, 28-HTT single socket E5-2697 v3 with a 40GbE MLX5
based ConnectX 4-LX NIC, I see an almost 12% improvement in received
packet rate, and a larger improvement in bytes delivered all the way
to userspace.

When the host receiving 64 streams of netperf -H $DUT -t UDP_STREAM -- -m 1,
I see, using nstat -I mce0 1 before the patch:

InMpps OMpps  InGbs  OGbs err TCP Est %CPU syscalls csw     irq GBfree
4.98   0.00   4.42   0.00 4235592     33   83.80 4720653 2149771   1235 247.32
4.73   0.00   4.20   0.00 4025260     33   82.99 4724900 2139833   1204 247.32
4.72   0.00   4.20   0.00 4035252     33   82.14 4719162 2132023   1264 247.32
4.71   0.00   4.21   0.00 4073206     33   83.68 4744973 2123317   1347 247.32
4.72   0.00   4.21   0.00 4061118     33   80.82 4713615 2188091   1490 247.32
4.72   0.00   4.21   0.00 4051675     33   85.29 4727399 2109011   1205 247.32
4.73   0.00   4.21   0.00 4039056     33   84.65 4724735 2102603   1053 247.32

After the patch

InMpps OMpps  InGbs  OGbs err TCP Est %CPU syscalls csw     irq GBfree
5.43   0.00   4.20   0.00 3313143     33   84.96 5434214 1900162   2656 245.51
5.43   0.00   4.20   0.00 3308527     33   85.24 5439695 1809382   2521 245.51
5.42   0.00   4.19   0.00 3316778     33   87.54 5416028 1805835   2256 245.51
5.42   0.00   4.19   0.00 3317673     33   90.44 5426044 1763056   2332 245.51
5.42   0.00   4.19   0.00 3314839     33   88.11 5435732 1792218   2499 245.52
5.44   0.00   4.19   0.00 3293228     33   91.84 5426301 1668597   2121 245.52

Similarly, netperf reports 230Mb/s before the patch, and 270Mb/s after the patch

Reviewed by:	gallatin
Sponsored by:	Limelight Networks
Differential Revision:	https://reviews.freebsd.org/D15366
2018-05-18 20:13:34 +00:00
br
b5556ccaf3 Convert atse(4) driver for Altera Triple-Speed Ethernet MegaCore to use
xdma(4) interface.

This allows us to switch between Altera mSGDMA or SoftDMA engines used by
atse(4) device.

This also makes atse(4) driver become 25% smaller.

Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D9618
2018-04-13 15:59:24 +00:00
br
ac32843db9 Add driver for Altera SoftDMA® device.
SoftDMA is a software implementation of DMA engine built using Altera
FIFO component.

Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D9620
2018-04-13 14:18:04 +00:00
br
d610cb72d0 Add driver for Altera modular Scatter-Gather DMA engine (mSGDMA).
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D9619
2018-04-13 13:23:31 +00:00
gonzo
1252c9346c Clean up OF_getprop_alloc API
OF_getprop_alloc takes element size argument and returns number of
elements in the property. There are valid use cases for such behavior
but mostly API consumers pass 1 as element size to get string
properties. What API users would expect from OF_getprop_alloc is to be
a combination of malloc + OF_getprop with the same semantic of return
value. This patch modifies API signature to match these expectations.

For the valid use cases with element size != 1 and to reduce
modification scope new OF_getprop_alloc_multi function has been
introduced that behaves the same way OF_getprop_alloc behaved prior to
this patch.

Reviewed by:	ian, manu
Differential Revision:	https://reviews.freebsd.org/D14850
2018-04-08 22:59:34 +00:00
pfg
1537078d8f sys/dev: further adoption of SPDX licensing ID tags.
Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.
2017-11-27 14:52:40 +00:00
rwatson
e8c461d407 Merge enhancements to the ALTERA Avalon bus generic device attachment
driver to support exposing a GEOM device, which can be used to mount
Avalon-attached ROMs, reserved areas of DRAM, etc, as a filesystem:

commit 9deb1e60eaaaf7a3687e48c58af5efd756f32ec6
Author: Robert N. M. Watson <robert.watson@cl.cam.ac.uk>
Date:   Sat Mar 5 20:33:12 2016 +0000

    Use format strings with make_dev(9) in avgen(4).

commit 0bf2176c23e7425bfa042c08a24f8a25fe6d8885
Author: Robert N. M. Watson <robert.watson@cl.cam.ac.uk>
Date:   Tue Mar 1 10:23:23 2016 +0000

    Implement a new "geomio" configuration argument to altera_avgen(4),
    the generic I/O device we attach to various BERI peripherals.  The new
    option requests that, instead of exposing the underlying device via a
    special device node in /dev, it instead be exposed via geom(4),
    allowing it to be used with filesystems.  The current implementation
    does not allow a device to be exposed both for file/mmap and geom, so
    one of the two models must be selected when configuring it via FDT or
    device.hints.  A typical use of the new option will be:

      sri-cambridge,geomio = "rw";

MFC after:	1 week
Sponsored by:	DARPA, AFRL
2017-01-28 13:25:06 +00:00
rwatson
67fd389646 Merge robustness improvements for the ALTERA JTAG UART driver from
CheriBSD, which attempt to work around an inherent race in the UART's
control-register design in detecting whether JTAG is currently,
present, which will otherwise lead to moderately frequent output
drops when running in polled rather than interrupt-driven operation.
Now, these drops are quite infrequent.

commit 9f33fddac9215e32781a4f016ba17eab804fb6d4
Author: Robert N. M. Watson <robert.watson@cl.cam.ac.uk>
Date:   Thu Jul 16 17:34:12 2015 +0000

    Add a new sysctl, hw.altera_jtag_uart.ac_poll_delay, which allows the
    (default 10ms) delay associated with a full JTAG UART buffer combined
    with a lack of a JTAG-present flag to be tuned.  Setting this higher
    may cause some JTAG configurations to be more reliable when printing
    out low-level console output at a speed greater than the JTAG UART is
    willing to carry data.  Or it may not.

commit 73992ef7607738b2973736e409ccd644b30eadba
Author: Robert N. M. Watson <robert.watson@cl.cam.ac.uk>
Date:   Sun Jan 1 15:13:07 2017 +0000

    Minor improvements to the Altera JTAG UART device driver:

    - Minor rework to the logic to detect JTAG presence in order to be a bit
      more resilient to inevitable races: increase the retry period from two
      seconds to four seconds for trying to find JTAG, and more agressively
      clear the miss counter if JTAG has been reconnected.  Once JTAG has
      vanished, stop prodding the miss counter.

    - Do a bit of reworking of the output code to frob the control register
      less by checking whether write interrupts are enabled/disabled before
      changing their state.  This should reduce the opportunity for races
      with JTAG discovery (which are inherent to the Altera
      hardware-software interface, but can at least be minimised).

    - Add statistics relating to interrupt enable/disable/JTAG
      discovery/etc.

    With these changes, polled-mode JTAG UART ttys appear substantially
    more robust.

MFC after:	1 week
Sponsored by:	DARPA, AFRL
2017-01-28 12:43:19 +00:00
br
44efacb064 o Fix style.
o Remove set but not used variable.

Sponsored by:	DARPA, AFRL
2016-12-28 14:10:33 +00:00
gonzo
ba09ef761b Use OF_prop_free instead of direct call to free(9) 2016-05-14 18:44:30 +00:00
pfg
eed4bd22ad sys/dev: minor spelling fixes.
Most affect comments, very few have user-visible effects.
2016-05-03 03:41:25 +00:00
pfg
e2a6cba651 sys/dev: use our nitems() macro when it is avaliable through param.h.
No functional change, only trivial cases are done in this sweep,
Drivers that can get further enhancements will be done independently.

Discussed in:	freebsd-current
2016-04-19 23:37:24 +00:00
skra
bad1d5e697 As <machine/vm.h> is included from <vm/vm.h>, there is no need to
include it explicitly when <vm/vm.h> is already included.

Reviewed by:	alc, kib
Differential Revision:	https://reviews.freebsd.org/D5380
2016-02-22 09:10:23 +00:00
jkim
318c4f97e6 CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than ten
years for head.  However, it is continuously misused as the mpsafe argument
for callout_init(9).  Deprecate the flag and clean up callout_init() calls
to make them more consistent.

Differential Revision:	https://reviews.freebsd.org/D2613
Reviewed by:	jhb
MFC after:	2 weeks
2015-05-22 17:05:21 +00:00
br
436ac49059 Do not configure Altera PIO device on ARM startup.
PIO is a device implemented in soft-core and becomes
available after flashing FPGA only.
2015-01-04 23:14:04 +00:00
brooks
54cb61b939 Merge from CheriBSD:
commit d0c7d235c09fc65dbdb278e7016a96f79c6a49cc
    Make the Altera JTAG UART device driver slightly more forgiving of
    the foibles of a sub-par hrdware interface by increasing the timeout
    for spotting JTAG polling from one to two seconds.

commit 19ed45a18832560dab967c179d83b71081c3a220
    Update comment.

commit 8edfe803f033cc8e33229f99894c2b7496a44d5f
    Add a comment about a device-driver race condition that could cause the BERI
    pipeline to wedge awaiting JTAG in the event that both the low-level console
    and the tty layer decide to write to the JTAG FIFO just before JTAG is
    disconnected.  Resolving this race is a bit tricky as it looks like there
    isn't a way to 'give the character back' to the tty layer when we discover
    the race.  The easy fix is to drop the character, which we don't yet do, but
    perhaps should as that is a better outcome than wedging the pipeline.

commit 2ea26cf579c9defcf31e413e7c9b0fbc159237fc
    Add a comment about an inherent race with hardware in the Altera JTAG
    UART's low-level console code.

Submitted by:	rwatson
MFC after:	1 week
Sponsored by:	DARPA, AFRL
2014-11-21 21:14:05 +00:00
brooks
4e73b119b9 Merge from CheriBSD (2e28d2a3090239b30481f35dc452ad95a5c57389)
Remove initalized, but unused devname variable

MFC after:	1 week
Sponsored by:	DARPA, AFRL
2014-11-21 21:10:02 +00:00
br
c4acadfdd1 Add Altera Parallel IO (PIO) device driver.
Sponsored by:	DARPA, AFRL
2014-11-18 14:12:19 +00:00
glebius
b3b337a80e Mechanically convert to if_inc_counter(). 2014-09-19 03:51:26 +00:00
bz
7b005cf040 Merge atse(4) interrupt handling and race condition fixes from cheribsd:
commit 8bd88585ed8e3f7def0d780a1bc30d96fe642b9c

    Rework atse_rx_cycles handling: count packets instead of fills, and use the
    limit only when polling, not when in interrupt mode.  Otherwise, we may
    stop reading the FIFO midpacket and clear the event mask even though the
    FIFO still has data to read, which could stall receive when a large packet
    arrives.  Add a comment about races in the Altera FIFO interface: we may
    need to do a little more work to handle races than we are.

commit 20b39086cc612f8874dc9e6ef4c0c2eb777ba92a

    Use 'sizeof(data)' rather than '4' when checking an mbuf bound, as is the
    case for adjusting length/etc.

commit e18953174a265f40e9ba60d76af7d288927f5382

    Break out atse_intr() into two separate routines, one for each of the two
    interrupt sources: receive and transmit.

commit 6deedb43246ab3f9f597918361831fbab7fac4ce

    For the RX interrupt, take interest only in ALMOSTEMPTY and OVERFLOW.
    For the TX interrupt, take interest only in ALMOSTFULL and UNDERFLOW.

    Perform TX atse_start_locked() once rather than twice in TX interrupt
    handling -- and only if !FULL, rather than unconditionally.

commit 12601972ba08d4380201a74f5b967bdaeb23092c

    Experimentation suggests that the Altera Triple-Speed Ethernet documentation
    is incorrect and bits in the event and interrupt-enable registers are not
    irrationally rearranged relative to the status register.

commit 3cff2ffad769289fce3a728152e7be09405385d8

    Substantially rework interrupt handling in the atse(4) driver:

    - Introduce a new macro ATSE_TX_PENDING() which checks whether there is
      any pending data to transmit, either in an in-progress packet or in
      the TX queue.
    - Introduce new ATSE_RX_STATUS_READ() and ATSE_TX_STAUTS_WRITE() macros
      that query the FIFO status registers rather than event registers,
      offering level- rather than edge-triggered FIFO conditions.
    - For RX, interrupt only on full/overflow/underflow; for TX, interrupt
      only on empty/overflow/underflow.
    - Add new ATSE_RX_INTR_READ() and ATSE_RX_INTR_WRITE() macros useful for
      debugging interrupt behaviour.
    - Add a debug.atse_intr_debug_enable sysctl that causes various pieces
      of FIFO state to be printed out on each RX or TX interrupt.  This is
      disabled by default but good to turn on if the interface appears to
      wedge.  Also print debugging information when polling.
    - In the watchdog handler, do receive, not just transmit, processing, to
      ensure that the rx, not just tx, queue is being handled -- and, in
      particular, will be drained such that interrupts can resume.
    - Rework both atse_rx_intr() and atse_tx_intr() to eliminate many race
      conditions, and add comments on why various things are in various
      orders.  Interactions between modifications to the event and interrupt
      masks are quite subtle indeed, and we must actively check for a number
      of races (e.g., event mask cleared; packet arrives; interrupts enabled).
      We also now use the status registers rather than event registers for
      FIFO status checks to avoid other races; we continue to use event
      registers for underflow/overflow.

    With this change, interrupt-driven operation of atse appears (for the
    time being) robust.

commit 3393bbff5c68a4e61699f9b4a62af5d2a5f918f8

    atse: Fix build after 3cff2ffa

Obtained from:	cheribsd
Submitted by:	rwatson, emaste
Sponsored by:	DARPA/AFRL
MFC after:	3 days
2014-09-16 15:45:53 +00:00
glebius
9b93b159b3 Use define from if_var.h to access a field inside struct if_data,
that resides in struct ifnet.

Sponsored by:	Nginx, Inc.
2014-08-30 19:55:54 +00:00
bz
21fced0602 Use ETHER_ALIGN as argument to m_adj() to offset the beginning of packet
rather than the magic number 2.

While here fix a typo in a comment.

No functional changes.

MFC after:	1 week
Sponsored by:	DARPA/AFRL
2014-04-16 15:28:17 +00:00
ian
71d90c04a8 Follow r261352 by updating all drivers which are children of simplebus
to check the status property in their probe routines.

Simplebus used to only instantiate its children whose status="okay"
but that was improper behavior, fixed in r261352.  Now that it doesn't
check anymore and probes all its children; the children all have to
do the check because really only the children know how to properly
interpret their status property strings.

Right now all existing drivers only understand "okay" versus something-
that's-not-okay, so they all use the new ofw_bus_status_okay() helper.
2014-02-02 19:17:28 +00:00
glebius
529a68392a Another round of removing historical mbuf(9) allocator flags.
They are breeding! New ones arouse since last round.

Sponsored by:	Nginx, Inc.
2014-01-16 13:44:47 +00:00
nwhitehorn
c02e4b8c79 These nexus attachments do not execute a real probe and so need
BUS_PROBE_NOWILDCARD set.
2013-10-29 13:48:41 +00:00
brooks
c0286c6d41 Add a couple includes if net/if_var.h that were missed in r257176. 2013-10-28 20:15:59 +00:00
brooks
6e05225f6e MFP4: 221483, 221567, 221568, 221670, 221677, 221678, 221800, 221801,
221804, 221805, 222004, 222006, 222055, 222820, 1135077, 1135118, 1136259

Add atse(4), a driver for the Altera Triple Speed Ethernet MegaCore.

The current driver support gigabit Ethernet speeds only and works with
the MegaCore only in the internal FIFO configuration in the soon to be
open sourced BERI CPU configuration.

Submitted by:	bz
MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-18 20:44:19 +00:00
brooks
d38a764493 MFP4 (driver change only):
Change 231100 by brooks@brooks_zenith on 2013/07/12 21:01:31

	Add a new option ALTERA_SDCARD_FAST_SIM which checks immediatly
	for success of I/O operations rather than queuing a task.

MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-18 15:27:11 +00:00
brooks
2c64db60d7 MFP4:
Change 227594 by brooks@brooks_zenith on 2013/04/11 17:10:14

	When we fail, print the error that occured if we are giving
	up or if bootverbose is set.

MFC after:	3 days
Sponsored by:	DARPA/AFRL
2013-10-18 15:24:18 +00:00
brooks
ae9d96c81e Partial MFC of change 228122:
Due to the requirement that tty prefixes be unique per driver, rename
the Altera JTAG UART devices to ttyj#.

Sponsored by:	DARPA, AFRL
2013-04-30 18:29:05 +00:00
brooks
611d98380e MFP4 change 219820
Add a missing 0 to the mask for byte0 of C_SIZE.

The previous mask (0xc) worked except that the last 0-1536K of the disk
could not be accessed since we were shifting the (wrong) bits we did
mask off the right edge.
2013-01-22 18:51:14 +00:00
brooks
33734a7b74 MFP4 change 219819
Remove a duplicate computation of C_SIZE_MULT.  Once is sufficient.

Sponsored by:	DARPA, AFRL
2013-01-22 18:48:45 +00:00
rwatson
247875210d Merge Perforce changeset 219952 to head:
Make different bus attachments for Altera and Terasice
  device drivers share the same devclass_t.

Sponsored by:	DARPA, AFRL
2013-01-13 16:57:11 +00:00
rwatson
121041d601 Partially merge Perforce changeset 219942 to head:
Implement an FDT attachment for altera_avgen(4).

Portions of the changeset updating DTS and device.hints will be merged
separately.

Sponsored by:	DARPA, AFRL
2013-01-13 16:51:57 +00:00
rwatson
071be75e15 Merge Perforce changeset 219941 to head:
Copy altera_avgen(4) nexus attachment as a starting point for an
  FDT attachment.

Sponsored by:	DARPA, AFRL
2013-01-13 16:44:45 +00:00
rwatson
37ac175006 Merge Perforce changeset 219940 to head:
Rework altera_avgen(4) to cleanly(ish) separate nexus bus
  attachment from the driver itself.  This should allow us to
  plug in an fdt attachment more easily.

Sponsored by:	DARPA, AFRL
2013-01-13 16:43:59 +00:00
rwatson
206a4e8629 Merge Perforce changeset 219939 to head:
Start restructuring of altera_avgen(4) so that it can have an FDT
  attachment -- this requires first properly breaking out the current
  nexus attachment from the driver implementation.

Sponsored by:	DARPA, AFRL
2013-01-13 16:41:25 +00:00
rwatson
48778c38d7 Merge Perforce changeset 219927 to head:
Implement an FDT attachment for the Altera SD Card driver

Sponsored by:	DARPA, AFRL
2013-01-13 15:15:24 +00:00
rwatson
55f066f4d0 Merge Perforce changeset 219926 to head:
Copy Altera SDCard nexus attachment as a starting point for the FDT
  attachment.

Sponsored by:	DARPA, AFRL
2013-01-13 15:13:25 +00:00
rwatson
315df478c3 Merge Perforce changeset 219918 to head:
Naive first cut at an FDT bus attachment for the Altera JTAG UART.

Sponsored by:	DARPA, AFRL
2013-01-13 15:08:17 +00:00
rwatson
a6c6825b23 Merge Perforce changeset 219917 to head:
Copy Altera JTAG UART nexus bus attachment as a starting point
  for an FDT bus attachment.

Sponsored by: DARPA, AFRL
2013-01-13 14:38:09 +00:00
eadler
8600cbb5b6 Correct double "the the"
Approved by:	cperciva
MFC after:	3 days
2012-09-14 21:28:56 +00:00
rwatson
2842b85920 Add altera_jtag_uart(4), a device driver for Altera's JTAG UART soft core,
which presents a UART-like interface over the Avalon bus that can be
addressed over JTAG.  This IP core proves extremely useful, allowing us to
connect trivially to the FreeBSD console over JTAG for FPGA-embedded hard
and soft cores.  As interrupts are optionally configured for this soft
core, we support both interrupt-driven and polled modes of operation,
which must be selected using device.hints.  UART instances appear in /dev
as ttyu0, ttyu1, etc.

However, it also contains a number of quirks, which make it difficult to
tell when JTAG is connected, and some buffering issues.  We work around
these as best we can, using various heuristics.

While the majority of this device driver is not only not BERI-specific,
but also not MIPS-specific, for now add its defines in the BERI files
list, as the console-level parts are aware of where the first JTAG UART
is mapped on Avalon, and contain MIPS-specific address translation, to
use before Newbus and device.hints are available.

Sponsored by:	DARPA, AFRL
2012-08-25 11:30:36 +00:00