964 Commits

Author SHA1 Message Date
stas
eb23814aee - Fix spelling error in comments.
PR:		arm/128891
Submitted by:	Pavel Pankov <pankov_p@mail.ru>
Approved by:	kib (mentor)
2008-12-01 10:16:25 +00:00
stas
dd5439f8c6 - Get rid of unused variable in KTR checks. This allows ktr(4) enabled
ARM kernel to compile.

PR:		arm/128897
Submitted by:	Pankov Pavel <pankov_p@mail.ru>
Reviewed by:	raj
Approved by:	kib (mentor, implicit)
MFC after:	1 week
2008-11-30 22:58:27 +00:00
stas
42801e6297 - Get rid of extra include file, erroneously added by the
previous commit. This include file was required by the
  first version of the patch.

Approved by:	kib (mentor, implicit)
2008-11-30 22:40:11 +00:00
stas
610e0aa6be - Obtain main clock frequency dynamically based on CKGR_MCFR register
contents.
- It is possible to override the dynamic configuration by using
  AT91C_MAIN_CLOCK option in kernel config.

PR:		arm/128961 (based on)
Submitted by:	Bjorn Konig <bkoenig@alpha-tierchen.de>
Reviewed by:	imp
Approved by:	kib (mentor, implicit)
2008-11-30 22:33:03 +00:00
sam
69d880d876 enable use of modules but disable them by adding MODULES_OVERRIDE=""
in each config file until we can sort out issues in the modules tree

Reviewed by:	imp
MFC after:	1 month
2008-11-30 17:53:19 +00:00
imp
819e9e52a4 opt_at91.h isn't needed here at all anymore, since the board init
routines have been split out.  Remove it.  This leaves only one
instance of it in the tree that will be going away soon.
2008-11-30 17:40:05 +00:00
imp
e8a7024ad9 Convert BWCT and HL200 over to new board mechanism as well. The
TSC4370 config file wasn't committed to this tree, so I don't know if
my changes will work on it or not.
2008-11-25 19:05:46 +00:00
imp
f7eb998871 Start to make it easier to add AT91RM9200 based boards:
o Copy kb920x_machdep.c to at91_machdep.c
o Move board_init to new board_kb920x.c
o rename ramsize to at91_ramsize and make it accessible to board_* files.
o Delete files.kb920x.  We can do this selection with the new boards.
o Add a stub for the tsc4370 board init, which will be added in
  a future commit.
o Add new 'devices' at91_board_kb920x and at91_board_tsc4370.  More are
  needed and will be added in future commits.

Reviewed by:	stass, cognet
2008-11-25 18:40:40 +00:00
imp
a655f3a86f Whitespace nit. 2008-11-25 16:38:10 +00:00
imp
910037c59a Save boot args. 2008-11-25 05:17:39 +00:00
imp
11f1051cdc more silly whitespace changes. 2008-11-25 05:12:19 +00:00
imp
0672f1dcf9 Fix various whitespace botches, mostly having them at the end of a line. 2008-11-25 00:48:15 +00:00
imp
d0ea5829d3 Replace disclaimer with the one from COPYRIGHT. Joint authors aggreed
to the change.
2008-11-25 00:14:49 +00:00
imp
3dfcd1739a Replace three magic constants with L1_S_SIZE, since that's what is
really meant in those places.
2008-11-25 00:14:14 +00:00
imp
798ce0024e Tweak the disclaimer section of the license to match COPYRIGHT, for
better or worse.  Ok'd by folks that have additional copyrights to the
files in cases where there's joint authorship.
2008-11-25 00:13:26 +00:00
kib
8fad2283b3 Add sv_flags field to struct sysentvec with intention to provide description
of the ABI of the currently executing image. Change some places to test
the flags instead of explicit comparing with address of known sysentvec
structures to determine ABI features.

Discussed with:	dchagin, imp, jhb, peter
2008-11-22 12:36:15 +00:00
kmacy
9d3bb599b1 - bump __FreeBSD version to reflect added buf_ring, memory barriers,
and ifnet functions

- add memory barriers to <machine/atomic.h>
- update drivers to only conditionally define their own

- add lockless producer / consumer ring buffer
- remove ring buffer implementation from cxgb and update its callers

- add if_transmit(struct ifnet *ifp, struct mbuf *m) to ifnet to
  allow drivers to efficiently manage multiple hardware queues
  (i.e. not serialize all packets through one ifq)
- expose if_qflush to allow drivers to flush any driver managed queues

This work was supported by Bitgravity Inc. and Chelsio Inc.
2008-11-22 05:55:56 +00:00
raj
1190adfbbc Improve error handling in pcib_mbus_identify(). 2008-11-19 17:07:01 +00:00
raj
d8ed8b66e6 Improve style(9) and other cosmetics in Marvell SOCs code. 2008-11-19 11:57:16 +00:00
raj
59c341efe8 Fix off-by-one error in mbus_attach(). 2008-11-19 11:49:35 +00:00
raj
91c3cc23ad Enable PCI in Marvell kernel configs. 2008-11-19 11:47:23 +00:00
raj
d985db3ad5 PCI/PCI-Express support for Marvell systems.
Obtained from:	Marvell, Semihalf
2008-11-19 11:30:44 +00:00
stas
ca9ebe8c73 - Fix two minor errors in at91 code.
PR:		arm/128959
Submitted by:	Bjorn Konig <bkoenig@alpha-tierchen.de>
Approved by:	kib (mentor)
2008-11-18 12:42:59 +00:00
raj
1cecf7c661 ARM pmap style(9) and cosmetics. 2008-11-06 16:28:28 +00:00
raj
bce91d33d1 Auto-size kernel page tables allocation on Marvell systems.
This allows mini dumps to fully work for these platforms.

Obtained from:	Juniper Networks, Semihalf
2008-11-06 16:25:12 +00:00
raj
032a270ba5 Support kernel crash mini dumps on ARM architecture.
Obtained from:	Juniper Networks, Semihalf
2008-11-06 16:20:27 +00:00
mav
3c4dfce5ca Allow card reader bridge driver to report maximum supported transfer size.
sdhci supports up to 65535 blocks transfers, at91_mci - one block.

Enable multiblock operations disabled before to follow at91_mci driver
limitations.

Reviewed by:	imp@
2008-10-29 20:01:26 +00:00
stas
57432d8a84 - Add stream bus_space operations.
Reviewed by:	cognet
Approved by:	kib (mentor, implicit)
MFC after:	1 week
2008-10-26 22:53:59 +00:00
stas
e29a55524b - Add a missing NULL-pointer check.
Reviewed by:	cognet
Approved by:	kib (mentor, implicit)
MFC after:	3 days
2008-10-26 22:52:57 +00:00
des
66f807ed8b Retire the MALLOC and FREE macros. They are an abomination unto style(9).
MFC after:	3 months
2008-10-23 15:53:51 +00:00
marcel
0b89118840 Add arm/conf/DEFAULTS and populate it with:
machine arm
        device  mem
        options GEOM_BSD
        options GEOM_MBR

Remove the first two from all kernel configuration files and
change geom_bsd and geom_mbr from standard to optional.
2008-10-23 01:51:55 +00:00
raj
eece70b41c Eliminate flushing of L2 cache in ARM context switch routines.
With VIPT L2 cache such syncing not only is redundant, but also a performance
penalty.

Pointed out by:	cognet
2008-10-16 19:06:24 +00:00
sam
fdfb3870dc correct sizeof calculation
PR:		arm/128095
Submitted by:	Henning Petersen
MFC after:	1 week
2008-10-14 16:27:52 +00:00
raj
745c5c702f Initial support of loader(8) for ARM machines running U-Boot.
This uses the common U-Boot support lib (sys/boot/uboot, already used on
FreeBSD/powerpc), and assumes the underlying firmware has the modern API for
stand-alone apps enabled in the config (CONFIG_API).

Only netbooting is supported at the moment.

Obtained from:	Marvell, Semihalf
2008-10-14 10:11:14 +00:00
raj
0215a6a6ee Add kernel config files for Marvell development boards.
FreeBSD 8-CURRENT was tested and run successfully on the following eval
boards and devices :

  * DB-88F5182, DB-88F5281 (Orion based)

  * DB-88F6281, RD-88F6281 (Kirkwood based)

  * DB-78100 (Discovery based)

For more detailed info on build instructions and other examples please refer
to http://wiki.freebsd.org/FreeBSDMarvell

Obtained from:	Marvell, Semihalf
2008-10-14 08:18:27 +00:00
raj
3226c13778 Introduce basic support for Marvell families of system-on-chip ARM devices:
*  Orion
     - 88F5181
     - 88F5182
     - 88F5281

  * Kirkwood
     - 88F6281

  * Discovery
     - MV78100

The above families of SOCs are built around CPU cores compliant with ARMv5TE
instruction set architecture definition. They share a number of integrated
peripherals. This commit brings support for the following basic elements:

  * GPIO
  * Interrupt controller
  * L1, L2 cache
  * Timers, watchdog, RTC
  * TWSI (I2C)
  * UART

Other peripherals drivers will be introduced separately.

Reviewed by:	imp, marcel, stass (Thanks guys!)
Obtained from:	Marvell, Semihalf
2008-10-13 20:07:13 +00:00
raj
000539b888 One more L2 cache synchronization call that didn't make the previous commit. 2008-10-13 19:14:14 +00:00
raj
ea283ed261 Provide L2 cache synchronization (write back + invalidation) on ARM.
Note the cpu_l2cache_wbinv_* routines are no-ops on systems not populated with
L2 caches.

Obtained from:	Marvell, Semihalf
2008-10-13 18:59:59 +00:00
raj
e725b1fa27 Do not use cached page for temporary mapping in pmap_zero_page_generic()
The physical page which we clear is accessed via additional temp kernel
mapping for the period of zeroing operation. However in systems with virtual
d-cache (most ARMs) when write-allocate feature is enabled, we can have
modified but unflushed content pertaining to this physical page still in the
d-cache due to its primary (pre-existing) mapping. In such scenario that
cached content upon flush is likely to overwrite [portions of] the physical
page we want to zero here..

This is a general problem with multiple virtual mappings covering the same
physical page with write-allocate and virtual d-cache: there is inherent
potential for corruptions of this kind, which are not easily resolved; it is
best policy that such multiple mappings be not allowed.

Obtained from:	Marvell, Semihalf
2008-10-13 18:42:25 +00:00
raj
b9c565987a Introduce low-level support for new Marvell core CPUs: 88FR131, 88FR571.
They are compliant with ARMv5TE and integrated on 88F6281 (Kirkwood) and
MV78100 (Discovery) system-on-chip families.

Obtained from:	Marvell, Semihalf
2008-10-13 18:16:54 +00:00
imp
e2a8a485a0 Use bus_get_dma_tag() instead of NULL here. Not really needed for atmel
at the moment, but it is more correct.
2008-10-07 17:23:16 +00:00
bms
8ab83d3e56 Allow static hints to override kenv. 2008-10-02 22:31:30 +00:00
peter
ed8d07f232 Collect N identical (or near identical) mkdumpheader() implementations into
one, as threatened in the comment.  Textdump magic can be passed in.
2008-10-01 22:08:53 +00:00
imp
5a8e6d3572 Properly implement read only. Also, the caps implementation is wrong
here, so I'm backing it out.
2008-09-30 02:32:41 +00:00
imp
3808bd172d Implement MMCBR_IVAR_CAPS for AT91 MCI device.
Submitted by:	mav@ (well, not this one, but the base impl was)
2008-09-28 23:37:56 +00:00
imp
87f884a91b White space nit. 2008-09-28 05:36:25 +00:00
ed
4efdef565f Replace all calls to minor() with dev2unit().
After I removed all the unit2minor()/minor2unit() calls from the kernel
yesterday, I realised calling minor() everywhere is quite confusing.
Character devices now only have the ability to store a unit number, not
a minor number. Remove the confusion by using dev2unit() everywhere.

This commit could also be considered as a bug fix. A lot of drivers call
minor(), while they should actually be calling dev2unit(). In -CURRENT
this isn't a problem, but it turns out we never had any problem reports
related to that issue in the past. I suspect not many people connect
more than 256 pieces of the same hardware.

Reviewed by:	kib
2008-09-27 08:51:18 +00:00
kib
c500808674 Change the static struct sysentvec and struct Elf_Brandinfo initializers
to the C99 style. At least, it is easier to read sysent definitions
that way, and search for the actual instances of sigcode etc.

Explicitely initialize sysentvec.sv_maxssiz that was missed in most
sysvecs.

No objection from:	jhb
MFC after:	1 month
2008-09-24 10:14:37 +00:00
cognet
5b5d402e31 Bandaid: disable interrupts to make sure intr_enabled and the IER register
are in sync. I'm not sure why it is needed, and why it wouldn't be on other
arm platforms, but it prevents a lockup under heavy I/O.
2008-09-11 20:43:38 +00:00
cognet
a815eb98d3 Remove the unused field "pc_prvspace" from the MD fields for the struct
pcpu. There's not even a thing such as a "struct pcup".
While I'm there, remove a comment that makes no sense for arm.

Spotted out by:	Mark Tinguely
2008-09-11 20:39:46 +00:00