easier loading of modules that might refer to these interfaces. None
of the code that implements them is standard, just the glue. This
bloats the kernel a whopping 8k.
Silence on: arch@
o ToPIC is happy with two cards now, even when the two cards are
modems.
o Fix (all?) hangs on boot when power is applied to the card. I
suspect that this will make the Ricoh bridges happier and also
make a lot of VAIO owners happy (confirm to me in private email
please :-).
o All Cardbus bridges should now support 3.3V, X.XV and Y.YV cards,
to the extent that the underlying hardware supports such cards.
(X.X and Y.Y haven't been assigned values yet :-).
o Better 3.3V support for Ricoh ISA bridges.
How:
o Don't mess with the power register when scanning the cards. It
is unnecessary and causes BADVcc conditions on many chipsets. These
in turn can cause an interrupt storm.
o Make pcic_disable reset the slot's voltage.
o Move initializing voltage for the slot until after it has been
disabled.
o Fix a lot of issues with the pcic_cardbus_power routine. We
now properly enable the card and take it out of reset after
a power change.
o When detecting the card's voltage, if we're in a BadVcc state,
direct the bridge to rescan the card for what it supports.
(we might need to in the future set the power register to 0
before doing this).
o Don't preserve CLKSTOP. need to revisit this.
o Better support for Ricoh ISA bridges for 3.3V cards.
o Don't write to PCIC_POWER directly as offten, but instead go
through the pcic_power interface.
o All cardbus bridges now default to use cardbus power control.
o Add misc register definitions.
o remove some (now) bogus comments.
Extra Special Thanks To: Scott Lamber for his kind and generous loan
of a Toshiba laptop with a ToPIC 100 in it for my use.
dcache aliasing. A page that already had more than 1 mapping of the
same virtual colour would not be correctly uncached.
Noticed by: Artur Grabowski <art@openbsd.org>
checksumming. These bugs could possibly cause bad code to be
generated at elevated optimization levels.
First, eliminate the use of preprocessor magic to form the address
fields of asm instructions. It hid the actual addresses being
referenced from the compiler. Without knowledge of all the data
dependencies, the compiler might possibly use optimizations which
would result in incorrect code.
Use "__asm __volatile" rather than "__asm" for instruction sequences
that pass information through the condition codes (the carry bit, in
this case). Without __volatile, the compiler might add unrelated
code between consecutive __asm instructions, modifying the condition
codes. I have seen GCC insert stack pointer adjustments in this
way, for example. Unfortunately, GCC doesn't provide a way to
specify dependencies on the condition codes. You can specify that
they are clobbered, but not that you are going to use them as input.
Finally, simplify the LOAD macro. This macro is used as a poor
man's prefetch. The simpler version gives the compiler more leeway
about just how it performs the prefetch.
MFC after: 1 week
64-bit architectures that was introduced in the UFS2 code
merge two days ago. The stat structure change that caused
the problem was the addition of the file create time.
Submitted by: Bruce Evans <bde@zeta.org.au>
Sponsored by: DARPA & NAI Labs.
out of inodes in a cylinder group would fail to check for
free inodes in other cylinder groups. This bug was introduced
in the UFS2 code merge two days ago.
An inode is allocated by calling ffs_valloc which calls
ffs_hashalloc to do the filesystem scan. Ffs_hashalloc
walks around the cylinder groups calling its passed allocator
(ffs_nodealloccg in this case) until the allocator returns a
non-zero result. The bug is that ffs_hashalloc expects the
passed allocator function to return a 64-bit ufs2_daddr_t.
When allocating inodes, it calls ffs_nodealloccg which was
returning a 32-bit ino_t. The ffs_hashalloc code checked
a 64-bit return value and usually found random non-zero bits in
the high 32-bits so decided that the allocation had succeeded
(in this case in the only cylinder group that it checked).
When the result was passed back to ffs_valloc it looked at
only the bottom 32-bits, saw zero and declared the system
out of inodes. But ffs_hashalloc had really only checked
one cylinder group.
The fix is to change ffs_nodealloccg to return 64-bit results.
Sponsored by: DARPA & NAI Labs.
Submitted by: Poul-Henning Kamp <phk@critter.freebsd.dk>
Reviewed by: Maxime Henrion <mux@freebsd.org>
improperly clearing more then just the invalid portions of the page. (This
bug is not known to have been triggered by anything).
Submitted by: tegge
MFC after: 7 days
with the acquisition and release of Giant. (Annotate as MPSAFE.)
o Reorder the sanity checks in dev_pager_alloc() to reduce
the time that Giant is held.
Untested (testing request went unanswered), but sparc64 is not expected to
cause problems. IA64 is not expected to cause problems but the patch was
slightly more complex so the possibility exists.
Approved by: jdp
uio now that we don't use uiomove() anymore.
o Enforce stricter checks on the length of the iov's in
nmount(2) since we now malloc() them individually and
corrupted iov's could make the kernel crash in malloc()
with "kmem_map too small".
Reviewed by: phk
release of Giant around the direct manipulation of the vm_object and
the optional call to pmap_object_init_pt().
o In vm_map_findspace(), remove GIANT_REQUIRED. Instead, acquire and
release Giant around the occasional call to pmap_growkernel().
o In vm_map_find(), remove GIANT_REQUIRED.
when machdep.tsc_freq returned a negative number on a 2.2GHz Xeon.
Submitted by: Brian Harrison <bharrison@ironport.com>
Reviewed by: phk
MFC after: 1 week
Use memcpy for all little-endian architectures, sys/kern/md5c.c indicates
this should be safe for all currently supported LE archs.
Change the Encode and Decode functions for other archs to use le32toh()
and htole32() functions instead of explicit byte shuffling.
On sparc64 this gives md5(1) about 8% speed increase.
